Description:DESCRIPTION:
Field of the invention:
[0001] The present disclosure generally relates to the technical field of intellectual property (IP) cores for reconfigurable system on chip (SoC) and network on chip (NoC) semiconductor technology and in specific, relates to a system that incorporates one processor field programmable gate array (FPGA) into SoC architecture to provide high performance with low power consumption.
Background of the invention:
[0002] An embedded computing is present in one or another way in our daily life. The combination of hardware and software is applied to perform a specific function in multitude scenarios. The flexibility provided by run-time partial reconfiguration for implementing large circuits on limited hardware resources earn values for implementing a wide range of low-cost applications. By means of reconfiguration technology, all resources are highly customized to the instantaneous needs of an application.
[0003] System on Chip (SOC) is an integrated circuit (IC) that integrates all the components of an electrical/electronic system into a single chip. The integrated circuit typically comprises digital functions, analog functions, mixed-signal functions and radio-frequency functions inter-alia embedded onto a single chip substrate. The integrated circuit typically includes hardware (microprocessors and microcontrollers) and necessary software for controlling the functionalities and implementation of the hardware.
[0004] Typically, System on Chips (SoCs) are developed from pre-qualified hardware blocks corresponding to the hardware elements. The software drivers control the functionalities of the hardware elements. Typically, the hardware elements are assembled using well known Computer Aided Design (CAD) tools, and the corresponding software modules are integrated using an integrated software development environment, subsequent to the finalization of SoC circuit architecture.
[0005] In existing technology, an IoT embedded system and cloud computing infrastructure merge soft cores with programmable logic (FPGAs) to yield a heterogeneous hardware-software processing ecosystem and adapt their computational power to specific application in use. A cloud server of infrastructure as a service (laaS) is employed for evaluating performance and efficiency of the embedded system based on its hardware architectures. But, the reconfiguration data is stored in a computing service database to generate reconfiguration data by reconfigurable system and optimize their reconfigurable computing hardware logics.
[0006] In updated technology, a system and method for designing SoC using artificial intelligence (AI) and reinforcement learning (RL) techniques is known. The AI logic design agent is configured to acquire from the interaction and plan the implementation of a SoC circuit design based on the optimal chip architecture. But, the acquired data is stored in a database that stores plurality of chip architecture data which is an additional component to design.
[0007] In general, the conventional system, which are used to design SoC architecture using artificial intelligence (AI) collects data and stores in a database which is an additional component. In conventional system, multiple FPGA’s are used for better flexibility but here the delay increases that affects the SoC architecture. In addition, by using multiple FPGA’s the design complexity also increases and thereby leads to degradation of speed and design flexibility.
[0008] Therefore, there is a need for a system that consumes less power and provides high performance. There is a need for a system that designs system on chip (SoC) architecture with less complexity. There is a need for a system on chip (SoC) architecture that reduces routing delay on the printed circuit board (PCB) board. There is a need for a system on chip (SOC) architecture that increases the speed and design flexibility. In addition, there is a need for a system that encourages the usage of hand-held devices for longer time.
Objectives of the invention:
[0009] The primary objective of the invention is to provide a system that consumes less power and gives high performance.
[0010] The other objective of the invention is to provide a system that comprises single field programmable gate arrays (FPGA) to ensure functional flexibility and better design parameters.
[0011] The other objective of the invention is to provide a system that reconfigures itself automatically without help of the manufacturer.
[0012] Another objective of the invention is to provide a system that designs system on chip (SoC) architecture with less complexity.
[0013] The other objective of the invention is to provide a system on chip (SoC) architecture that minimizes routing delay on printed circuit board (PCB) board.
[0014] Yet another objective of the invention is to provide a system on chip (SoC) architecture that improves speed and design flexibility.
[0015] The other objective of the invention is to provide a system that is used in various sectors including medical, industrial, railway and aerospace thereof.
[0016] Further objective of the invention is to provide a system that encourages the usage of hand-held devices for a longer time instead of building electronic wastage and thereby polluting the environment.
Summary of the invention:
[0017] The present disclosure proposes an artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture and method thereof. The following presents a simplified summary in order to provide a basic understanding of some aspects of the claimed subject matter. This summary is not an extensive overview. It is not intended to identify key/critical elements or to delineate the scope of the claimed subject matter. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is presented later.
[0018] In order to overcome the above deficiencies of the prior art, the present disclosure is to solve the technical problem to provide a system that incorporates one processor field programmable gate array (FPGA) into SoC architecture to provide high performance with low power consumption.
[0019] According to an aspect, the invention provides artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture. The artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture comprises a computing device, a storage module and an analysis module. The proposed system aids to improve speed for better performance of the computing device.
[0020] The computing device comprises an input module, a data acquisition module, a processor-field programmable gate array (FPGA) core with at least two fabrics and a configuration module. The input module is configured to enter at least one input data that includes functional data, browsing data and application data thereof in the computing device. In specific, the computing device includes smartphones, computers, tablets and any other similar smart devices thereof.
[0021] The data acquisition module is configured to collect at least one input data from the input module. The processor-field programmable gate array (FPGA) core operates with a graphics processing unit (GPU), digital signal processing (DSP) and other similar processes to ensure low power consumption and better efficiency. The transmission module is configured to encrypt the collected data from the data acquisition module by using light weight cipher core and thereby transmit the encrypted data. The configuration module reconfigures the computing device based on data for a customized and superior experience.
[0022] The storage module is configured to receive and decrypt the encrypted data from the transmission module and thereby store the decrypted data. In specific, the storage module includes a database, a server and a cloud thereof. An analysis module is configured to the storage module to analyse the stored data based on the computing device priority and transmits the analysed data. In specific, the analysed data includes plurality of functional data and thereof.
[0023] According to another aspect, the invention provides a method for artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture. At first, at least one input data is entered in a computing device through an input module. Next, at least one input data is collected from the input module through a data acquisition module. Next, the collected data is encrypted and transmitted from the data acquisition module through a transmission module.
[0024] Next, the encrypted data is received from the transmission module and thereby decrypted and stored the decrypted data in a storage module. Later, the stored data is analysed based on the computing device priority and thereby the analysed data is transmitted through an analysis module. Finally, the analysed data is received and thereby a processor-field programmable gate array (FPGA) core on the computing device is reconfigured for better performance through a configuration module.
[0025] Further, objects and advantages of the present invention will be apparent from a study of the following portion of the specification, the claims, and the attached drawings.
Detailed description of drawings:
[0026] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate an embodiment of the invention, and, together with the description, explain the principles of the invention.
[0027] FIG. 1 illustrates an exemplary block diagram of artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture in accordance to an exemplary embodiment of the invention.
[0028] FIG. 2 illustrates an exemplary method for artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture in accordance to an exemplary embodiment of the invention.
Detailed invention disclosure:
[0029] Various embodiments of the present invention will be described in reference to the accompanying drawings. Wherever possible, same or similar reference numerals are used in the drawings and the description to refer to the same or like parts or steps.
[0030] The present disclosure has been made with a view towards solving the problem with the prior art described above, and it is an object of the present invention to provide a system that incorporates one processor field-programmable gate array (FPGA) into SoC architecture to provide high performance with low power consumption.
[0031] According to an exemplary embodiment of the invention, FIG. 1 refers to artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture. The artificial intelligence (AI) enabled system 100 reconfiguration on chip (SoC) architecture comprises a computing device 102, a storage module 114 and an analysis module 116. The proposed system 100 aids to improve speed for better performance of the computing device.
[0032] The computing device 102 comprises an input module 104, a data acquisition module 106, a transmission module 108, a processor–field programmable gate array (FPGA) core 110 with at least two fabrics and a configuration module 112. The input module 104 is configured to enter at least one input data that includes functional data, browsing data and application data thereof in the computing device 102. In specific, the computing device 102 includes smartphones, computers, tablets and any other similar smart devices thereof.
[0033] The data acquisition module 104 is configured to collect at least one input data from the input module 102. The transmission module 106 is configured to encrypt the collected data from the data acquisition module 104 using light weight cipher core and thereby transmit the encrypted data. The processor-field programmable gate array (FPGA) core 110 operates with a graphics processing unit (GPU), digital signal processing (DSP) and other similar processes to ensure low power consumption and better efficiency. Some parts of the processor-field programmable gate array (FPGA) core are configured as light weight cipher core.
[0034] In specific, processor-field programmable gate array (FPGA) core 110 is classified into processing system fabric (Fabric-1) and reconfigurable logic fabric (Fabric-2) which makes use of the reconfigurable embedded system design. The processor-FPGA core 110 consumes less energy, the task offloading would transfer task to either processing system fabric (Fabric-1) or reconfigurable logic fabric (Fabric-2). The configuration module 112 to reconfigure the computing device 102 based on data for a customized and superior experience.
[0035] The storage module 114 is configured to receive the encrypted data from transmission module 108 and thereby decrypt the encrypted data using light weight cipher core and store the decrypted data. In specific, the storage module 114 includes a database, a server and a cloud thereof. An analysis module 116 is configured to the storage module 114 to analyse the stored data based on the computing device priority and transmits the analysed data. In specific, the analysed data includes plurality of functional data and thereof. The analysis module 116 analyses the stored data by running at least one AI algorithm to form a decision.
[0036] For an instance, a computing device is enabled to enter input data through the input module. The input data is gathered from the input module through the data acquisition module. The gathered data is transmitted through the transmission module. The transmitted data is received and stored by the storage module. The stored data is analysed based on computing device priority by running an AI algorithm to form a decision. The analysed data is transmitted through the analysis module to the computing device that reconfigures itself without the help of the manufacturer for better performance.
[0037] According to another exemplary embodiment of the invention, FIG. 2 refers to a method 200 for artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture. At step 202, at least one input data is entered in a computing device through an input module. At step 204, at least one input data is collected from the input module through a data acquisition module. At step 206, the collected data from the data acquisition module is encrypted using light weight cipher core and thereby the encrypted data is transmitted through a transmission module.
[0038] At step 208, the encrypted data is received from the transmission module thereby the received data is decrypted using light weight cipher core and stored in a storage module. At step 210, the stored data is analysed based on the computing device priority and thereby the analysed data is transmitted through an analysis module. At step 212, the analysed data is received and thereby processor-field programmable gate array (FPGA) core on the computing device is reconfigured for better performance through a configuration module.
[0039] Numerous advantages of the present disclosure may be apparent from the discussion above. In accordance with the present disclosure, an artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture is disclosed. The proposed system consumes less power and gives high performance. The proposed system comprises single field programmable gate arrays (FPGA) to ensure functional flexibility and better design parameters. The proposed system reconfigures itself automatically without the help of the manufacturer.
[0040] The proposed system designs system on chip (SoC) architecture with less complexity. The proposed system on chip (SoC) architecture minimizes routing delay on printed circuit board (PCB) board. The proposed system on chip (SoC) architecture improves speed and design flexibility. The proposed system is used in various sectors including medical, industrial, railway and aerospace thereof. The proposed system encourages the usage of hand-held devices for a longer time instead of building electronic wastage and thereby polluting the environment.
[0041] It will readily be apparent that numerous modifications and alterations can be made to the processes described in the foregoing examples without departing from the principles underlying the invention, and all such modifications and alterations are intended to be embraced by this application. , Claims:CLAIMS:
We Claim:
1. An artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture, comprising:
a computing device, comprising:
an input module configured to enter at least one input data;
a data acquisition module configured to collect said at least one input data from said input module;
a transmission module configured to encrypt said collected data from said data acquisition module by light weight cipher core and thereby transmit said encrypted data;
a processor-field programmable gate arrays (FPGA) core with at least two fabrics;
a configuration module to reconfigure said computing device based on data for customized and superior experience;
a storage module configured to receive and decrypt said encrypted data from said transmission module by said light weight cipher core and thereby store said decrypted data; and
an analysis module configured to said storage module to analyse said stored data based on said computing device priority and transmits said analysed data,
whereby said system aids to improve speed for better performance of said computing device.
2. The artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture as claimed in claim 1, wherein said input data includes functional data, browsing data and application data thereof in said computing device.
3. The artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture as claimed in claim 1, wherein said storage module includes a database, a server and cloud thereof.
4. The artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture as claimed in claim 1, wherein said computing device includes smart phones, computers, tablets and any other similar smart devices thereof.
5. The artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture as claimed in claim 1, wherein said processor-field programmable gate arrays (FPGA) core operates with graphics processing unit (GPU), digital signal processing (DSP) and other similar processes to ensure low power consumption and better efficiency.
6. The artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture as claimed in claim 1, wherein said analysed data includes plurality of functional data and thereof.
7. A method for artificial intelligence (AI) enabled system reconfiguration on chip (SoC) architecture, comprising:
entering at least one input data in a computing device through an input module;
collecting said at least one input data from said input module through a data acquisition module;
encrypting said collected data from said data acquisition module and thereby transmitting said encrypted data through a transmission module;
receiving said encrypted data from said transmission module and thereby decrypting and storing said decrypted data in a storage module;
analysing said stored data based on said computing device priority and thereby transmitting said analysed data from an analysis module, and
receiving said analysed data and thereby reconfiguring said processor-field programmable gate arrays (FPGA) core on said computing device for better performance through a configuration module.