Abstract: An audio processor has a number of ports that are configurable as input or output ports. Each port includes a jack an input audio circuit and an output audio circuit. A switch is controllable to selectively connect an output of the output audio circuit to the jack when the port is configured as an output port. In one embodiment the switch is bypassed with resistor and the output of the output audio circuit is coupled through the resistor to the jack when the port is configured as an input port.
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims priority to U.S. Application No. 15/002,135 entitled
"AUDIO PROCESSOR TH BI-DIRECTIONAL INPUT/OUTPUT PORTS," and filed
on January 20, 2016, and U.S. Provisional Patent Application No. 62/1 67,1 74 entitled
"AUDIO PROCESSOR WITH Bi-D!RECTIONAL INPUT/OUTPUT PORTS," and filed
on May 27, 201 5, both of which are hereby incorporated by reference in their
entireties.
TECHNICAL FIELD
[0002] The disclosed technology relates to audio equipment and in particular to
programmable audio processors.
BACKGROUND
[0003] Audio processors are sophisticated pieces of computer-controlled
equipment that allow sound engineers to configure how sound is received and
distributed in a space. Such equipment can be used in business establishments,
bars, restaurants, conference rooms, concert halls, churches, government chambers
or any other location where it is desired to receive audio inputs from a source and
deliver it to one or more speakers for people to hear. One example of an audio
processing system is the Q-Sys Core™ system available from QSC Audio Products,
LLC. - the assignee of the present application.
[0004] A simplified representation of the Q-Sys Core system is shown in Figure
1. The system 10 includes an audio processing core 20 that includes one or more
central processing units 22 and audio processors 24 that can be implemented with
programmable microprocessors or digital signal processors (DSPs). The audio
processor 24 receives input audio signals from a number of audio input circuits 26
that condition the signals to have the proper level and if the signals received are in
analog form, to convert the signals to corresponding digital signals with analog-todigital
converters. The audio signals are processed in the audio processor 24 and
supplied to a selected audio output circuit 28 that may include an amplifier. The audio
input signals are received from any number of input audio sources 40 including
microphones 40a-4Gc, streamed audio signals from a network 40d including the
internet, digital music sources such as CD players 40e or P3 players 40f. In
addition, input signals can be received from satellite or cable television sources 40g or
from a telephone 40h As will be appreciated, other audio sources are also possible.
Each of the audio sources is connected to the audio processor 20 through an input
jack 30. The output audio signals are supplied via the audio processor's output jacks
32 to speakers 50a, 50b either directly or through additional amplifiers 60.
Alternatively, the output audio signals can be transmitted on a network to other types
of audio equipment (not shown). An audio engineer or IT technician is able to control
how the audio signals are processed, combined and routed with software operating
on the computer system 36.
[0005] One of the challenges in building audio processors 20 of the type shown
in Figure 1 is responding to customer demands for different numbers of inputs and
outputs. One customer who is designing a large conference room may want a system
with 6 microphone inputs and 8 speaker outputs, etc. Another customer designing a
restaurant may want 4 signal inputs and 20 speaker outputs in order to build
systems to customer specifications large numbers of different input and output
configurations must be kept in inventory.
[0006] Given this problem, there is a need for a way to simplify the design of the
audio processor while still giving customers flexibility in how the system can be used.
SUMMARY
[0007] The technology disclosed herein relates to an improvement in audio
processors. In particular, an audio processor includes a number of bi-directional
input/output ports that are each configurable to accept audio signals from a source or
to deliver audio signals to a load. In one embodiment, each bi-directional input/output
port includes a jack that is electrically coupled to an input of the audio input circuit. A
controllable switch selectively connects an output of the audio output circuit to the jack
if the port is to be used as an output port. Alternatively, the switch can be controlled
to disconnect the output of the audio output circuit from the jack if the port is to be
used as an input port
[0008] in one particular embodiment, each switch is bypassed with a resistor to
allow the output of the audio output circuit to remain connected to the jack even when
the port is configured as an input port
BRIEF DESCRIPTION OF THE DRAWINGS
[0009] Figure 1 is a simplified block diagram of an audio processor including a
number of input ports and output ports;
[0010] Figure 2 is a simplified block diagram of an audio processor in
accordance with one embodiment of the disclosed technology;
[0011] Figure 3 illustrates a controllable switch that selectively connects an
output of an audio output circuit to a jack of a bi-directional port in accordance with
one embodiment of the disclosed technology; and
[0012] Figure 4 illustrates the controllable switch in a position to electrically
connect an output of the audio output circuit to a jack of a bi-directional port in
accordance with an embodiment of the disclosed technology.
DETAILED DESCRIPTION
[0013] To improve the manufacturability of an audio processor and to provide
users increased flexibility in how the processor can be used, the disclosed technology
provides an audio processor with a number of bi-directional input/output ports.
Although the embodiment described is for use with audio, it will be appreciated that
the technology can used in processing other signals e.g. video signals.
[0014] As shown in Figure 2, an audio processor 100 includes one or more
central processing units 02 and one or more audio processors/DSPs 104. The audio
processor 104 is programmed to receive input audio signals from ports that are
configured as input ports, process the signals and supply the processed signals to
one or more output ports. In one embodiment, each of the ports to the audio
processor is a bi-directional input/output port. In another embodiment, fewer than a l
the ports are bi-directional and some of the ports are permanently configured as
either input or output ports.
[0015] in the embodiment shown, each bi-directional port 106a, 106b and 106c
has a jack 108 that is electrically coupled to an input of an audio input circuit 110a
and an output of an audio output circuit 110b. A switch 112 is controllable to connect
or disconnect the output of the audio output circuit 110b from the jack 108 of the b i
directional port. When the switch 112 is closed, the output of the audio output circuit
110b is electrically connected to the jack of the bi-directional port. Conversely, when
the controllable switch 112 is open, the output of the audio output circuit 110b is not
directly connected to the jack of the bi-directional port.
[0016] n one embodiment, the switches 112 are electromechanical relays that
are controlled to be in the open or closed state by the signals produced by the CPU
102. However it will be appreciated that other types of switches such as solid-state
relays or transistor switches could also be used.
[0017] To configure a port as an input port, a user employs a computer program
on a computer system 140 and designates the port as an input port. Signals from the
computer system 140 are provided to the CPU 102 that in turn causes the CPU 102
to produce a control signal that opens the switch 1 . The details of the programming
and support circuitry used to enable the CPU 102 to change the state of the switches
are considered to be well known to those of ordinary skill in the art. In one
embodiment, the CPU 102 includes non-volatile memory to remember the desired
state of the switches 112 after power to the audio processor 100 has been removed
in one embodiment, each bi-directional port remains configured as either an input port
or an output port after power is restored to the audio processor until it's state is
changed by a user.
[0018] in another embodiment, the audio processor 100 can include an input
mechanism (e.g., keypad, touch screen, buttons or switches and the like) that can be
used to set the bi-directional ports to be either input ports or output ports without the
use of the computer 140. Alternatively, jumpers can be placed on the circuit board to
set the position of the switches or manual switches could be used.
[0019] In one embodiment of the disclosed technology, each of the switches 11
is bypassed by a resistor 116 that is in parallel with the switch. The resistor 116 has a
fairly large resistance such as, but not limited to 20K - 300K ohms and in one
particular embodiment has a resistance of 150K ohms. With the resistor 1 6 in place,
the output of the audio output circuit 110b is always connected to the jacks of the b i
directional ports. When the switch 12 is open, the output of the audio output circuit
110b is connected through the resistor 116 to the jack of the bi-directional switch and
to the input of the audio input circuit 110a. When the switch 112 is closed, the output
of the audio output circuit 110b is connected by a much lower impedance to the jack
of the bi-directional port and to the input of the audio input circuit 110a.
[0020] Although the bi-directional ports can be constructed without the resistor
16 in parallel with the switch 112, the resistor provides some useful benefits.
[0021] Figure 3 shows an arrangement where the switch 112 is controlled by the
CPU 102 to be in an open state. This configures the bi-directional port to behave as
an input port. An input signal such as from a microphone 60 is supplied to the input
of the audio input circuit 110a for processing by the audio processor 104. In order to
test that the microphone is operating properly, a pilot tone is produced by the audio
output circuit 110b. The signal for the pilot tone passes through the resistor 116 and
is electrically coupled to the jack 108 and to the input of the input circuit 110a. The
level of the signal for the pilot tone that is detected at the input of the audio input
circuit 110a depends on whether there is a fault with the microphone 160. This is
useful when the audio system is part of a public address (PA) system and the
microphone is to be used in case of emergencies or other instances where a
microphone is needed. If the microphone is not present or could be damaged, the
CPU 102 can produce a warning message to an operator of the system to check the
microphone 160.
[0022] Figure 4 shows an example of when the switch 112 is closed and the b i
directional port is configured as an output port. Here, the output of the audio output
circuit 11 b is coupled by the low impedance switch 112 to the jack 108 and also to
the input of the audio input circuit 110a. By monitoring the signal at the input of the
input audio circuit 110a, the audio processor 104 and/or the CPU 102 can determine
if there is a short in the load or other error conditions. As will be appreciated, the
input of the audio input circuit 110a should be sufficiently protected to withstand the
level of the signals produced by the audio output circuit 110b.
[0023] Embodiments of the subject matter and the operations described in this
specification can be implemented in digital electronic circuitry, or in computer
software, firmware, or hardware, including the structures disclosed in this specification
and their structural equivalents, or in combinations of one or more of them.
Embodiments of the subject matter described in this specification can be
implemented as one or more computer programs, i.e., one or more modules of
computer program instructions, encoded on computer storage medium for execution
by, or to control the operation of, data processing apparatus.
[0024] A computer storage medium can be, or can be included in, a computerreadable
storage device, a computer-readable storage substrate, a random or serial
access memory array or device, or a combination of one or more of them. Moreover,
while a computer storage medium is not a propagated signal, a computer storage
medium can be a source or destination of computer program instructions encoded in
an artificially-generated propagated signal. The computer storage medium also can
be, or can be included in, one or more separate physical components or media (e.g.,
multiple CDs, disks, or other storage devices). The operations described in this
specification can be implemented as operations performed by a data processing
apparatus on data stored on one or more computer-readable storage devices or
received from other sources.
[0025] The term "data processing apparatus" encompasses a l kinds of
apparatus, devices, and machines for processing data, including by way of example a
programmable processor, a computer, a system on a chip, or multiple ones, or
combinations, of the foregoing. The apparatus can include special purpose logic
circuitry, e.g., an FPGA (field programmable gate array) or an ASIC
(application-specific integrated circuit). The apparatus also can include, in addition to
hardware, code that creates an execution environment for the computer program in
question, e.g., code that constitutes processor firmware, a protocol stack, a database
management system, an operating system, a cross-platform runtime environment, a
virtual machine, or a combination of one or more of them. The apparatus and
execution environment can realize various different computing model infrastructures,
such as web services, distributed computing and grid computing infrastructures.
[0026] A computer program (also known as a program, software, software
application, script, or code) can be written in any form of programming language,
including compiled or interpreted languages, declarative or procedural languages, and
it can be deployed in any form, including as a stand-alone program or as a module,
component, subroutine, object, or other unit suitable for use in a computing
environment. A computer program may, but need not, correspond to a file in a file
system. A program can be stored in a portion of a file that holds other programs or
data (e.g., one or more scripts stored in a markup language document), in a single file
dedicated to the program in question, or in multiple coordinated files (e.g., files that
store one or more modules, sub-programs, or portions of code). A computer program
can be deployed to be executed on one computer or on multiple computers that are
located at one site or distributed across multiple sites and interconnected by a
communication network.
[0027] The processes and logic flows described in this specification can be
performed by one or more programmable processors executing one or more
computer programs to perform actions by operating on input data and generating
output. The processes and logic flows can also be performed by, and apparatus can
also be implemented as, special purpose logic circuitry, e.g., an FPGA (field
programmable gate array) or an ASIC (application-specific integrated circuit).
[0028] Processors suitable for the execution of a computer program include, by
way of example, both general and special purpose microprocessors, and any one or
more processors of any kind of digital computer. Generally, a processor will receive
instructions and data from a read-only memory or a random access memory or both.
The essential elements of a computer are a processor for performing actions in
accordance with instructions and one or more memory devices for storing instructions
and data. Generally, a computer will also include, or be operafively coupled to receive
data from or transfer data to, or both, one or more mass storage devices for storing
data, e.g., magnetic, magneto-optical disks, or optical disks. However, a computer
need not have such devices. Moreover, a computer can be embedded in another
device, e.g., a mobile telephone, a personal digital assistant (PDA), a mobile audio or
video player, a game console, a Global Positioning System (GPS) receiver, or a
portable storage device (e.g., a universal serial bus ((USB) flash drive), to name just a
few. Devices suitable for storing computer program instructions and data include ail
forms of non-volatile memory, media and memory devices, including by way of
example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory
devices; magnetic disks, e.g., internal hard disks or removable disks; magneto-optical
disks; and CD-ROM and DVD-ROM disks. The processor and the memory can be
supplemented by, or incorporated in, special purpose logic circuitry.
[0029] To provide for interaction with a user, embodiments of the subject matter
described in this specification can be implemented on a computer having a display
device, e.g., an LCD (liquid crystal display), LED (light emitting diode), or OLED
(organic light emitting diode) monitor, for displaying information to the user and a
keyboard and a pointing device, e.g., a mouse or a trackball, by which the user can
provide input to the computer in some implementations, a touch screen can be used
to display information and to receive input from a user. Other kinds of devices can be
used to provide for interaction with a user as well; for example, feedback provided to
the user can be any form of sensory feedback, e.g., visual feedback, auditory
feedback, or tactile feedback; and input from the user can be received in any form,
including acoustic, speech, or tactile input. In addition, a computer can interact with a
user by sending documents to and receiving documents from a device that is used by
the user; for example, by sending web pages to a web browser on a user's client
device in response to requests received from the web browser.
[0030] Embodiments of the subject matter described in this specification can be
implemented in a computing system that includes a back-end component, e.g., as a
data server, or that includes a middleware component, e.g., an application server, or
that includes a front-end component, e.g., a client computer having a graphical user
interface or a Web browser through which a user can interact with an implementation
of the subject matter described in this specification, or any combination of one or
more such back-end, middleware, or front-end components. The components of the
system can be interconnected by any form or medium of digital data communication,
e.g., a communication network. Examples of communication networks include a local
area network ("LAN") and a wide area network ("WAN"), an inter-network (e.g., the
internet), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks).
[0031] The computing system can include any number of clients and servers A
client and server are generally remote from each other and typically interact through a
communication network. The relationship of client and server arises by virtue of
computer programs running on the respective computers and having a client-server
relationship to each other. In some embodiments, a server transmits data (e.g., an
HTML page) to a client device (e.g., for purposes of displaying data to and receiving
user input from a user interacting with the client device). Data generated at the client
device (e.g., a result of the user interaction) can be received from the client device at
the server.
[0032] From the foregoing, it will be appreciated that specific embodiments of
the invention have been described herein for purposes of illustration, but that various
modifications may be made without deviating from the scope of the invention.
Accordingly, the invention is not limited except as by the appended claims.
CLAIMS
I/We claim:
1. An audio processor, comprising:
a central processing unit:
an audio processor; and
a number of ports wherein at least some of the ports are bi-directional and are
configurable by the central processing unit to supply signals to or
receive signals from the audio processor.
2. The audio processor of claim 1, wherein each bi-directional port
includes:
a jack;
an input audio circuit electrically connected to the jack;
an output audio circuit; and
a switch that is controlled by a signal from the central processing unit to
selectively connect an output of the output audio circuit to the jack or to
disconnect the output of the output audio circuit from the jack.
3. The audio processor of claim 2, wherein the switch is bypassed by a
resistor.
4. The audio processor of claim , wherein each port includes:
a jack;
an input audio circuit electrically connected to the jack;
an output audio circuit; and
a switch that is controlled by a signal from the central processing unit to
selectively connect an output of the output audio circuit to the jack with a
low or a high impedance value.
5. The audio processor of claim 1, wherein each port includes:
a jack;
an input audio circuit electrically connected to the jack;
an output audio circuit; and
a switch that is controlled by a signal ro the central processing unit to directly
or indirectly connect an output of the output audio circuit to the jack.
6. A processor, comprising:
a central processing unit;
a processor circuit for processing an input signal;
a number of ports wherein at least some of the ports are bi-directional;
a jack, an input circuit and an output circuit associated with each bi-directional
port; and
a switch that selectively connects an output of the output circuit to the jack of
the bi-directional port when the bi-directional port is configured as an
output port.
7. The processor of claim 6, wherein an input of the input circuit is
connected to the jack and remains connected to the jack when the bi-directional port
is configured as an output port.
8. The processor of claim 8, wherein the switch is bypassed with a resistor
that couples an output of the output circuit to the jack when the switch is in an open
state.
9. The processor of claim 6, wherein the switch is controlled with a signal
from the central processing unit.
10.The processor of claim 6, wherein the switch is controlled manually.
| Section | Controller | Decision Date |
|---|---|---|
| # | Name | Date |
|---|---|---|
| 1 | 201717042034-IntimationOfGrant08-02-2024.pdf | 2024-02-08 |
| 1 | 201717042034-TRANSLATIOIN OF PRIOIRTY DOCUMENTS ETC. [23-11-2017(online)].pdf | 2017-11-23 |
| 2 | 201717042034-PatentCertificate08-02-2024.pdf | 2024-02-08 |
| 2 | 201717042034-STATEMENT OF UNDERTAKING (FORM 3) [23-11-2017(online)].pdf | 2017-11-23 |
| 3 | 201717042034-REQUEST FOR EXAMINATION (FORM-18) [23-11-2017(online)].pdf | 2017-11-23 |
| 3 | 201717042034-PETITION UNDER RULE 137 [14-12-2023(online)].pdf | 2023-12-14 |
| 4 | 201717042034-Written submissions and relevant documents [14-12-2023(online)].pdf | 2023-12-14 |
| 4 | 201717042034-PRIORITY DOCUMENTS [23-11-2017(online)].pdf | 2017-11-23 |
| 5 | 201717042034-FORM 18 [23-11-2017(online)].pdf | 2017-11-23 |
| 5 | 201717042034-Correspondence to notify the Controller [24-11-2023(online)].pdf | 2023-11-24 |
| 6 | 201717042034-FORM-26 [24-11-2023(online)].pdf | 2023-11-24 |
| 6 | 201717042034-FORM 1 [23-11-2017(online)].pdf | 2017-11-23 |
| 7 | 201717042034-US(14)-HearingNotice-(HearingDate-29-11-2023).pdf | 2023-11-09 |
| 7 | 201717042034-DRAWINGS [23-11-2017(online)].pdf | 2017-11-23 |
| 8 | 201717042034-FORM 3 [14-02-2023(online)].pdf | 2023-02-14 |
| 8 | 201717042034-DECLARATION OF INVENTORSHIP (FORM 5) [23-11-2017(online)].pdf | 2017-11-23 |
| 9 | 201717042034-COMPLETE SPECIFICATION [23-11-2017(online)].pdf | 2017-11-23 |
| 9 | 201717042034-FORM 3 [25-01-2021(online)].pdf | 2021-01-25 |
| 10 | 201717042034-Information under section 8(2) [25-01-2021(online)].pdf | 2021-01-25 |
| 10 | 201717042034.pdf | 2017-11-25 |
| 11 | 201717042034-CLAIMS [02-12-2020(online)].pdf | 2020-12-02 |
| 11 | 201717042034-Proof of Right (MANDATORY) [29-12-2017(online)].pdf | 2017-12-29 |
| 12 | 201717042034-COMPLETE SPECIFICATION [02-12-2020(online)].pdf | 2020-12-02 |
| 12 | 201717042034-OTHERS-030118.pdf | 2018-01-08 |
| 13 | 201717042034-Correspondence-030118.pdf | 2018-01-08 |
| 13 | 201717042034-DRAWING [02-12-2020(online)].pdf | 2020-12-02 |
| 14 | 201717042034-FER_SER_REPLY [02-12-2020(online)].pdf | 2020-12-02 |
| 14 | abstract.jpg | 2018-01-18 |
| 15 | 201717042034-FORM 3 [02-12-2020(online)].pdf | 2020-12-02 |
| 15 | 201717042034-MARKED COPIES OF AMENDEMENTS [21-02-2018(online)].pdf | 2018-02-21 |
| 16 | 201717042034-Annexure [21-02-2018(online)].pdf | 2018-02-21 |
| 16 | 201717042034-OTHERS [02-12-2020(online)].pdf | 2020-12-02 |
| 17 | 201717042034-FORM 4(ii) [31-08-2020(online)].pdf | 2020-08-31 |
| 17 | 201717042034-AMMENDED DOCUMENTS [21-02-2018(online)].pdf | 2018-02-21 |
| 18 | 201717042034-Amendment Of Application Before Grant - Form 13 [21-02-2018(online)].pdf | 2018-02-21 |
| 18 | 201717042034-FER.pdf | 2020-03-02 |
| 19 | 201717042034-FORM 3 [15-01-2020(online)].pdf | 2020-01-15 |
| 19 | 201717042034-FORM 3 [22-02-2018(online)].pdf | 2018-02-22 |
| 20 | 201717042034-FORM 3 [17-05-2018(online)].pdf | 2018-05-17 |
| 20 | 201717042034-FORM-26 [23-02-2018(online)].pdf | 2018-02-23 |
| 21 | 201717042034-Information under section 8(2) (MANDATORY) [17-05-2018(online)].pdf | 2018-05-17 |
| 21 | 201717042034-Power of Attorney-270218.pdf | 2018-03-13 |
| 22 | 201717042034-Correspondence-270218.pdf | 2018-03-13 |
| 23 | 201717042034-Information under section 8(2) (MANDATORY) [17-05-2018(online)].pdf | 2018-05-17 |
| 23 | 201717042034-Power of Attorney-270218.pdf | 2018-03-13 |
| 24 | 201717042034-FORM-26 [23-02-2018(online)].pdf | 2018-02-23 |
| 24 | 201717042034-FORM 3 [17-05-2018(online)].pdf | 2018-05-17 |
| 25 | 201717042034-FORM 3 [22-02-2018(online)].pdf | 2018-02-22 |
| 25 | 201717042034-FORM 3 [15-01-2020(online)].pdf | 2020-01-15 |
| 26 | 201717042034-Amendment Of Application Before Grant - Form 13 [21-02-2018(online)].pdf | 2018-02-21 |
| 26 | 201717042034-FER.pdf | 2020-03-02 |
| 27 | 201717042034-AMMENDED DOCUMENTS [21-02-2018(online)].pdf | 2018-02-21 |
| 27 | 201717042034-FORM 4(ii) [31-08-2020(online)].pdf | 2020-08-31 |
| 28 | 201717042034-Annexure [21-02-2018(online)].pdf | 2018-02-21 |
| 28 | 201717042034-OTHERS [02-12-2020(online)].pdf | 2020-12-02 |
| 29 | 201717042034-FORM 3 [02-12-2020(online)].pdf | 2020-12-02 |
| 29 | 201717042034-MARKED COPIES OF AMENDEMENTS [21-02-2018(online)].pdf | 2018-02-21 |
| 30 | 201717042034-FER_SER_REPLY [02-12-2020(online)].pdf | 2020-12-02 |
| 30 | abstract.jpg | 2018-01-18 |
| 31 | 201717042034-Correspondence-030118.pdf | 2018-01-08 |
| 31 | 201717042034-DRAWING [02-12-2020(online)].pdf | 2020-12-02 |
| 32 | 201717042034-COMPLETE SPECIFICATION [02-12-2020(online)].pdf | 2020-12-02 |
| 32 | 201717042034-OTHERS-030118.pdf | 2018-01-08 |
| 33 | 201717042034-CLAIMS [02-12-2020(online)].pdf | 2020-12-02 |
| 33 | 201717042034-Proof of Right (MANDATORY) [29-12-2017(online)].pdf | 2017-12-29 |
| 34 | 201717042034-Information under section 8(2) [25-01-2021(online)].pdf | 2021-01-25 |
| 34 | 201717042034.pdf | 2017-11-25 |
| 35 | 201717042034-COMPLETE SPECIFICATION [23-11-2017(online)].pdf | 2017-11-23 |
| 35 | 201717042034-FORM 3 [25-01-2021(online)].pdf | 2021-01-25 |
| 36 | 201717042034-FORM 3 [14-02-2023(online)].pdf | 2023-02-14 |
| 36 | 201717042034-DECLARATION OF INVENTORSHIP (FORM 5) [23-11-2017(online)].pdf | 2017-11-23 |
| 37 | 201717042034-US(14)-HearingNotice-(HearingDate-29-11-2023).pdf | 2023-11-09 |
| 37 | 201717042034-DRAWINGS [23-11-2017(online)].pdf | 2017-11-23 |
| 38 | 201717042034-FORM-26 [24-11-2023(online)].pdf | 2023-11-24 |
| 38 | 201717042034-FORM 1 [23-11-2017(online)].pdf | 2017-11-23 |
| 39 | 201717042034-FORM 18 [23-11-2017(online)].pdf | 2017-11-23 |
| 39 | 201717042034-Correspondence to notify the Controller [24-11-2023(online)].pdf | 2023-11-24 |
| 40 | 201717042034-Written submissions and relevant documents [14-12-2023(online)].pdf | 2023-12-14 |
| 40 | 201717042034-PRIORITY DOCUMENTS [23-11-2017(online)].pdf | 2017-11-23 |
| 41 | 201717042034-REQUEST FOR EXAMINATION (FORM-18) [23-11-2017(online)].pdf | 2017-11-23 |
| 41 | 201717042034-PETITION UNDER RULE 137 [14-12-2023(online)].pdf | 2023-12-14 |
| 42 | 201717042034-PatentCertificate08-02-2024.pdf | 2024-02-08 |
| 42 | 201717042034-STATEMENT OF UNDERTAKING (FORM 3) [23-11-2017(online)].pdf | 2017-11-23 |
| 43 | 201717042034-IntimationOfGrant08-02-2024.pdf | 2024-02-08 |
| 43 | 201717042034-TRANSLATIOIN OF PRIOIRTY DOCUMENTS ETC. [23-11-2017(online)].pdf | 2017-11-23 |
| 1 | searchstrtaegy_04-02-2020.pdf |