TECHNICAL FIELD
[001] The present disclosure relates to the field of learning and verification of logic
circuit designs. More particularly, the present disclosure relates to an augmented reality (AR)
based learning system for verifying Karnaugh map (K-map) based logic circuit designs
automatically.
BACKGROUND
[002] Background description includes information that may be useful in
understanding the present invention. It is not an admission that any of the information
provided herein is prior art or relevant to the presently claimed invention, or that any
publication specifically or implicitly referenced is prior art.
[003] Typically, Boolean algebraic simplification is an integral part of the design
and analysis of any digital electronic system. Therefore, K-maps can be implemented as an
efficient graphical technique for a simplified logic design. The K-maps are implemented by
taking advantage of human pattern recognition capability. The K-maps are used for
minimizing Boolean expressions of any circuit design quickly and easily without
implementing any Boolean algorithms. The K-map has one or more square cells, and each
cell can have a weight value based on gray coding. The K-maps can take either sum of
product terms (min-terms) or product of sum terms (max-terms) that are derived from input
logical expressions of the circuit designs. The K-map is a table kind of representation and it
can provide more information than that of truth table. Typically, the solving of K-map is done
by providing ones or zeros to each of the blocks or cells of the table based on the input minterms
or max-terms respectively.
[004] Then, one or more ones or zeros can be paired as rectangular or square groups
in order to minimize the logical expression or equation corresponding to the input min-terms
or max-terms. The minimized logical expression or equation obtained by K-maps helps in
reducing number of components such as gates, inputs, circuits etc. and corresponding costs
associated with them. The minimized logical expressions obtained by K-maps are simpler,
and less error-prone.
[005] Traditionally, many teachers follow the traditional method of teaching where
they use the approach of “chalk and talk”. However, students may lose interest and feel bored
2
if the teaching of a particular topic continues for more than few minutes. Further, it is
difficult for teachers as well to reach out to each student for identifying whether he/she is
learning or not. These above-mentioned drawbacks are applied to learning and teaching of Kmaps
as well. The results of K-maps obtained by each student can be different, and the
teacher may take a lot of time in analyzing and verifying results for each student individually
as correct or wrong. Therefore, there is a requirement of automatic checking of the K-maps
and K-maps based circuit logic design implementation etc. This may reduce burden on the
teacher and save time for checking K-maps and K-map based circuit designs.
[006] Efforts have been made in the related art to provide systems and methods for
providing automatic checking of K-maps. Most of the traditional systems and methods that
are available to check the circuit designs are not implemented for K-maps and K-map based
circuit designs. The traditional techniques implemented cloud-based computing in order to
check the circuit designs.
[007] However, the cloud-based techniques are not able to save time and are not able
to provide security. If the internet is slow or not working, then these techniques cannot be
implemented. The teacher’s interaction may also be present in the cloud-based techniques as
cloud-based techniques may not be able to verify automatically. The cloud-based techniques
are not able to provide active and interactive learning among the students, and the techniques
are not able to increase attention span of students during learning. The traditional techniques
are not able provide individualized learning to each student separately, not able to foster the
learning process of the students, and not able to develop creativity and curiosity among the
students.
[008] Whereas there is certainly nothing wrong with traditional systems or methods,
nonetheless, there is a need in the art to provide an efficient, cost-effective, simple, and
accurate learning system and method to verify K-maps and K-map based logic circuit designs
automatically.
[009] All publications herein are incorporated by reference to the same extent as if
each individual publication or patent application were specifically and individually indicated
to be incorporated by reference. Where a definition or use of a term in an incorporated
reference is inconsistent or contrary to the definition of that term provided herein, the
definition of that term provided herein applies and the definition of that term in the reference
does not apply.
[0010] In some embodiments, the numbers expressing quantities or dimensions of
items, and so forth, used to describe and claim certain embodiments of the invention are to be
3
understood as being modified in some instances by the term “about.” Accordingly, in some
embodiments, the numerical parameters set forth in the written description and attached
claims are approximations that can vary depending upon the desired properties sought to be
obtained by a particular embodiment. In some embodiments, the numerical parameters should
be construed in light of the number of reported significant digits and by applying ordinary
rounding techniques. Notwithstanding that the numerical ranges and parameters setting forth
the broad scope of some embodiments of the invention are approximations, the numerical
values set forth in the specific examples are reported as precisely as practicable. The
numerical values presented in some embodiments of the invention may contain certain errors
necessarily resulting from the standard deviation found in their respective testing
measurements.
[0011] As used in the description herein and throughout the claims that follow, the
meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates
otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on”
unless the context clearly dictates otherwise.
[0012] The recitation of ranges of values herein is merely intended to serve as a
shorthand method of referring individually to each separate value falling within the range.
Unless otherwise indicated herein, each individual value is incorporated into the specification
as if it were individually recited herein. All methods described herein can be performed in
any suitable order unless otherwise indicated herein or otherwise clearly contradicted by
context. The use of any and all examples, or exemplary language (e.g. “such as”) provided
with respect to certain embodiments herein is intended merely to better illuminate the
invention and does not pose a limitation on the scope of the invention otherwise claimed. No
language in the specification should be construed as indicating any non-claimed element
essential to the practice of the invention.
[0013] Groupings of alternative elements or embodiments of the invention disclosed
herein are not to be construed as limitations. Each group member can be referred to and
claimed individually or in any combination with other members of the group or other
elements found herein. One or more members of a group can be included in, or deleted from,
a group for reasons of convenience and/or patentability. When any such inclusion or deletion
occurs, the specification is herein deemed to contain the group as modified thus fulfilling the
written description of all groups used in the appended claims.
4
OBJECTS OF THE PRESENT DISCLOSURE
[0014] Some of the objects of the present disclosure, which at least one embodiment
herein satisfies are as listed herein below.
[0015] It is an object of the present disclosure to provide a learning system and
method for K-map based logic circuit designs.
[0016] It is another object of the present disclosure to provide an augmented realitybased
learning system and method for guiding and verifying K-maps and K-map based logic
circuit designs.
[0017] It is another object of the present disclosure to provide an augmented realitybased
learning system and method for guiding and verifying K-maps and K-map based
minimized logic circuit designs automatically.
[0018] It is another object of the present disclosure to provide a simple and costeffective
augmented reality-based learning system and method for guiding and verifying Kmaps
and K-map based minimized logic circuit designs.
[0019] It is another object of the present disclosure to provide a precise and timeefficient
augmented reality-based learning system and method for guiding and verifying Kmaps
and K-map based minimized logic circuit designs to enable interactive and enhanced
learning among users.
[0020] It is another object of the present disclosure to provide an augmented realitybased
digital learning system and method for guiding and verifying K-maps and K-map based
minimized logic circuit designs in real-time to enable individualized and creative learning
among users.
SUMMARY
[0021] The present disclosure relates to the field of learning and verification of logic
circuit designs. More particularly, the present disclosure relates to an AR based learning
system for verifying Karnaugh map (K-map) based logic circuit designs automatically.
[0022] This summary is provided to introduce simplified concepts of a system for
time bound availability check of an entity, which are further described below in the detailed
description. This summary is not intended to identify key or essential features of the claimed
subject matter, nor is it intended for use in determining/limiting the scope of the claimed
subject matter.
[0023] An aspect of the present disclosure pertains to a learning system for Karnaugh
map (K-map) based logic circuit designs. The system can include: an input unit configured to
5
generate an input data corresponding to K-maps; and at least one computing device
associated with at least one user can be operatively coupled to the input unit. The at least one
computing device can be configured to: display, on a display unit of the at least one
computing device, the generated input information to allow the at least one user to analyze
the displayed input information and to adjust positions of a plurality of markers in a marker
region corresponding to the K-maps. The system can also include a control unit operatively
coupled to the at least one computing device, and the control unit can include one or more
processors, the one or more processors coupled with a memory, the memory storing
computer-implemented instructions which when executed by the one or more processors to:
scan, using a scanning device operatively coupled to the control unit, the adjusted positions of
the plurality of markers, and generate a scanned image based on scanning of the adjusted
positions; and display, using the display unit, the scanned image to allow the at least one user
to mark pairs of K-maps of the scanned image on the display unit.
[0024] In an aspect, the control unit can be configured to: identify the marked pairs of
K-maps as either correct or wrong, and generate a first data based on identification; and
display the generated first data on the display unit of the at least one computing device
associated with the at least one user.
[0025] In another aspect, when the generated first data corresponding to the marked
pairs of K-maps is correct, the at least one computing device can be configured to allow at
least one user to write at least one minimized logic equation in a dialog box of the display
unit based on the marked pairs of K-maps. The control unit can be configured to: identify the
written at least one minimized logic equation as either correct or wrong, and generate second
data based on identification; and display the generated second data on the display unit of the
at least one computing device.
[0026] In another aspect, when the generated second data is correct, the control unit
can be configured to: display at least one predefined AND-OR-Invert (AOI) logic diagram of
the written at least one minimized logic equation on the display unit to allow the at least one
user to design at least one hardware logic circuit corresponding to the written at least one
minimized logic equation on a circuit kit based on the displayed at least one predefined AOI
logic diagram; and send an output of the designed at least one hardware logic circuit to the at
least one computing device.
[0027] In another aspect, the at least one computing device installed with a unity
application can be configured to: receive the sent output; compare the received output with a
predefined correct output of the corresponding at least one predefined AOI logic diagram;
6
identify the output of the designed at least one hardware logic circuit as either correct or
wrong based on the comparison; and generate a third data based on identification. The
predefined correct output and the corresponding at least one predefined AOI logic diagram
can be stored in a database operatively coupled to the at least one computing device. Further,
the at least one computing device can be configured to display the generated third data on the
display unit.
[0028] In another aspect, the input unit can be selected from any or a combination of
laptop, personal computer (PC), personal digital assistant (PDA) and smart phone.
[0029] In yet another aspect, the circuit kit can be breadboard, printed circuit board
etc. The at least one second user can be one or more students. The input data can be truth
table data, problem-statement data or any other data corresponding to the K-maps based logic
design. The learning system is an augmented reality (AR) based learning system.
[0030] Another aspect of the present disclosure pertains to a learning method for
Karnaugh map (K-map) based logic circuit designs. The method can include steps of:
generating, by an input unit, an input data corresponding to K-maps; displaying, on a display
unit of at least one computing device associated with at least one user, the generated input
information to allow the at least one user to analyze the displayed input information and to
adjust positions of a plurality of markers in a marker region corresponding to the K-maps;
scanning, by a scanning device operatively coupled to a control unit, the adjusted positions of
the plurality of markers, and generate a scanned image based on scanning of the adjusted
positions; displaying, by the control unit, the scanned image on the display unit, and allow the
at least one user to mark pairs of K-maps of the scanned image on the display unit.
[0031] In an aspect, the method can include steps of: identifying, by the control unit,
the marked pairs of K-maps as either correct or wrong, and generate a first data based on
identification; and displaying, by the control unit, the generated first data on the display unit
of the at least one computing device.
[0032] In another aspect, when the determined first data corresponding to the marked
pairs of K-maps is correct, the method can include steps of: allowing, by the at least one
computing device, the at least one user to write at least one minimized logic equation in a
dialog box of the display unit of the at least one computing device based on the marked pairs
of K-maps; identifying, by the control unit, the written at least one minimized logic equation
as either correct or wrong, and generate second data based on identification; and displaying,
by the control unit, the generated second data on the display unit of the at least one
computing device.
7
[0033] In another aspect, when the determined second data is correct, the method can
include steps of: displaying, by the control unit, at least one predefined AND-OR-Invert
(AOI) logic diagram of the written at least one minimized logic equation on the display unit
to allow the at least one user to design at least one hardware logic circuit corresponding to the
written at least one minimized logic equation on a circuit kit based on the displayed at least
one predefined AOI logic diagram; and sending, by the control unit, an output of the designed
at least one hardware logic circuit to the at least one computing device.
[0034] In another aspect, the method can further include steps of: receiving, by the at
least one computing device installed with a unity application, the sent output; comparing, by
the at least one computing device, the received output with a predefined correct output of the
corresponding at least one predefined AOI logic diagram; identifying, by the at least one
computing device, the output of the designed at least one hardware logic circuit as either
correct or wrong based on the comparison; generating, by the at least one computing device,
a third data based on identification, wherein the predefined correct output and the
corresponding at least one predefined AOI logic diagram are stored in a database operatively
coupled to the at least one computing device; and displaying, on the display unit, the
generated third data.
[0035] In an embodiment, the system within the scope of this application it is
expressly envisaged that the various aspects, embodiments, examples and alternatives set out
in the preceding paragraphs, in the claims and/or in the following description and drawings,
and in particular the individual features thereof, may be taken independently or in any
combination. Features described in connection with one embodiment are applicable to all
embodiments, unless such features are incompatible.
[0036] Various objects, features, aspects and advantages of the inventive subject
matter will become more apparent from the following detailed description of preferred
embodiments, along with the accompanying drawing figures in which like numerals represent
like components
BRIEF DESCRIPTION OF THE DRAWINGS
[0037] The diagrams are for illustration only, which thus is not a limitation of the
present disclosure, and wherein:
[0038] FIG. 1 illustrates an exemplary module representation of learning system for
K-map based logic designs in accordance with an embodiment of the present disclosure.
8
[0039] FIG. 2 illustrates an exemplary flow diagram representation of learning
method for K-map based logic designs in accordance with an embodiment of the present
disclosure.
[0040] FIG. 3 illustrates an exemplary block diagram representation of augmented
reality based digital learning system for Karnaugh map (K-Map) logical designs in
accordance with an embodiment of the present disclosure.
DETAILED DESCRIPTION
[0041] The following is a detailed description of embodiments of the disclosure
depicted in the accompanying drawings. The embodiments are in such detail as to clearly
communicate the disclosure. However, the amount of detail offered is not intended to limit
the anticipated variations of embodiments; on the contrary, the intention is to cover all
modifications, equivalents, and alternatives falling within the spirit and scope of the present
disclosure as defined by the appended claims.
[0042] In the following description, numerous specific details are set forth in order to
provide a thorough understanding of embodiments of the present invention. It will be
apparent to one skilled in the art that embodiments of the present invention may be practiced
without some of these specific details.
[0043] Embodiments of the present invention include various steps, which will be
described below. The steps may be performed by hardware components or may be embodied
in machine-executable instructions, which may be used to cause a general-purpose or specialpurpose
processor programmed with the instructions to perform the steps. Alternatively, steps
may be performed by a combination of hardware, software, and firmware and/or by human
operators.
[0044] Various methods described herein may be practiced by combining one or more
machine-readable storage media containing the code according to the present invention with
appropriate standard computer hardware to execute the code contained therein. An apparatus
for practicing various embodiments of the present invention may involve one or more
computers (or one or more processors within a single computer) and storage systems
containing or having network access to computer program(s) coded in accordance with
various methods described herein, and the method steps of the invention could be
accomplished by modules, routines, subroutines, or subparts of a computer program product.
9
[0045] If the specification states a component or feature “may”, “can”, “could”, or
“might” be included or have a characteristic, that particular component or feature is not
required to be included or have the characteristic.
[0046] As used in the description herein and throughout the claims that follow, the
meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates
otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on”
unless the context clearly dictates otherwise.
[0047] Exemplary embodiments will now be described more fully hereinafter with
reference to the accompanying drawings, in which exemplary embodiments are shown. These
exemplary embodiments are provided only for illustrative purposes and so that this disclosure
will be thorough and complete and will fully convey the scope of the invention to those of
ordinary skill in the art. The invention disclosed may, however, be embodied in many
different forms and should not be construed as limited to the embodiments set forth herein.
Various modifications will be readily apparent to persons skilled in the art. The general
principles defined herein may be applied to other embodiments and applications without
departing from the spirit and scope of the invention. Moreover, all statements herein reciting
embodiments of the invention, as well as specific examples thereof, are intended to
encompass both structural and functional equivalents thereof. Additionally, it is intended that
such equivalents include both currently known equivalents as well as equivalents developed
in the future (i.e., any elements developed that perform the same function, regardless of
structure). Also, the terminology and phraseology used is for the purpose of describing
exemplary embodiments and should not be considered limiting. Thus, the present invention is
to be accorded the widest scope encompassing numerous alternatives, modifications and
equivalents consistent with the principles and features disclosed. For purpose of clarity,
details relating to technical material that is known in the technical fields related to the
invention have not been described in detail so as not to unnecessarily obscure the present
invention.
[0048] Thus, for example, it will be appreciated by those of ordinary skill in the art
that the diagrams, schematics, illustrations, and the like represent conceptual views or
processes illustrating systems and methods embodying this invention. The functions of the
various elements shown in the figures may be provided through the use of dedicated
hardware as well as hardware capable of executing associated software. Similarly, any
switches shown in the figures are conceptual only. Their function may be carried out through
the operation of program logic, through dedicated logic, through the interaction of program
10
control and dedicated logic, or even manually, the particular technique being selectable by
the entity implementing this invention. Those of ordinary skill in the art further understand
that the exemplary hardware, software, processes, methods, and/or operating systems
described herein are for illustrative purposes and, thus, are not intended to be limited to any
particular named element.
[0049] Embodiments of the present invention may be provided as a computer program
product, which may include a machine-readable storage medium tangibly embodying thereon
instructions, which may be used to program a computer (or other electronic devices) to
perform a process. The term “machine-readable storage medium” or “computer-readable
storage medium” includes, but is not limited to, fixed (hard) drives, magnetic tape, floppy
diskettes, optical disks, compact disc read-only memories (CD-ROMs), and magneto-optical
disks, semiconductor memories, such as ROMs, PROMs, random access memories (RAMs),
programmable read-only memories (PROMs), erasable PROMs (EPROMs), electrically
erasable PROMs (EEPROMs), flash memory, magnetic or optical cards, or other type of
media/machine-readable medium suitable for storing electronic instructions (e.g., computer
programming code, such as software or firmware).A machine-readable medium may include
a non-transitory medium in which data may be stored and that does not include carrier waves
and/or transitory electronic signals propagating wirelessly or over wired connections.
Examples of a non-transitory medium may include, but are not limited to, a magnetic disk or
tape, optical storage media such as compact disk (CD) or digital versatile disk (DVD), flash
memory, memory or memory devices. A computer-program product may include code and/or
machine-executable instructions that may represent a procedure, a function, a subprogram, a
program, a routine, a subroutine, a module, a software package, a class, or any combination
of instructions, data structures, or program statements. A code segment may be coupled to
another code segment or a hardware circuit by passing and/or receiving information, data,
arguments, parameters, or memory contents. Information, arguments, parameters, data, etc.
may be passed, forwarded, or transmitted via any suitable means including memory sharing,
message passing, token passing, network transmission, etc.
[0050] Furthermore, embodiments may be implemented by hardware, software,
firmware, middleware, microcode, hardware description languages, or any combination
thereof. When implemented in software, firmware, middleware or microcode, the program
code or code segments to perform the necessary tasks (e.g., a computer-program product)
may be stored in a machine-readable medium. A processor(s) may perform the necessary
tasks.
11
[0051] Systems depicted in some of the figures may be provided in various
configurations. In some embodiments, the systems may be configured as a distributed system
where one or more components of the system are distributed across one or more networks in
a cloud computing system.
[0052] Each of the appended claims defines a separate invention, which for
infringement purposes is recognized as including equivalents to the various elements or
limitations specified in the claims. Depending on the context, all references below to the
"invention" may in some cases refer to certain specific embodiments only. In other cases, it
will be recognized that references to the "invention" will refer to subject matter recited in one
or more, but not necessarily all, of the claims.
[0053] All methods described herein may be performed in any suitable order unless
otherwise indicated herein or otherwise clearly contradicted by context. The use of any and
all examples, or exemplary language (e.g., “such as”) provided with respect to certain
embodiments herein is intended merely to better illuminate the invention and does not pose a
limitation on the scope of the invention otherwise claimed. No language in the specification
should be construed as indicating any non-claimed element essential to the practice of the
invention.
[0054] Various terms as used herein are shown below. To the extent a term used in a
claim is not defined below, it should be given the broadest definition persons in the pertinent
art have given that term as reflected in printed publications and issued patents at the time of
filing.
[0055] The present disclosure relates to the field of learning and verification of logic
circuit designs. More particularly, the present disclosure relates to an augmented reality (AR)
based learning system for verifying Karnaugh map (K-map) based logic circuit designs
automatically.
[0056] An aspect of the present disclosure pertains to an augmented reality-based
learning system for Karnaugh map (K-map) based logic circuit designs. The system can
include: an input unit configured to generate an input data corresponding to K-maps. The
system can also include at least one computing device associated with at least one user that
can be operatively coupled to the input unit. The at least one computing device can be
configured to: display, on a display unit of the at least one computing device, the generated
input information to allow the at least one user to analyze the displayed input information and
to adjust positions of a plurality of markers in a marker region corresponding to the K-maps.
The system can also include a control unit operatively coupled to the at least one computing
12
device. The control unit can include one or more processors, the one or more processors
coupled with a memory, the memory storing computer-implemented instructions which when
executed by the one or more processors to: scan, using a scanning device operatively coupled
to the control unit, the adjusted positions of the plurality of markers, and generate a scanned
image based on scanning of the adjusted positions; and display, using the display unit, the
scanned image to allow the at least one user to mark pairs of K-maps of the scanned image on
the display unit.
[0057] In an aspect, the control unit can be configured to: identify the marked pairs of
K-maps as either correct or wrong, and generate a first data based on identification; and
display the generated first data on the display unit of the at least one computing device
associated with the at least one user.
[0058] FIG. 1 illustrates an exemplary module representation of learning system for
K-map based logic designs in accordance with an embodiment of the present disclosure.
[0059] According to an embodiment, the learning system 100 can include one or more
processor(s) 102. The one or more processor(s) 102 can be implemented as one or more
microprocessors, microcomputers, microcontrollers, digital signal processors, central
processing units, logic circuitries, and/or any devices that manipulate data based on
operational instructions. Among other capabilities, the one or more processor(s) 102 are
configured to fetch and execute computer-readable instructions stored in a memory 104 of the
system 100. The memory 104 can store one or more computer-readable instructions or
routines, which can be fetched and executed to create or share the data units over a network
service. The memory 104 can include any non-transitory storage device including, for
example, volatile memory such as RAM, or non-volatile memory such as EPROM, flash
memory, and the like.
[0060] Various components /units of the proposed system 100 can be implemented as
a combination of hardware and programming (for example, programmable instructions) to
implement their one or more functionalities as elaborated further themselves or using
processors 102. In examples described herein, such combinations of hardware and
programming may be implemented in several different ways. For example, the programming
for the units may be processor executable instructions stored on a non-transitory machinereadable
storage medium and the hardware for units may include a processing resource (for
example, one or more processors), to execute such instructions. In the present examples, the
machine-readable storage medium may store instructions that, when executed by the
processing resource, implements the various units. In such examples, the learning system 100
13
may include the machine-readable storage medium storing the instructions and the processing
resource to execute the instructions, or the machine-readable storage medium may be
separate but accessible to system 100 and the processing resource. In other examples, the
units may be implemented by electronic circuitry. A database 118 may include data that is
either stored or generated as a result of functionalities implemented by any of the other
components /units of the proposed system 100.
[0061] In an embodiment, the learning system 100 can include an input unit 106
configured to generate an input data corresponding to K-maps. The input unit 106 can be
selected from any or a combination of laptops, personal computers (PC), personal digital
assistant (PDA), smart phone etc.
[0062] In an exemplary embodiment, the learning system 100 is an augmented reality
(AR) based learning system.
[0063] In an embodiment, the system 100 can include at least one computing device
108 associated with at least one user can be operatively coupled to the input unit 106. The at
least one computing device 108 can be configured to: display, on a display unit 110 of the at
least one computing device 108, the generated input information to allow the at least one user
to analyze the displayed input information and to adjust positions of a plurality of markers in
a marker region corresponding to the K-maps.
[0064] In an exemplary embodiment, the plurality of markers can be physical
markers, AR markers etc.
[0065] In an exemplary embodiment, the input information can be provided the at
least one user directly through paper without using any display unit as well.
[0066] In an exemplary embodiment, the marker region can be a physical region of
interest such as paper etc. In an exemplary embodiment, the marker region can be a virtual
region present on the display unit 110 of the at least one computing device 108.
[0067] In an exemplary embodiment, the system 100 can also be implemented
without any scanning device 114. The positions of plurality of markers can be adjusted on the
display unit 110 directly without using any physical marking region. The marking region can
be present on the display unit 110. The positions of the plurality of markers can also be varied
according to the different input truth tables.
[0068] In an exemplary embodiment, the system 100 can be configured to recognize
positions of 1’s and 0’s (i.e. binary numbers) from the plurality of markers.
[0069] In an exemplary embodiment, the scanning device 114 can be termed as
camera, imaging device, image capturing device, recording device, web camera etc.
14
[0070] In an embodiment, the system 100 can also include a control unit 112
operatively coupled to the at least one computing device 108, and the control unit 112 can
include the one or more processors 102, the one or more processors 102 coupled with a
memory 104, the memory 104 storing computer-implemented instructions which when
executed by the one or more processors 102 to scan, using a scanning device 114 operatively
coupled to the control unit 112, the adjusted positions of the plurality of markers, and
generate a scanned image based on scanning of the adjusted positions. Further, the control
unit 112 can be control the one or more processors 102 to display, using the display unit 110,
the scanned image to allow the at least one user to mark pairs of K-maps of the scanned
image on the display unit 110.
[0071] In an embodiment, the control unit 112 can be configured to: identify the
marked pairs of K-maps as either correct or wrong, and generate a first data based on
identification; and display the generated first data on the display unit 110 of the at least one
computing device 108 associated with the at least one user.
[0072] In an embodiment, when the generated first data corresponding to the marked
pairs of K-maps is correct, the at least one computing device 108 can be configured to allow
at least one user to write at least one minimized logic equation in a dialog box of the display
unit 110 based on the marked pairs of K-maps. The control unit 112 can be configured to:
identify the written at least one minimized logic equation as either correct or wrong, and
generate second data based on identification; and display the generated second data on the
display unit 110 of the at least one computing device 108.
[0073] In an embodiment, when the generated second data is correct, the control unit
112 can be configured to: display at least one predefined AND-OR-Invert (AOI) logic
diagram of the written at least one minimized logic equation on the display unit 110 to allow
the at least one user to design at least one hardware logic circuit corresponding to the written
at least one minimized logic equation on a circuit kit 116 based on the displayed at least one
predefined AOI logic diagram; and send an output of the designed at least one hardware logic
circuit to the at least one computing device 108.
[0074] In an exemplary embodiment, the circuit kit 116 can be breadboard, printed
circuit board (PCB) etc. In an exemplary embodiment, the at least one hardware logic circuit
can be designed by using different integrated circuits (ICs) from a component rack.
[0075] In an embodiment, the at least one computing device 108 installed with a unity
application can be configured to: receive the sent output; compare the received output with a
predefined correct output of the corresponding at least one predefined AOI logic diagram;
15
identify the output of the designed at least one hardware logic circuit as either correct or
wrong based on the comparison; and generate a third data based on identification. The
predefined correct output and the corresponding at least one predefined AOI logic diagram
can be stored in the database 118 operatively coupled to the at least one computing device
108. Further, the at least one computing device 108 can be configured to display the
generated third data on the display unit 110.
[0076] In an exemplary embodiment, the at least one first user can be one or more
students. The input data can be truth table data, problem-statement data or any other data
corresponding to the K-maps based logic design.
[0077] In an exemplary embodiment, a computing device associated with a second
user can provide the input data. The second user can be a teacher corresponding to the
students. The computing device can provide input information to the students through online
platforms such as chalk-pad, canvas, add tutorial etc. that may run on the computing device.
[0078] It would be appreciated that although the proposed learning system 100 has
been elaborated as above to include all the main units, it is conceivable that actual
implementations are well within the scope of the present disclosure, which can include
without any limitation, only a part of the proposed units or a combination of those or a
division of those into sub-units in various combinations across multiple devices that can be
operatively coupled with each other, including in the cloud. Further, the units can be
configured in any sequence to achieve objectives elaborated. Also, it can be appreciated that
proposed system 100 can be configured in a computing device or across a plurality of
computing devices operatively connected with each other, wherein the computing devices can
be any of a computer, a laptop, a smart phone, an Internet enabled mobile device and the like.
Therefore, all possible modifications, implementations and embodiments of where and how
the proposed learning system 100 is configured are well within the scope of the present
invention.
[0079] FIG. 2 illustrates an exemplary flow diagram representation of learning
method for K-map based logic designs in accordance with an embodiment of the present
disclosure.
[0080] In an aspect, the method 200 as elaborated hereunder can be described in
general context of computer executable instructions. Generally, computer executable
instructions can include routines, programs, objects, components, data structures, procedures,
modules, functions, etc., that perform particular functions or implement particular abstract
data types. The method 200 can also be practiced in a distributed computing environment
16
where functions are performed by remote processing devices that are linked through a
communications network. In a distributed computing environment, computer executable
instructions may be located in both local and remote computer storage media, including
memory storage devices.
[0081] According to an embodiment, the method 200 can include a step of: at a step
202, generating, by an input unit, an input data corresponding to K-maps.
[0082] In an embodiment, the method 200 can include at a step 204, displaying, on a
display unit of at least one computing device associated with at least one user, the generated
input information to allow the at least one user to analyze the displayed input information and
to adjust positions of a plurality of markers in a marker region corresponding to the K-maps.
[0083] In an embodiment, the method 200 can include at a step 206, scanning, by a
scanning device operatively coupled to a control unit, the adjusted positions of the plurality
of markers, and generate a scanned image based on scanning of the adjusted positions.
[0084] In an embodiment, the method 200 can include at a step 208, displaying, by
the control unit, the scanned image on the display unit to allow the at least one user to mark
pairs of K-maps of the scanned image on the display unit.
[0085] In an embodiment, the method 200 can include at a step 210, identifying, by
the control unit, the marked pairs of K-maps as either correct or wrong, and generate a first
data based on identification.
[0086] In an embodiment, the method 200 can include at a step 212, displaying, by
the control unit, the generated first data on the display unit of the at least one computing
device associated with the at least one user.
[0087] In an embodiment, when the determined first data corresponding to the marked
pairs of K-maps is correct, the method 200 can include steps of: allowing, by the at least one
computing device, the at least one user to write at least one minimized logic equation in a
dialog box of the display unit of the at least one computing device based on the marked pairs
of K-maps; identifying, by the control unit, the written at least one minimized logic equation
as either correct or wrong, and generate second data based on identification; and displaying,
by the control unit, the generated second data on the display unit of the at least one
computing device associated with the at least one user.
[0088] In an embodiment, when the determined second data is correct, the method
200 can include steps of: displaying, by the control unit, at least one predefined AND-ORInvert
(AOI) logic diagram of the written at least one minimized logic equation on the display
unit to allow the at least one user to design at least one hardware logic circuit corresponding
17
to the written at least one minimized logic equation on a circuit kit based on the displayed at
least one predefined AOI logic diagram; and sending, by the control unit, an output of the
designed at least one hardware logic circuit to the at least one computing device.
[0089] In an embodiment, the method 200 can further include steps of: receiving, by
the at least one computing device installed with a unity application, the sent output;
comparing, by the at least one computing device, the received output with a predefined
correct output of the corresponding at least one predefined AOI logic diagram; identifying, by
the at least one computing device, the output of the designed at least one hardware logic
circuit as either correct or wrong based on the comparison; generating, by the at least one
computing device, a third data based on identification, wherein the predefined correct output
and the corresponding at least one predefined AOI logic diagram are stored in a database
operatively coupled to the at least one computing device; and displaying, on the display unit,
the generated third data.
[0090] FIG. 3 illustrates an exemplary block diagram representation of augmented
reality based digital learning system for Karnaugh map (K-Map) logical designs in
accordance with an embodiment of the present disclosure.
[0091] In an embodiment, a teacher can operate a computing device post the problem
statement information (truth table etc. information) to screens of respective computing
devices associated with the students. The students can analyze the position of markers, and
accordingly the students can adjust or set the positions of markers on a marker region or area.
[0092] In an embodiment, the scanner or camera can be configured to scan the
position of markers on the marker region, and the scanned images can be appeared on the
display screens of respective computing devices associated with all the students.
[0093] In an embodiment, after receiving the scanned images on the display screens,
the students can be allowed to mark pairs of one or more k-maps. If the students form the
correct pair, then a right or correct message can be appeared on the display screens or vice
versa of the corresponding students.
[0094] In an embodiment, after forming the correct pairs, a dialog box can be
appeared on the display screens of corresponding students. The respective students whose
marked pairs are right can be allowed to write minimized logic expressions or equations of
the already marked or formed correct pairs.
[0095] In an embodiment, if the students write a correct equation, then a right or
correct message can be appeared on the display screens of the corresponding students. If the
18
students write wrong equations, then a wrong message can be displayed or appeared on the
display screens of the corresponding students.
[0096] In an embodiment, if the equations written by the students are correct, then one
or more AND-OR-Invert (AOI) logic diagrams of the written equations along with their
internal IC diagrams can be appeared on the display screens of the corresponding students
automatically.
[0097] In an embodiment, the students, whose written equations are correct, can be
allowed to design the logic circuit or hardware on a circuit kit corresponding to the correct
written equation by using different integrate circuit (IC) components from a component rack.
In an exemplary embodiment, the circuit kit can be printed circuit board, bread board etc.
[0098] In an embodiment, the output of the logic circuit can be sent to a unity
application through Arduino microcontroller or any other microcontroller, Bluetooth plug-in
etc. In an exemplary embodiment, the output can be sent to the unity application by using any
other communication interface as well. In an exemplary embodiment, the unity application
can be installed in any computing device for its functioning and control.
[0099] In an exemplary embodiment, the unity application can be replaced by any
other application programmable interface (API), user interface etc.
[00100] In an embodiment, the unity application can map the received signal from the
logic circuit or hardware with AOI logic and display final answer on the display units or
screens of the corresponding students as correct or incorrect. In this way, the AR based
digital learning system can help students or any other learners in enhancing learning of Kmaps
and logic circuit designs in real-time by implementing software simulation and
verifying hardware design. The display units or screens of the corresponding students as
correct or incorrect. In this way, the AR based digital learning system also guides students in
each step of implementing K-maps and hardware designs.
[00101] Thus, it will be appreciated by those of ordinary skill in the art that the
diagrams, schematics, illustrations, and the like represent conceptual views or processes
illustrating systems and methods embodying this invention. The functions of the various
elements shown in the figures may be provided through the use of dedicated hardware as well
as hardware capable of executing associated software. Similarly, any switches shown in the
figures are conceptual only. Their function may be carried out through the operation of
program logic, through dedicated logic, through the interaction of program control and
dedicated logic, or even manually, the particular technique being selectable by the entity
implementing this invention. Those of ordinary skill in the art further understand that the
19
exemplary hardware, software, processes, methods, and/or operating systems described
herein are for illustrative purposes and, thus, are not intended to be limited to any particular
named.
[00102] While embodiments of the present invention have been illustrated and
described, it will be clear that the invention is not limited to these embodiments only.
Numerous modifications, changes, variations, substitutions, and equivalents will be apparent
to those skilled in the art, without departing from the spirit and scope of the invention, as
described in the claim.
[00103] In the foregoing description, numerous details are set forth. It will be apparent,
however, to one of ordinary skill in the art having the benefit of this disclosure, that the
present invention may be practiced without these specific details. In some instances, wellknown
structures and devices are shown in block diagram form, rather than in detail, to avoid
obscuring the present invention.
[00104] As used herein, and unless the context dictates otherwise, the term "coupled
to" is intended to include both direct coupling (in which two elements that are coupled to
each other contact each other) and indirect coupling (in which at least one additional element
is located between the two elements). Therefore, the terms "coupled to" and "coupled with"
are used synonymously. Within the context of this document terms "coupled to" and "coupled
with" are also used euphemistically to mean “communicatively coupled with” over a
network, where two or more devices are able to exchange data with each other over the
network, possibly via one or more intermediary device.
[00105] It should be apparent to those skilled in the art that many more modifications
besides those already described are possible without departing from the inventive concepts
herein. The inventive subject matter, therefore, is not to be restricted except in the spirit of
the appended claims. Moreover, in interpreting both the specification and the claims, all
terms should be interpreted in the broadest possible manner consistent with the context. In
particular, the terms “comprises” and “comprising” should be interpreted as referring to
elements, components, or steps in a non-exclusive manner, indicating that the referenced
elements, components, or steps may be present, or utilized, or combined with other elements,
components, or steps that are not expressly referenced. Where the specification claims refers
to at least one of something selected from the group consisting of A, B, C …. and N, the text
should be interpreted as requiring only one element from the group, not A plus N, or B plus
N, etc.
20
[00106] While the foregoing describes various embodiments of the invention, other and
further embodiments of the invention may be devised without departing from the basic scope
thereof. The scope of the invention is determined by the claims that follow. The invention is
not limited to the described embodiments, versions or examples, which are included to enable
a person having ordinary skill in the art to make and use the invention when combined with
information and knowledge available to the person having ordinary skillin the art.
ADVANTAGES OF THE PRESENT DISCLOSURE
[00107] The present disclosure provides a learning system and method for K-map
based logic circuit designs.
[00108] The present disclosure provides an augmented reality-based learning system
and method for guiding and verifying K-maps and K-map based logic circuit designs.
[00109] The present disclosure provides an augmented reality-based learning system
and method for guiding and verifying K-maps and K-map based minimized logic circuit
designs automatically.
[00110] The present disclosure provides a simple and cost-effective augmented realitybased
learning system and method for guiding and verifying K-maps and K-map based
minimized logic circuit designs.
[00111] The present disclosure provides a precise and time-efficient augmented realitybased
learning system and method for guiding and verifying K-maps and K-map based
minimized logic circuit designs to enable interactive and enhanced learning among users.
[00112] The present disclosure provides an augmented reality-based digital learning
system and method for guiding and verifying K-maps and K-map based minimized logic
circuit designs in real-time to enable individualized and creative learning among users.

We Claim:
1. A learning system 100 for Karnaugh maps (K-maps), the system 100 comprising:
an input unit configured to generate an input data corresponding to the K-maps;
at least one computing device associated with at least one user is operatively
coupled to the input unit, and the at least one computing device is configured to:
display, on a display unit of the at least one computing device, the generated input
information to allow the at least one user to analyze the displayed input information and
to adjust positions of a plurality of markers in a marker region corresponding to the Kmaps;
and
a control unit operatively coupled to the at least one computing device, and the
control unit comprising one or more processors, the one or more processors coupled
with a memory, the memory storing computer-implemented instructions which when
executed by the one or more processors to:
scan, using a scanning device operatively coupled to the control unit, the
adjusted positions of the plurality of markers, and generate a scanned image
based on scanning of the adjusted positions;
display, using the display unit, the scanned image to allow the at least
one user to mark pairs of K-maps of the scanned image on the display unit;
identify the marked pairs of K-maps as either correct or wrong, and
generate a first data based on identification; and
display the generated first data on the display unit of the at least one
computing device.
2. The system 100 as claimed in claim 1, wherein when the generated first data
corresponding to the marked pairs of K-maps is correct, the at least one computing
device is configured to allow at least one user to write at least one minimized logic
equation in a dialog box of the display unit based on the marked pairs of K-maps, and
wherein the control unit is configured to: identify the written at least one minimized logic
equation as either correct or wrong, and generate second data based on identification; and
display the generated second data on the display unit of the at least one computing
device.
3. The system 100 as claimed in claim 2, wherein when the generated second data is
correct, the control unit is configured to: display at least one predefined AND-OR-Invert
(AOI) logic diagram of the written at least one minimized logic equation on the display
22
unit to allow the at least one user to design at least one hardware logic circuit
corresponding to the written at least one minimized logic equation on a circuit kit based
on the displayed at least one predefined AOI logic diagram; and send an output of the
designed at least one hardware logic circuit to the at least one computing device.
4. The system 100 as claimed in claim 3, wherein the at least one computing device
installed with aunity application is configured to: receive the sent output; compare the
received output with a predefined correct output of the corresponding at least one
predefined AOI logic diagram; identify the output of the designed at least one hardware
logic circuit as either correct or wrong based on the comparison; generate a third data
based on identification, wherein the predefined correct output and the corresponding at
least one predefined AOI logic diagram are stored in a database operatively coupled to
the at least one computing device; and display the generated third data on the display
unit.
5. The system 100 as claimed in claim 1, wherein the input unit is selected from any or a
combination of laptop, personal computer (PC), personal digital assistant (PDA) and
smart phone.
6. A learning method 200 for Karnaugh maps (K-maps), the method 200 comprising steps
of:
generating, by an input unit, an input data corresponding to the K-maps;
displaying, on a display unit of at least one computing device associated with at
least one user, the generated input information to allow the at least one user to analyze
the displayed input information and to adjust positions of a plurality of markers in a
marker region corresponding to the K-maps;
scanning, by a scanning device operatively coupled to a control unit, the adjusted
positions of the plurality of markers, and generate a scanned image based on scanning
of the adjusted positions;
displaying, by the control unit, the scanned image on the display unit, and allow
the at least one user to mark pairs of K-maps of the scanned image on the display unit;
identifying, by the control unit, the marked pairs of K-maps as either correct or
wrong, and generate a first data based on identification; and
displaying, by the control unit, the generated first data on the display unit of the at
least one computing device.
7. The method 200 as claimed in claim 6, wherein when the determined first data
corresponding to the marked pairs of K-maps is correct, the method 200 comprises steps
of:
23
allowing, by the at least one computing device, the at least one user to write at
least one minimized logic equation in a dialog box of the display unit of the at least
one computing device based on the marked pairs of K-maps;
identifying, by the control unit, the written at least one minimized logic equation
as either correct or wrong, and generate second data based on identification; and
displaying, by the control unit, the generated second data on the display unit of
the at least one computing device.
8. The method 200 as claimed in claim 7, wherein when the determined second data is
correct, the method 200 comprises steps of:
displaying, by the control unit, at least one predefined AND-OR-Invert (AOI)
logic diagram of the written at least one minimized logic equation on the display unit
to allow the at least one user to design at least one hardware logic circuit
corresponding to the written at least one minimized logic equation on a circuit kit
based on the displayed at least one predefined AOI logic diagram; and
sending, by the control unit, an output of the designed at least one hardware logic
circuit to the at least one computing device.
9. The method 200 as claimed in claim 8, wherein the method 200 comprises steps of:
receiving, by the at least one computing device installed with a unity application,
the sent output;
comparing, by the at least one computing device, the received output with a
predefined correct output of the corresponding at least one predefined AOI logic
diagram; and
identifying, by the at least one computing device, the output of the designed at
least one hardware logic circuit as either correct or wrong based on the comparison;
generating, by the at least one computing device, a third data based on
identification, wherein the predefined correct output and the corresponding at least
one predefined AOI logic diagram are stored in a database operatively coupled to the
at least one computing device; and
displaying, on the display unit, the generated third data