Chip with Power Supply Device
The invention relates to a chip with a power supply device according to the features specified in the preamble of Claim 1.
The electrical voltage supply or current supply for chips, that is, various types of integrated circuits and the like, is typically effected by means of an operating voltage applied by an external power source. External power sources typically are connections to a power grid, or batteries or secondary cells employed in electrical devices.
It is also possible to employ fuel cell systems in place of batteries or secondary cells. Fuel cells typically are composed of a first and a second electrode arrangement, of which one serves as the anode and the other serves as the cathode. A membrane electrode assembly (MEA) with a catalytic capability is located between the two electrode arrangements, which assembly acts as proton-permeable membrane having a catalytic coating. In addition, a fuel cell of this type has a fuel supply device to supply a fuel, typically hydrogen, and a reactant supply device to supply a reactant, typically oxygen. To generate a current, the reactant reacts with protons that come from the fuel and have passed through the membrane. The end product of combustion, typically water, is discharged from the fuel cell arrangement.
Often chips have an integrated circuit to store confidential data. Such confidential data could be, for example, account access information for an account and identification information

for a person. If the chip should fall into unauthorized hands, the fundamental risk exists that the data contained in the chip could be read by an unauthorized person and be misused.
In order to protect a chip against tampering, there exist solutions of at most limited usability - for example, anti-drill-protection films which are integrated into a package of a chip.
One approach is generally known from WO 02/058219 A2 involving an energy storage device, the surface of which is designed to take up the energy of a supplied medium, the energy being stored in an adjacent semiconductor arrangement. The arrangement uses the energy to generate light or electromagnetic radiation. Thus, surface energies are utilized in this arrangement.
The goal of the invention is to provide a chip with a power supply device, wherein the data stored in the chip are better secured, in particular, better secured against unauthorized access.
This goal is achieved by the chip with a power supply device and with a memory for storing confidential data, said chip having the features of Claim 1.
Advantageous embodiments of the invention are related in the subordinate claims.

What is accordingly advantageous is a chip with a memory to store, in particular, confidential data, having a power supply device to apply a voltage and/or a current, and an interface to transfer data from and/or to another device if the power supply device is a component, in particular an integrated component, of the chip. Operationally-relevant components of the chip, such as, for example, the memory with the data, can thus access an independent power supply device which is utilizable to secure the confidential data in the memory.
In a first especially preferred embodiment of this chip, a maintenance voltage is applied to the memory to maintain the data, wherein the data are deleted in the event the maintenance voltage is lost, and wherein the maintenance voltage is supplied, in particular, exclusively by the power supply device. An implementation is advantageously also possible on arrangements having external, that is, nonintegrated, power supply devices. This embodiment has the effect that the data in, for example, a RAM (random access memory) are stored only as long as the voltage supply device is able to supply a sufficient maintenance voltage. As a result, the service life of the confidential data, or the service life of the complete chip is limited, where the time period is predeterminable by appropriately dimensioning the power supply device. A smart card, used, for example, by bank customers in banking transactions, can thus be limited to a maximum duration

of function. Limitation of usability is thus secured not only by an expiration notice printed on the card or a possible locking flag in the central database, by also by a general maximum service life of the chip or the card.
In a second embodiment which is also advantageously combinable with the first embodiment, the chip is designed such that a security wire connects the memory and the power supply device to each other in order to apply the maintenance voltage, where the security wire is arranged continuously in the chip so that the security wire is interrupted if the chip is damaged. Mechanical damage to the chip or to the package of the chip thus causes the security wire to be interrupted, which action results in an immediate interruption of the maintenance voltage. As a result, confidential data in the memory are lost or deleted. The possibility of opening the chip so as to, after exposing the actual integrated circuit, gain direct access to the circuit board conductors is thus excluded.
In a third preferred embodiment, the chip has a security circuit to destroy operationally-critical components of the chip in the event of unauthorized intervention. Here the integrated power supply device preferably provides an operating voltage for the security circuit. Implementation is advantageously also possible on arrangements having external, that is, nonintegrated power supply devices. Combined therewith or alternatively thereto, the chip can also be designed with a security circuit to delete the data in the memory, in particular a ROM (read-only memory), in the event of unauthorized intervention, where the power supply device supplies an operating

voltage for the security circuit. In this embodiment, the chip thus has a security circuit which accesses an independent power supply device. Detaching the chip from a circuit with an external power supply thus does not impede the functionality of the security circuit.
The arrangement, in particular, the security circuit, provides protection of, in particular, encrypted data in the chip, this protection being adaptable to any specific design. In the event of an unauthorized attempt to read the data, the energy on the chip is used to clear the RAMs and/or ROMs. With the RAMs of, for example, the first embodiment, maintenance of the data costs energy such that any loss or switching off of power results in the data being deleted. With ROMs of, for example, the third embodiment, [maintenance of the data costs]1 no energy such that an active deletion is implemented with energy.
The security circuit can be designed with, or also alternatively with, sensors, such as, for example, gas sensors, ultrasound sensors, magnetic field sensors, optical sensors, biosensors, etc., which trigger an alarm or activate another' function of the security circuit if the chip enters an operationally-hostile environment and appropriate triggering criteria for the sensors are met, or alternatively, specified environmental conditions are lost. Thereupon, security-relevant and confidential data on the chip, or even all of the data, are deleted.
In a variant of this third embodiment, the security circuit is designed to monitor an applied operating voltage and deletes the data in the event of any interruption of the operating voltage. Any detachment of the chip from its operating environment thus results, due to the interrup-
added by translator; interpolated from the context.

tion of the operating voltage, in activation of the security circuit which, using an independent power supply device, causes the data in the memory to be deleted.
In yet another variant of the third embodiment, which is also combinable with the previous variant, the security circuit is formed from a barrier for a reactant to operate a fuel cell with a fuel as the power supply device, where any damage to the barrier results in the reactant's being admitted into the fuel cell. In other words, the power supply device is formed from a fuel cell in which a fuel, in particular, hydrogen, is integrated. In order for the fuel cell to supply a voltage for the security circuit, however, it lacks the reactant, for example, oxygen. The barrier can be formed by a separate protective shell around the components of the chip to be secured - in the simplest case, being formed by the package of the chip. Damage to the barrier or to the package results in the admission of air, and thus oxygen, with the result that the fuel cell is activated and a voltage is applied as the deletion voltage to the security circuit.
While the first two embodiments are based on the fundamental principle of providing a separate maintenance voltage to maintain the data in the memory of the chip, the variants of the third embodiment provide a security circuit which actively effects deletion of the data in the memory in response to an unauthorized intervention. The term "memory" is understood here to mean any storing structures.
A chip operated based on the various embodiments advantageously has an operating voltage terminal for the purpose of applying an operating voltage to operate the general functions of

the chip from an external voltage source. This embodiment allows for the provision of an integrated power supply device having only a low capacity since the power-intensive functions for operation of the chip can be supplied by an external voltage source. Using the conventional approach, the operating voltage is supplied, for example, through contacts or inductively. In particular, with this embodiment the use of the power supply device which is integrated in the chip is also advantageous in connection with an emergency power circuit to supply the operating voltage from the power supply device in the event the operating voltage from the external voltage source is lost. As a result, transient disturbances of the external operating voltage, in particular, can be buffered.
In the case of all embodiments, the power supply device is, according to an especially preferred embodiment, a fuel cell with a specified quantity of fuel. The fuel is stored, for example, in a palladium storage unit. The use of a fuel cell offers the advantage that power or capacity losses, due to an increase in storage time, can be lower than with other voltage sources. The specified quantity of fuel is advantageously limited so as to provide only a limited quantity of fuel to supply a quantity of current for a limited service life of the chip or of the memory content. This means that the fuel cell is preferably designed in such a way that replenishment of consumed fuel is impossible. In particular, with the embodiment having a fuel cell as the power supply device to supply a maintenance voltage for confidential data in the memory, the service life

of the complete chip can be set for a specified maximum time span. In the event the maintenance voltage is lost or the unit falls below a minimum required threshold voltage value, the confidential data in the volatile memory is lost.
What is preferred in particular is a chip, in which the data are confidential data, in particular, contains a key or the like required to operate the chip. For example, during fabrication this chip can be provided with a key, for example, a cryptological key or a random number, where this confidential data are required to operate the chip or to utilize any other data stored thereon. In the event of a disturbance of operation or unauthorized access, these confidential data are deleted or overwritten with invalid data so as to make the chip or data stored thereon unusable. With this approach, only the chip knows its key or its corresponding confidential data.
It is also possible for the chip itself to generate its own key which is known to only the chip itself. This generation of such a key preferably occurs by using a random-number generator in the fabrication of the chip, or even at a later point in time. Preferably, the power supply device covers the memory area in which the key is stored, or protects this memory area. What is preferred in particular here is a chip with a random number generator to generate the key which is required to operate the chip and is stored in the memory, in particular, to generate the key during fabrication of, or initial activation of, the chip.

In an especially preferred embodiment, the memory area with the confidential data, in particular, is secured or powered by the power supply device, thus allowing any external batteries or the like for this purpose to be dispensed with. In regard to this embodiment, a variant is also especially preferred which has a fuel cell as the power supply device.
In yet another preferred embodiment, the loading of erroneous data into a memory area can be implemented in the event of an unauthorized access to the memory area or the chip or the like, instead of deleting data or destroying relevant operating components. Any unauthorized reading of these data then results in the unauthorized person's not being able to use these data in any way, or possibly suffering some harm, or also being detectable by appropriate monitoring.
In addition to the possibility of locating the fuel cell as the power supply device next to other components within the package of the chip, an embodiment is especially preferred in which the power supply device is an integral component of the actual memory.
Especially preferred applications are, in particular, identification cards and credit cards with this type of chip which has the memory to store confidential data and the power supply device with a limited amount of current to store the data in the memory for only a limited duration.

In terms of their technical features, the individual exemplary embodiments can also be advantageously combined with each other to form additional embodiments.
The following discussion explains the invention in more detail based on the drawing:
Figure 1 shows a first embodiment of a first example having a chip which has an integrated power supply device;
Figure 2 shows a second embodiment of the first example having in addition a security wire to prevent an unauthorized mechanical access to components within the chip;
Figure 3 shows another embodiment, at the same time a first embodiment of a second example, wherein the chip has. in addition to an integrated power supply device, a security circuit supplied with a voltage by this device; and
Figure 4 shows another embodiment having a security circuit.
Figure 1 is a schematic partial view showing a first simple embodiment of a chip. In regard to the fundamental principle, the example shown illustrates a credit card with an integrated smart card.
In addition to an actual processor C, a power supply device is also integrated in the chip, in particular, a voltage supply device FC. In principle, any voltage supply device analogous to

conventional batteries can be used. What is preferred in particular, however, is a fuel cell FC as the voltage supply device. Voltage supply device FC supplies an operating voltage UB for processor C. Operating voltage UB is applied to processor C through corresponding connection lines between voltage supply device FC and processor C.
Processor C can be any integrated circuit of a type known of itself which in the example shown is connected to an interface K to transfer data to an external device. The interface K shown is formed by a contact field on the surface of the chip or smart card.
A memory M is integrated in the chip to effect the volatile buffering or permanent storage of data. In addition to the integration of memory M in processor C. memory M can also be provided as a separate module along with processor C and voltage supply device FC. Memory M can also be connected directly to voltage supply device FC or designed as a component of its module.
The chip shown offers the advantage of an independent voltage supply for processor C with operating voltage UB from voltage supply device FC integrated in the chip. The operating voltage UB here can be used, in particular, as the maintenance voltage for the data stored in memory M.

For example, a first electrode of fuel cell FC composed of a palladium layer with an area of 1 mm2 and a thickness of 1 um can be saturated with, in particular, hydrogen as the fuel during the fabrication process. The preferred goal of such an arrangement is to make do with this hydrogen, that is, to not provide any additional feed devices for hydrogen or analogous energy carriers. The oxygen supply can be advantageously effected by ambient air. As a result of this one-tune charging with hydrogen, preferably clocked semiconductor circuits can hi this way be supplied using this chip-integrated current source so as to create, for example, a stand-alone microsystem, such as, for example, an alarm system or intelligent highway pavement.
In the example described, a one-time charging of hydrogen can, according to initial calculations and as a function of diffusion conditions for the hydrogen, generate a ten-second current flow with a current strength of several hundred uA. Alternatively, designs can also be provided which allow for replenishing of the hydrogen. Simple semiconductor circuits or a chip can in this way be provided with an integrated current source in order to create an alarm system, for example. As a result, a sufficient quantity of energy is available on the chip to operate a circuit, for example, processor C, or to supply memory M with a maintenance voltage for an extended duration.
This type of integrated fuel cell on the chip thus enables a memory, for example a RAM (direct access/random access memory) and/or a FPGA (field programmable gate array) to be maintained on a chip.

If the data are confidential data and memory M is a volatile memory, the data of which are lost or deleted upon interruption of the maintenance voltage, the additional advantage is provided that damage to the chip in the event of an interruption of operating voltage UB or the maintenance voltage inevitably also results in the loss of the confidential data. Tampering directly with fuel cell FC or in the region of the voltage supply of memory M would thus immediately result in the data's being deleted since the energy for maintenance is not present.
An exemplary chip for digital signal processing (DSP chip) has, for example, a chip size of 225 mm2 for the components to effect digital signal processing, and additionally of about 1 cm2 x 100 um for the fuel cell FC. Given an operating frequency of 13.2 MHz, an operating voltage of 1.0 V, and a power consumption of 29 mW, the estimated stand-by power for a currently available chip would be 350 jiW in the active state. In the inactive, sleep state, the estimated power consumption would be 600 nW. Based on this assumption, fuel cell FC could supply 700 nW of power for a duration of 700 days. In the event the chip is used as a component of a credit card or bank card, confidential data could thus be maintained in memory M over a duration of 700 days. Thereafter the data would be lost due to the lack of a maintenance voltage, and the card with the chip would become unusable for

subsequent use. Loss of a card or destruction of a card effected not on the official expiration date would therefore present only a limited security risk.
Figure 2 shows a second embodiment of a chip having an integrated circuit, for example, an EPROM (erasable programmable read-only memory), and a fuel cell FC as an integrated voltage supply device FC. Conventional contact pins K for a chip, for example, serve as external interface K to transfer data. The EPROM integrated circuit is connected through two additional contact pins to external voltage source ext to supply an operating voltage UB- The interface can also be provided using other approaches known of themselves, for example, in the form of a cable connection or a wireless connection, for example, using the Bluetooth standard or using an inductive interface arrangement.
The chip again has a memory M to store data. In addition to confidential individual data values, data are also understood to mean any other forms of data, including source codes or program codes to operate an integrated circuit or an external device. Memory M has a maintenance voltage terminal for the purpose of applying maintenance voltage UA. Maintenance voltage UA is supplied from integrated voltage supply device FC or fuel cell FC. In addition to, for example, a direct connection of voltage supply device FC and memory M in terms of a voltage pole, the connection of the other voltage pole is effected through a security wire SL. Security wire SL is routed in the form of the finest wire possible on a coiled track along the inside of the package

wall of the chip. Security wire SL is thus arranged and laid out such that any damage to the package inevitably also damages security wire SL, thereby interrupting maintenance voltage UA for memory M. Damage to the package of the chip thus results in an interruption of maintenance voltage UA, and thus inevitably to deletion of the data stored in memory M.
In the embodiment shown, an emergency circuit NS is provided, in addition to the external terminal, to supply operating voltage UB, which circuit has a connection to the internal integrated voltage supply device FC. In the event external operating voltage UB is lost, the operating voltage required to operate the integrated circuit is supplied by integrated voltage supply device FC.
In a third embodiment shown in Figure 3, the chip also has an integrated circuit, provided, for example, as a random access memory RAM. In order to apply an operating voltage UB and to transfer data from and/or to external devices, the chip has one or more corresponding interfaces K. in the form of contact pins! In addition, the chip has voltage supply device FC, again preferably a fuel cell.
To secure data in memory M, the chip has a security circuit or deletion circuit LS. Security circuit LS serves to delete the memory content or data in memory M in the event of an unauthorized intervention. Security circuit LS is connected through corresponding contacts to voltage

supply device FC integrated in the chip in order to enable even data stored permanently in memory M to be deleted in the event of an interruption of operating voltage UB. Voltage supply device FC thus provides a voltage in the form of a deletion voltage ULS to delete any stored data.
Security circuit LS of the embodiment shown by way of example monitors the external operating voltage UB applied to the chip as a deletion criterion. In the event external operating voltage UB is interrupted, or this voltage drops below a specified threshold, security circuit LS is activated to delete the data in memory M. An electromagnetic switch to activate security circuit LS is drawn for purposes of illustration. However, any other, in particular, electronic switching or control mechanisms may also be used.
In this embodiment, the energy of integrated voltage supply device FC is thus used, for example, to conduct small current pulses through the chip or its circuit components in the event an unauthorized access to the chip occurs. The current pulses here are sufficiently strong that the data in memory M of an EPROM integrated programmable circuit is deleted.
It is possible to utilize other criteria in addition to the deletion criterion of lost operating voltage UB. For example, damage to the package of the chip or the effect of an external electromagnetic field can also be employed as the deletion criterion for security circuit LS.

The chip shown also has an internal clock CL, so that any tampering or attempts at tampering can be traced based on the internal clock CL. An internal clock CL can also be used to effect an active deletion after a predetermined time period has elapsed.
While the first two embodiments provide the concept of an internal maintenance voltage UA for memory M as the securing means for the data, the concept of the third embodiment provides that a voltage be supplied from internal voltage supply device FC as the deletion voltage ULS to delete the memory content in the event of an unauthorized intervention. A combination of the two concepts is also possible. In this type of combination, for example, the voltage supplied by internal voltage supply device FC could be supplied both as maintenance voltage UA for memory M as well as a voltage in the form of a deletion voltage ULS for a security circuit to actively delete data in memory M.
Alternatively or in addition to the concept of the third embodiment comprising the application of a voltage in the form of a deletion voltage ULS to delete data in the memory, destruction of the critical components of the chip can also be implemented by the voltage supplied by security circuit LS or by voltage supply device FC. For example, sufficiently strong current pulses can be emitted by voltage supply device FC such that circuit board conductors or integrated circuit structures critical to the function of the chip are permanently destroyed.

In an embodiment illustrated in Figure 4, the chip again has an integrated circuit C. This circuit is connected to external devices through an interface K for the purpose of exchanging data as well as applying an external operating voltage UB. In addition, the chip has a voltage supply device FC in the form of a fuel cell FC. The voltage delivered by fuel cell FC again serves to supply a security circuit LS. Additionally or alternatively, supply voltage ULS can also be used as maintenance voltage UA for an integrated memory M with confidential data.
In the embodiment shown, the arrangement of integrated circuit C and fuel cell FC is surrounded by a gap and attached by a retaining means H to a spatially removed inner wall of the package W. No reactant is located in the gap, that is, for example, no oxygen Oa. A vacuum is preferably present in the gap such that if the package is damaged ambient air abruptly enters the gap at high speed. The ambient air contains the reactant Oa required for the fuel cell. The fuel cell itself has only the fuel, for example, hydrogen H+. Damage to the package thus results in an activation of fuel cell FC which thereupon supplies security circuit LS with the voltage in the form of the deletion voltage ULS and effects a deletion of the data in memory M.
In this concept, a barrier B must therefore be destroyed if the reactant is to be admitted into the fuel cell. Damage to the package or barrier B caused by sheer force or an object G thus results in the deletion of the data in memory M.

A plurality of variants on this embodiment is also possible. In addition to combinations with the above embodiments, these also include separate variants such as a barrier to a reactant reservoir which is similarly integrated within the package of the chip. This embodiment would also result in the deletion of the data in response to damage to the package if the damage to the package were to be effected in a protective atmosphere or within an evacuated space.
What is preferred is the use of the above concepts for the integral supply for circuits, in particular known integrated circuits. For example, the energy can be also used to maintain data on the chip. For example, an 8 Mbit SDRAM from the Hitachi Company requires for this purpose a current of 6 uA given a voltage of 1.2 V. Another example is the DS1374 from MAXIM in which a voltage of 1.3 V and a current of 1 uA are required to maintain the data and to prevent someone from overwriting the internal registers in response to a loss of voltage. Here the energy is supplied externally by a Super-CAP or a battery. Based on the above concepts, the energy could be supplied internally. This DS1374 contains an battery-supported time counter, and alarm function, a programmable square-wave signal transmitter, and a reset input/output function in a 10-pin package. The circuit monitors the applied operating voltage and in the event of a loss of voltage protects the internal registers from being overwritten, executes a processor reset, and switches over to a protective power supply provided by the connected battery so as to prevent

any degradation of the data. In the power-saving mode, the oscillator maintains its function during reduced power consumption. When the operating voltage returns to the normal state, the circuit holds the processor for a subsequent period of tune in the reset state while the operating conditions stabilize. To provide a backup power supply for the circuit from a battery, an optional external maintenance protective circuit is available.
In another circuit DS1672 from MAXIM, a first real-time clock for an extremely low supply voltage is connected to a voltage monitoring means and power failure switch. A counter communicates with the processor through a two-wire interface and counts seconds from which a software algorithm calculates the time of day, date, month, and year. The circuit monitors the supply voltage and in response to a power failure protects the data memory for timing, sends a reset command to the processor, and switches over to the emergency power supply to prevent any loss of data, this power supply in turn being provided by an external battery. In economy mode, the oscillator measures the time even given a significantly reduced supply voltage of 1.3 V and given a power consumption of less than 400 nA.

Claims
1. Chip having
- a memory (M) to store data,
- a power supply device (FC, ext) to apply a voltage and/or a current, and
- an interface (K, ext) to transfer data from and/or to another device,
characterized in that
- the power supply device (FC) is a component of the chip.
2. Chip according to Claim 1, in which
- a maintenance voltage (UA) to maintain the data is applied to the memory (M), wherein the data
are deleted when the maintenance voltage (UA) is lost, and
- the maintenance voltage (UA) is supplied exclusively by the power supply device (FC).

3. Chip according to Claim 2, in which a security wire (SL) connects the memory (M) and the
power supply device (FC), wherein the security wire (SL) is disposed continuously in the chip
such that the security wire (SL) is interrupted if the chip is damaged.
4. Chip according to a foregoing claim, having a security circuit (LS) to destroy operationally
critical components of the chip in the event of an unauthorized intervention, wherein the power
supply device (FC) supplies a voltage for the security circuit.

5. Chip according to a foregoing claim, having a security circuit (LS) to delete the data in the
memory (M) in the event of an unauthorized intervention.
6. Chip according to Claims 4 or 5, in which the power supply device (FC) supplies a voltage
for the security circuit.
7. Chip according to Claims 4, 5, or 6, wherein the security circuit (LS) is designed to moni
tor an applied, in particular, external operating voltage (Ue), and the security circuit (LS) de
stroys the operationally critical components of the chip, or the data in the memory M, when the
operating voltage is interrupted.
8. Chip according to one of Claims 4 to 7, wherein the security circuit (LS) is constructed
from a barrier (B) for a first fuel, in particular, a reactant (02) to operate a fuel cell with another
fuel, in particular, hydrogen (H*), to form the power supply device (FC), and damage to the bar
rier results in the admittance of the first fuel into the fuel cell.
9. Chip according to a foregoing claim, having an operating voltage terminal (ext) for the
application of an operating voltage (Us) to operate functions of the chip from an external voltage
source.

10. Chip according to Claim 9, having an emergency circuit (NS) to supply the operating
voltage (Us) from the power supply device (FC) if the operating voltage (UB) from the external
voltage source is lost.
11. Chip according to a foregoing claim, in which the power supply device (FC) is a fuel cell
with an, in particular, specified quantity of fuel (H+).
12. Chip according to a foregoing claim, in which the power supply device (FC) is a fuel cell
with a limited amount of fuel (H+) to supply a quantity of current for a limited service life of the
chip or of the memory content of the memory (M).

13. Chip according to Claim 8,11, or 12, in which the power supply device (FC) is an inte
gral component of the memory (M).
14. Chip according to a foregoing claim, in which the data are stored in the form of confiden
tial data, in particular, a key for operation of the chip, in the memory (M).
15. Chip according to Claim 14, having a random-number generator to generate a key re
quired for the operation of the chip and stored in the memory (M), in particular, to generate the
key during the fabrication or initial activation of the chip.
16. Chip according to a foregoing claim, having a security circuit (LS) to load erroneous data
into the memory (M) in the event of an unauthorized intervention in the memory or the chip.
17. Chip according to one of Claims 4 to 8, wherein the security circuit (LS) has at least one
sensor to trigger an alarm or to activate another function of the security circuit if the chip comes
into an operationally-hostile environment and/or analogous triggering criteria for the sensors are
met, or required environmental conditions are lost.
18. Identification card, in particular a credit card, with a chip according to a foregoing claim,
having the memory (M) to store the confidential data, and the power supply device (FC) having a
limited quantity of current to store the data in the memory (M) over a limited time span.