Abstract: The present invention provides a combined electronic circuit arrangement for an under voltage release (Uv), an over voltage release (Ov), an external trip arrangement and a shunt release. The circuit having a plurality of diodes, a plurality of zener diodes, a plurality of resistors and a plurality of capacitors. The plurality of diodes is provide for rectification of electric current. The plurality of zener diodes is provide for allowing current to flow in the forward direction. The plurality of resistors implements electrical resistance. The electromagnetic relay detection and control of faults on electrical distribution lines. The plurality of capacitors is provide for storing to store energy in an electric field. The plurality of diodes, plurality of zener diodes, the Electromagnetic relay and the plurality of capacitors are electrically connected to selectively configure the under voltage release (Uv), the over voltage release (Ov), the external trip arrangement and a shunt release.
FORM 2
THE PATENT ACT 1970
&
The Patents Rules, 2003
COMPLETE SPECIFICATION
(See section 10 and rule 13)
1. TITLE OF THE INVENTION:
"Combined Electronic Circuit Arrangement for Under Voltage Release (Uv), Over Voltage Release (Ov) and External Trip Arrangement/ Shunt Release"
2. APPLICANT:
(a) NAME: Larsen & Toubro Limited
(b) NATIONALITY: Indian Company registered under the
provisions of the Companies Act-195 6.
(c) ADDRESS: LARSEN & TOUBRO LIMITED,
L&T House, Ballard Estate, P. 0. Box: 278, Mumbai 400 001, India
3. PREAMBLE TO THE DESCRIPTION:
COMPLETE
The following specification particularly describes the invention and the manner in which it is to be performed.
Combined Electronic Circuit Arrangement for Under Voltage Release (Uv), Over Voltage Release (Ov) and External Trip Arrangement/ Shunt Release
Field of the invention
The present invention relates to a combined electronic circuit arrangement for under voltage release (Uv), over voltage release (Ov) and external trip arrangement/shuni release, more particularly, the present invention relates to a combined electronic circuit arrangement for under voltage release (Uv), over voltage release (Ov) and external trip arrangement/shunt release for domestic as well as for industrial application.
Background of the invention
i) OV - The Overvoltage protection devices are those which trips in case of rise
in voltage than rated voltage and does not trip when supply goes off. It remains in on
condition.
ii) UV - The under voltage protection devices are those which trips in case of
failure in voltage than rated voltage and it will trip when supply goes off because
tripping device is electromechanical.
iii) Shunt - The external supply is required to trip the device and does not trip
when supply goes off.
At present all the OV,UV and shunt are three independent products. There is no combined solution for OV, UV and shunt. Therefore, there is a need to provide a circuit arrangement to achieve the combined OV, UV and shunt device in to one product.
At present, one may not be able to connect separate UV, OV and shunt product due to space constrained. Present invention will solve the space issue by having three different accessories in to one circuit. The same device can be used as an UV. OV and Shunt /External Trip product.
Objects of the invention
Object of the invention is to provide a combined arrangement for UV,OV and Shunt/External Trip product.
Another object of the present invention is to provide an automatic detection of UV and OV fault without any requirement of selective switch.
Yet another object of the present invention is to reduce components in circuit thereby reducing power loss of a product.
Further object of the present invention is to provide a low cost electronic board by reducing number of components therein.
Summary of the invention
According to the present invention there is provided a combined electronic circuit arrangement for an under voltage release (Uv), an over voltage release (Ov), an external trip arrangement anda shunt release. The circuit having a , a plurality of diodes, a plurality of zener diodes, a plurality of resistors and a plurality of capacitors. The plurality of diodes are provide for rectification of electric current. The plurality of zener diodes are provide for allowing current to flow in the forward direction. The plurality of resistors implements electrical resistance. The electromagnetic relay detection and control of faults on electrical distribution lines. The plurality of
capacitors are provide for storing to store energy in an electric field. The plurality of diodes, plurality of zener diodes, the Electromagnetic relay and the plurality of capacitors are electrically connected to selectively configure the under voltage release (Uv), the over voltage release (Ov), the external trip arrangement and a shunt release.
Brief description of the drawings
Figure 1 shows a circuit arrangement with current direction of present invention in normal condition (Without fault);
Figure 2 shows a detailed arrangement of present invention in normal condition (Without fault);
Figure 3 shows a circuit arrangement with current direction in case of UV;
Figure 4 shows a detailed arrangement with tripping in case of UV fault;
Figure 5 shows a circuit arrangement with current direction in case of OV, and
Figure 6 shows a circuit arrangement with current direction in case of Shunt.
Detail description of the invention
For a thorough understanding of the present invention, reference is to be made to the following detailed description, including the appended claims, in connection with the above-described drawings. Although the present invention is described in connection with exemplary embodiments, the present invention is not intended to be limited to the specific forms set forth herein. It is understood that various omissions and
substitutions of equivalents are contemplated as circumstances may suggest or render expedient, but these are intended to cover the application or implementation without departing from the spirit or scope of the claims of the present invention. Also, it is to be understood that the phraseology and terminology used herein is for the purpose of description and should not be regarded as limiting.
The present invention provides an electronic arrangement for combined OV, UV and shunt in one device. The same solenoid is used for OV and shunt circuit. Common mechanism is used to achieve OV, UV and shunt devices. Conventional OV, UV and shunt required three different supply but in this combined unit common supply is using. The faults like OV, UV and shunt can be detected automatically with this combined unit and can get signal. One SCR is used to trip in OV and shunt circuit.
Figure 1 shows the circuit arrangement for the present invention. The common supply is used for OV and UV circuit. Figure 1 shows current direction in normal condition. Supply is given to Electromagnetic relay, due to which relay is in hold condition. In normal condition there is no current flows through shunt circuit so that Diodes (D3,D4,D5 and D6), Resistor R7 and optocoupler is not in circuit. Since there is no fault SCR, DZ2 (Zener diode) and C2 (capacitor) are also not in circuit. Electromagnetic relay is connected in series with main circuit therefore continuous current is flowing and relay is in closed condition.
Figure 2 shows the detailed view of OV, UV and shunt circuit in which electromagnetic relay and contact system is in closed condition and shunt circuit is totally isolated.
Figure 3 is the circuit arrangement for the present invention, if UV fault has occurred i.e. main voltage will falls down to rated voltage (40 to 60 % Un to 15 Un)
Here the diode Dl is used for the rectification purpose. The diode Dl converts the directional AC supply in unidirectional. The resistors Rl and R2 are forming the voltage divider circuit and voltage V1 is appearing at capacitor CI. The zener diode Zl will maintain the voltage Vz2 through resistor R3. The values of Rl, R2 and the zener diode Zl are selected such that the voltage V1 is greater than voltage Vz2. The capacitor C1 is connected across the zener diode Zl through diode D4. When voltage Vz2 will appear, the capacitor C1 will charge to the voltage Vz2. Hence the voltage V2 is equals to Vz2. The value of resistor R3 is selected such that the current in that branch will not cross the maximum zener current.
Since the voltage V1 is greater than V2, then there is a normal flow of current. Now if voltage falls down than its rated voltage, then voltage V1 will be less than Vz2. In this case zener will act as reverse bias and it will stop supply. Electromagnetic relay will give tripping signal to mechanism and it opens contact. When supply goes off, which is the case in UV device, the voltage V1 will become zero. The capacitor which was holding the voltage V2, will discharge through resistor R7.
Figure 4 shows the detailed view of UV circuit in which electromagnetic relay and contact system is in open condition and there is no supply in circuit.
Figure 5 is the circuit arrangement for the present invention, if OV fault has occurred i.e main voltage will increase than rated voltage (265 to 280 V).
Here the diode D2 is used for the rectification purpose. It will convert the directional AC supply in unidirectional. The resistors R4 and R5 are forming the voltage divider circuit. The value R4,R5 and C3 are selected such that voltage across C3 (V1) will more than voltage across Zener (Vz2). R6 is act as current limiter. C2 is a by-passing capacitor and diode D3 is act as freewheeling diode. Mov is connected across phase and neutral supply to suppress transient voltage.
Since the voltage across C3 i.e V1 is greater than voltage across zener Vz2 so there is normal flow of current. Now if voltage goes up (265 to 280v) then voltage across C3 i.e V1 will goes up than Vz2 and zener will act as forward bias. Current will starts flowing DZ2 and gate pulse is given to SCR then it will give signal to solenoid which will trip the mechanism. Contact system will open and supply to circuit will be stopped. Voltage across capacitor C2 and C3 will be zero and it will start discharging through freewheeling diode and resistor R6.
Figure 6 is the circuit arrangement for the present invention, if Shunt fault has occurred. External supply (AC, 24V DC) will be given through D3 and D5 of bridge rectifier and output from D4 and D6 will be given to optocoupler as an input. The output of optocoupler will be given as a gate pulse to SCR, which will give the signal to solenoid. It will trip the mechanism and opens the contact system. R7 is act as a current limiter.
Advantages of the present invention:
• The arrangement given in the present invention can be used to protect against OV, UV and provide facility for external shunt tripping in a single unit.
• One main tripping solenoid is common for OV and shunt protection.
• Low cost of electronic board since it involves less components. It also reduces the power loss of product.
• Shunt Tripping circuit is isolated from mains and product can be operated with either AC or DC supply.
The foregoing descriptions of specific embodiments of the present invention have been presented for purposes of illustration and description. They are not intended to be exhaustive or to limit the present invention to the precise forms disclosed, and
obviously many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the present invention and its practical application, and to thereby enable others skilled in the art to best utilize the present invention and various embodiments with various modifications as are suited to the particular use contemplated. It is understood that various omissions and substitutions of equivalents are contemplated as circumstances may suggest or render expedient, but such omissions and substitutions are intended to cover the application or implementation without departing from the spirit or scope of the claims of the present invention.
We Claim:
1. A combined electronic circuit arrangement for an under voltage release (Uv), an over voltage release (Ov), an external trip arrangement anda shunt release, the circuit comprising:
a plurality of diodes (Dl, D2, D3, D4, D5 and D6) for rectification of electric current;
a plurality of zener diodes (DZ1 and DZ2) for allowing current to flow in the forward direction;
a plurality of resistors (Rl, R2, R3, R4, R5 and R6) implements electrical resistance;
an Electromagnetic relay detection and control of faults on electrical distribution lines, and
a plurality of capacitors (C1, C2 and C3) for storing to store energy in an electric field,
wherein the plurality of diodes, plurality of zener diodes, the Electromagnetic relay and the plurality of capacitors are electrically connected to selectively configure the under voltage release (Uv), the over voltage release (Ov), the external trip arrangement and a shunt release.
| # | Name | Date |
|---|---|---|
| 1 | 1133-MUM-2013-FORM-27 [13-09-2024(online)].pdf | 2024-09-13 |
| 1 | ABSTRACT1.jpg | 2018-08-11 |
| 2 | 1133-MUM-2013-IntimationOfGrant26-12-2022.pdf | 2022-12-26 |
| 2 | 1133-MUM-2013-POWER OF AUTHORITY(7-3-2014).pdf | 2018-08-11 |
| 3 | 1133-MUM-2013-PatentCertificate26-12-2022.pdf | 2022-12-26 |
| 3 | 1133-MUM-2013-GENERAL POWER OF ATTORNEY(27-6-2013).pdf | 2018-08-11 |
| 4 | 1133-MUM-2013-FORM 5.pdf | 2018-08-11 |
| 4 | 1133-MUM-2013-8(i)-Substitution-Change Of Applicant - Form 6 [26-01-2021(online)].pdf | 2021-01-26 |
| 5 | 1133-MUM-2013-FORM 3.pdf | 2018-08-11 |
| 5 | 1133-MUM-2013-ASSIGNMENT DOCUMENTS [26-01-2021(online)].pdf | 2021-01-26 |
| 6 | 1133-MUM-2013-PA [26-01-2021(online)].pdf | 2021-01-26 |
| 6 | 1133-MUM-2013-FORM 2.pdf | 2018-08-11 |
| 7 | 1133-MUM-2013-FORM 2(TITLE PAGE).pdf | 2018-08-11 |
| 7 | 1133-MUM-2013-ABSTRACT [13-08-2019(online)].pdf | 2019-08-13 |
| 8 | 1133-MUM-2013-FORM 1.pdf | 2018-08-11 |
| 8 | 1133-MUM-2013-CLAIMS [13-08-2019(online)].pdf | 2019-08-13 |
| 9 | 1133-MUM-2013-FER_SER_REPLY [13-08-2019(online)].pdf | 2019-08-13 |
| 9 | 1133-MUM-2013-FORM 1(27-6-2013).pdf | 2018-08-11 |
| 10 | 1133-MUM-2013-DRAWING.pdf | 2018-08-11 |
| 10 | 1133-MUM-2013-FORM-26 [13-08-2019(online)].pdf | 2019-08-13 |
| 11 | 1133-MUM-2013-DESCRIPTION(COMPLETE).pdf | 2018-08-11 |
| 11 | 1133-MUM-2013-OTHERS [13-08-2019(online)].pdf | 2019-08-13 |
| 12 | 1133-MUM-2013-CORRESPONDENCE.pdf | 2018-08-11 |
| 12 | 1133-MUM-2013-FER.pdf | 2019-02-13 |
| 13 | 1133-MUM-2013-ABSTRACT.pdf | 2018-08-11 |
| 13 | 1133-MUM-2013-CORRESPONDENCE(27-6-2013).pdf | 2018-08-11 |
| 14 | 1133-MUM-2013-CLAIMS.pdf | 2018-08-11 |
| 15 | 1133-MUM-2013-ABSTRACT.pdf | 2018-08-11 |
| 15 | 1133-MUM-2013-CORRESPONDENCE(27-6-2013).pdf | 2018-08-11 |
| 16 | 1133-MUM-2013-CORRESPONDENCE.pdf | 2018-08-11 |
| 16 | 1133-MUM-2013-FER.pdf | 2019-02-13 |
| 17 | 1133-MUM-2013-OTHERS [13-08-2019(online)].pdf | 2019-08-13 |
| 17 | 1133-MUM-2013-DESCRIPTION(COMPLETE).pdf | 2018-08-11 |
| 18 | 1133-MUM-2013-FORM-26 [13-08-2019(online)].pdf | 2019-08-13 |
| 18 | 1133-MUM-2013-DRAWING.pdf | 2018-08-11 |
| 19 | 1133-MUM-2013-FER_SER_REPLY [13-08-2019(online)].pdf | 2019-08-13 |
| 19 | 1133-MUM-2013-FORM 1(27-6-2013).pdf | 2018-08-11 |
| 20 | 1133-MUM-2013-CLAIMS [13-08-2019(online)].pdf | 2019-08-13 |
| 20 | 1133-MUM-2013-FORM 1.pdf | 2018-08-11 |
| 21 | 1133-MUM-2013-ABSTRACT [13-08-2019(online)].pdf | 2019-08-13 |
| 21 | 1133-MUM-2013-FORM 2(TITLE PAGE).pdf | 2018-08-11 |
| 22 | 1133-MUM-2013-FORM 2.pdf | 2018-08-11 |
| 22 | 1133-MUM-2013-PA [26-01-2021(online)].pdf | 2021-01-26 |
| 23 | 1133-MUM-2013-ASSIGNMENT DOCUMENTS [26-01-2021(online)].pdf | 2021-01-26 |
| 23 | 1133-MUM-2013-FORM 3.pdf | 2018-08-11 |
| 24 | 1133-MUM-2013-8(i)-Substitution-Change Of Applicant - Form 6 [26-01-2021(online)].pdf | 2021-01-26 |
| 24 | 1133-MUM-2013-FORM 5.pdf | 2018-08-11 |
| 25 | 1133-MUM-2013-PatentCertificate26-12-2022.pdf | 2022-12-26 |
| 25 | 1133-MUM-2013-GENERAL POWER OF ATTORNEY(27-6-2013).pdf | 2018-08-11 |
| 26 | 1133-MUM-2013-POWER OF AUTHORITY(7-3-2014).pdf | 2018-08-11 |
| 26 | 1133-MUM-2013-IntimationOfGrant26-12-2022.pdf | 2022-12-26 |
| 27 | ABSTRACT1.jpg | 2018-08-11 |
| 27 | 1133-MUM-2013-FORM-27 [13-09-2024(online)].pdf | 2024-09-13 |
| 1 | Capture_11-10-2018.pdf |