FIELD OF THE INVENTION
This invention relates to Communication Module for Data Acquisition Unit (DAU) of Flight
Data Recorder (FDR) and, more particularly, to communicate with aircraft MIL bus and ARINC
bus.
BACKGROUND OF THE INVENTION
Flight data recorders are monitoring and recording instruments, carried aboard an
aircraft, which systematically monitor and store the instantaneous values of various aircraft
parameters. Early recorders were analog electromechanical devices which periodically marked,
in analog form, the value of a given airplane parameter on a moving wire or other permanent
storage medium. The time of occurrence of the parameter was also suitably scribed into the
medium opposite the mark for the sensed parameter. Subsequently, digital flight data recorders
have been developed which operate by converting each analog aircraft parameter into a
corresponding digital signal, and storing the digital signals on a permanent storage medium
such as magnetic tape.
The numerous mechanical parts employed in the analog and digital type
electromechanical flight data recorders have rendered such units expensive to construct and
bulky in design, requiring periodic maintenance of the mechanical parts. In addition, extraction
of the stored data from these data recorders requires physical removal of the storage medium.
The development of solid state memory devices, such as electrically erasable read-only
memory, has led to the design of all solid state flight data recorders. The solid state flight data
recorders commonly employ a data acquisition system (DAS) which receives and processes the
various aircraft input signals to be monitored and stored under the control of a central
processing unit (CPU). The analog signals are converted to digital signals by the DAS and,
under CPU control, are passed over a data bus to the solid state memory devices.
Programming within the CPU controls the processing of input airplane signals to corresponding
digital signals through the DAS and the subsequent transference of these digital signals to
controlled locations in the solid state memory.
The signals representative of monitored aircraft parameters are typically either discrete
level signals or analog signals. Discrete signals are typically switch positions and produce either
a high or a low level output depending upon the status of the particular switch. A typical
example in an aircraft is a squat switch, which indicates whether or not a load is being borne by
the landing gear.
The Data acquisition unit, the main LRU in the system. It acquires data from cockpit
voice, analog inputs, thermocouples, RTDs, Tacho, discrete inputs, MIL1553B bus & ARINC
429 channels from the aircraft. The acquired data is stored in Flash memory available within the
DAU and the selected parameters are sent to Recorder Unit (RU) through ARINC 717 interface.
The stored parameters in DAU flash memory are milked out through Ethernet 10/100 port.
These parameters are used for post flight & engine run analysis.
SUMMARY OF PRESENT INVENTION
The present invention, therefore, is directed to communication Module for Data
Acquisition Unit (DAU) of Flight Data Recorder (FDR).
An aspect of the present invention is the ability of communication module of the
Data Acquisition System to process a set of parameter sense signals to communicate
with aircraft MIL bus and ARINC bus.
A further aspect of the invention is the universal application of the present
communication module to any Data Acquisition Unit (DAU). All aircraft parameter
signals may be assigned to any of the multiple data acquisition system inputs under
CPU control. Further, the module is responsive to CPU control to select the multiple
channels from variety of the channels. Briefly, according to the invention,
communication module for an aircraft flight data recorder is responsive to a central
processor unit (CPU) for selectively processing a Arinc & MIL1553B Bus data.
Further communication module is having mini ACE MARK3, 1553-B device which used
to support communication over the MIL-STD 1553-B data buses interconnect. This device sits
directly on to the main processor buffered bus. The Channel ‘A’ and Channel ‘B’ signals of the
mini ACE device are interfaced to the MIL-STD 1553-B bus through a pair of pulse
transformers. The RT address lines are accessible through CPLD, so that the address can be
easily configured through software.
Arinc Device chip is used to support communication over the ARINC429 data buses
interconnect. This device sits directly on to the main processor buffered bus. The signals of the
device are interfaced to the ARINC 429 bus through a transceiver and Line Drivers. Additionally,
a JTAG interface is provided to program the CPLD.
BRIEF DESCRIPTION OF THE DRAWINGS
The features and advantages of the present invention become more apparent and
descriptive in the description when considered together with figures/flow charts presented:
Figure 1: is a Block Diagram of Communication Module of DAU of FDR
Figure 2: is a Block Diagram of MIL1553B Interface
Figure 3: is a Block Diagram of ARINC 429 Interface
DETAILED DESCRIPTION
The function of this card is to communicate with aircraft MIL bus and ARINC bus.
Considering the no. of channels and to reduce low level overhead, this board is planned to be
intelligent. A dedicated microprocessor/micro controller takes care of all the local I/O activities.
Communication between main CPU and the local CPU is through shared memory.
This module is compatible with MIL-STD-1553-B data bus interface & function as
Remote Terminal (RT), Bus Controller or Bus Monitor and also compatible with ARINC429 data
bus interface.
The MIL-STD 1553-B data bus communication device is from DDC Mini ACE MARK3
family with 64K words of memory and ARINC 429 data bus communication device is from DDC
with 128X32 shared RAM, 2, 32 X 32 transmit FIFO and 4, 32 X 32 receive FIFO. The Card has
built-in test facility for both MIL-STD-1553-B & ARINC 429.
Interface Requirements:
The following signals are terminated on the PCB edge connector:
􀂃 Twenty Address lines
􀂃 Sixteen Data lines
􀂃 Two Interrupt lines
􀂃 Read, Write, Master Reset, Arinc Ready and Mil-STD-1553B ready signals.
􀂃 Power Supply Lines (+3.3V, +5V, +15V, -15V and Returns).
􀂃 Board select and Board present signals.
􀂃 MIL BUS 1553-B data bus interface lines
􀂃 ARINC 429 data bus interface lines
􀂃 Power supply signals
Mother Board Mating Connector:
This connector brings the Address bus, data bus and control signals from the Processor
module. Also it contains the ARINC429 and MIL-1553-STD bus signals to take it to outside of
the DAU.
DPRAM:
Dual Port RAM (DPRAM) is used as the medium to store the data’s from the
communication buses and processor module.
Local Micro Controller:
Micro controller is used to collect and send the data’s from and to the DPRAM as well as
ARINC & MIL-1553-STD controllers.
CPLD:
CPLD is used to generate the control signals for ARINC controller and 1553 bus
controller as well for DPRAM.
1553 Bus controller:
This block is to transmit and receive the data through 1553 bus. This controller is to
format the data’s as per the 1553 protocol. The data received from 1553 bus is sent to the
DPRAM through micro controller.
Transformer:
Transformer is used for isolation and impedance matching purpose.
ARINC429 controller:
This block is to transmit and receive the data through ARINC bus. This controller is used
to format the data as per the ARINC429 protocol.
Line Receivers:
Line Receiver channel translates incoming ARINC 429 data bus signals to a pair of TTL
outputs.
Line drivers:
The device converts TTL serial input data to the tri-level RZ bipolar differential
modulation format of the ARINC bus.
Test connector:
Test connector is to be provided to facilitate the board level testing.
Specification:
􀂉 MIL 1553B bus interface : 4 Channels
􀂉 ARINC 429 Transmitters : 4 Channels
􀂉 ARINC 429 Receivers : 18 Channels
􀂉 Local microprocessor / micro controller
􀂉 Shared memory (DPSRAM)
􀂉 BUS & I/Os termination at one connector at Rear side of the card
􀂉 Separate test Connector (Female) in the front side of the card

WE CLAIMS:-
Accordingly, the description of the present invention is to be considered as illustrative only and is for the purpose of teaching those skilled in the art of the best mode of carrying out the invention. The details may be varied substantially without departing from the spirit of the invention, and exclusive use of all modifications which are within the scope of the appended claims is reserved. The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. Communication Module for DAU responsive to a central processor unit (CPU) for processing to communicate with aircraft MIL bus and ARINC bus. Considering the no. of channels and to reduce low level overhead, this board is intelligent board. A dedicated microprocessor/micro controller takes care of all the local I/O activities. Communication between main CPU and the local CPU is through shared memory. Said communication module comprising:
MIL1553B Chip for used to support communication over the MIL-STD 1553-B data buses interconnect;
ARINC Chip to support communication over the ARINC429 data buses interconnect.
Logic means responsive to said single command from said CPU for producing each address command signal; and
Processing means for processing each signal in a selected signal set to supply said digitally encoded signal representative of said selected set of input signals.

2. Communication Module for DAU of claim 1 wherein module is compatible with MIL-STD-1553-B data bus interface & function as Remote Terminal (RT), Bus Controller or Bus Monitor and also compatible with ARINC429 data bus interface.

3. Communication Module of claim 1 wherein module is having Dual Port RAM (DPRAM) which is used as the medium to store the data’s from the communication buses and processor module.

4. Communication Module of claim 1 wherein CPLD is used in the module to generate the control signals for ARINC controller and 1553 bus controller as well for DPRAM.

5. Communication Module as claimed in any of the preceding claims wherein Line Receiver channel translates incoming ARINC 429 data bus signals to a pair of TTL outputs and line driver converts TTL serial input data to the tri-level RZ bipolar differential modulation format of the ARINC bus.

6. Communication Module as claimed in any of the preceding claims wherein Local Micro controller is used to collect and send the data’s from and to the DPRAM as well as ARINC & MIL-1553-STD controllers. ,TagSPECI:As per Annexure-II