COMMUNICATION UNIT AND METHOD FOR FREQUENCY SYNCHRONISING IN A CELLULAR COMMUNICATION NETWORK Field of the invention The field of the invention relates to a wireless communication unit and method for synchronising therein. In particular, the field of the invention relates to a 3GPP wireless communication unit synchronising to macro-cells in a combined macro cell/femto cell cellular communication system. Background of the Invention Wireless communication systems, such as the 2nd Generation (2G) (otherwise referred to as Global System for Mobile (GSM) communications and the 3rd Generation (3G) of mobile telephone standards and technology, are well known. An example of such 3G standards and technology is the Universal Mobile Telecommunications System (UMTS), developed by the 3rd Generation Partnership Project (3GPP) (www.3gpp.ora). Typically, wireless communication units, or User Equipment (UE) as they are often referred to in 3G parlance, communicate with a Core Network (CN) of the 3G wireless communication system via a Radio Network Subsystem (RNS). A wireless communication system typically comprises a plurality of radio network subsystems, each radio network subsystem comprising one or more communication cells to which UEs may attach, and thereby connect to the network. The 3rd generation of wireless communications has been developed for macro-cell mobile phone communications. Such macro cells utilise high power base stations (NodeBs in 3GPP parlance) to communicate with UEs operating within a relatively large coverage area. Lower power (and therefore smaller coverage area) femto-cells or pico-cells are a recent development within the field of wireless cellular communication systems. Femto-cells or pico-cells (with the term femto-cell being used hereafter to encompass pico-cell or similar) are classified under local area base stations in the 3GPP standard specifications. Femto cells are effectively communication coverage areas supported by low power base stations (otherwise referred to as Access Points (APs)). These cells are able to be piggy-backed onto the more widely used macro- cellular network and support communications to UEs in a restricted, for example 'in-building', environment. Typical applications for such femto-cell APs include, by way of example, residential and commercial (e.g. office) locations, 'hotspots', etc, whereby an AP can be connected to a core network via, for example, the Internet using a broadband connection or the like. In this manner, femto-cells can be provided in a simple, scalable deployment in specific in-building locations, since the quality of services (voice/data) no longer suffers due to massive attenuation of macro cell transmissions going through concrete walls or metallised glass planes in order to reach the user in- building. In a femto cell network it is known that there may be a very large number of femto cells compared to the number of macro cells, with femto cells often residing within or overlapping macro cells in the same geographic area. Often, a Voltage Controlled Temperature Compensated (VCTCXO) crystal Oscillator is used to generate a desired (reference) operating frequency for wireless communication units. Such crystal oscillators have been employed in UE receivers operating in macro cells, and are also proposed to be used in femto cells. Although VCTCXOs are inexpensive, and therefore an attractive frequency reference component for wireless communication unit designers, they are known to suffer from a frequency drift from their quiescent operating frequency, which is dependent upon the age of, and any temperature variations affecting, the VCTCXO. Local oscillator (LO) frequencies for the radio receiver, transmitter and the sampling clocks for baseband data converters (for example analog-to-digital converters and digital-to-analog converters), are derived from the frequency reference generated by the crystal oscillator. Hence, this frequency drift in the crystal oscillator needs to be carefully controlled; otherwise reference frequency drift will lead to degradation of performance in many aspects of the receiver. Worse still, reference frequency drift may eventually render the receiver incapable of decoding received signals due to frequency drifting outside a receiver 'lock' range. Moreover, from a transmission point of view, it is illegal to transmit 3G signals at a frequency error greater than +/-0.1 PPM, as per the 3GPP transmitter specifications for local area base stations (femto cells). In macro cell communications, base stations, often referred to as NodeBs, are guaranteed to have high frequency stability, as they employ stable, hence expensive, crystal oscillators. The maximum frequency drift specification of macro cells, according to 3"1 Generation Partnership Project (3GPP) specifications, is +/-0.05 PPM. Notably, this high accuracy macro cell reference frequency compares favourably to the lower accuracy performance of femto cell VCTCXO crystal oscillators, which are typically in the region of less than +/-10PPM. Clearly, it is of paramount importance that a femto cell communication unit receiver is in frequency lock with the most stable, accurate transmitter that it is receiving signals from, in order to correctly decode signals. Furthermore, it is important to achieve this high frequency accuracy before the receiver baseband modem attempts to decode the received channels. A desired frequency accuracy performance before decoding would be to reduce the frequency drift down to +/-0.1 PPM. This process of reducing the frequency drift within the receiver's decoding requirements is termed 'frequency synchronisation'. Existing state of the art frequency synchronisation procedures directly re-tune the wireless communication unit's hardware VCTCXO crystal to correct an estimated frequency error, iteratively. Furthermore, it is known that such frequency synchronisation procedures frequency lock to every received individual base station (previously every macro cell NodeB), in turn, in order to select the best frequency to synchronise its operating frequency to. In femto cells, it is proposed that femto cell APs incorporate a DL (Downlink) receiver radio sub-system, in a similar manner to a UE receiver, in order to wirelessly receive transmissions from other wireless serving communication units, such as NodeBs and other femto cell APs. It is also proposed that a femto cell AP is able to receive transmissions from macro cells, in a manner that is termed Network Listen. However, in a typical femto cell environment, it is likely that, in addition to macro cells, there will be many other femto cells in the residential neighbourhood. Hence, it is highly probable that the femto cell's downlink (DL) receiver could frequency lock with any number of femto cell and macro cell reference frequency signals. It is not desirable that a femto cell Downlink (DL) receiver synchronises to another femto cell AP, since femto cell APs will typically employ inexpensive, but less stable VCTCXO crystals. In the field of oscillator designs, a recent development has been the software digital oscillator. The software digital oscillator is implemented as a standard Quadrature Coupled Recursive Oscillator, which is further described in 'Recursive Discrete-time Sinusoidal Oscillators - IEEE Signal Processing Magazine, May 2003, pages 103-111'. The oscillator topology suggested in the article is illustrated in FIG. 1, and briefly described herein. The known software digital oscillator, 100, design of FIG. 1 comprises a sinusoid LO generation path, 105, and a cosinusoid LO generation path, 110. Both paths comprise quadrature (IQ) multiplication logic stages 125, which multiply a Sin() 115 or Cos(<|>)120 component with a feedback component of Sin(<|>+x) (Q-component) 160 or Cos(<|>+x) (l-component) 165, from the output of the LO generation path, as illustrated. The outputs of quadrature multiplication logic stages 125 are respectively input to a summing stage 130, 135 and either summed (Q-component) or subtracted (l-component), before being input to delay logic 140, 145 and input to an automatic gain control (AGC) function 150, 155. The reference article suggests measuring the AGC power and scaling the oscillator output to a reference power using the AGC function 150, 155 every l/Q oscillator output sample, of the recursive digital software oscillator, thereby maintaining unity gain always in every l/Q oscillator output sample in order to sustain the oscillator output amplitude. The outputs from the respective AGC functions 150,155 provide the Q-component and l-component of the software digital oscillator 100. In addition, the outputs provide a feedback input to the respective quadrature multiplication logic stages 125; thus forming a recursive system. Although a software-based digital oscillator is attractive in theory, the topology of FIG. 1 cannot always be directly realised in practice, due to the stringent time-constraints in the number of instructions per oscillator output that are available. The number of instructions per oscillator output is dictated by the clock speed and architecture of the associated digital signal processor (DSP), on which the digital oscillator is implemented. The number of instructions per oscillator output in a 3GPP wide band code division multiple access (WCDMA) receiver is defined by its rake receiver operating requirements. A typical WCDMA receiver employs a rake receiver, which essentially has a set of 'fingers'. Each finger independently demodulates a specific propagation path in the received multi-path signal from a cell. The fingers are finally combined together to provide a composite signal comprising a higher Signal-to-Noise (S/N) ratio than that of each of the individual multi-path components. Practical rake receivers operate on over-sampled data rates (i.e., the rate at which the input signal is sampled and represented to the input of the finger) where the over-sampling rates range from approximately '2' to '8'. Typical rake receivers operate on 4-times over-sampled data, as a trade¬off between over-sampling rate and performance/receiver complexity. A higher over-sampled input data rate at the rake receiver input implies that a more accurate alignment of the finger's sampling point with the received signal path can be achieved, thus improving the receiver performance. At a WCDMA chip rate of 3.84MHz, a 4-times over-sampling rate translates to an input over-sampled IQ data rate of 15.36 MSPS (Million Samples Per Second). This, in turn, implies that the oscillator has to be fast enough to generate and output 'I' & 'Q' de- rotation waveforms at 15.36 million samples per second as well. The WCDMA downlink frequency range is 2.110 GHz to 2.170 GHz. Hence, at a maximum downlink carrier frequency of 2.170 GHz, a +/-10 ppm frequency drift (typical in femto cell VCTCXO crystal oscillator) translates to +/-21.70 KHz frequency drift. Thus, the processing rate also needs to be applied over the frequency range of +/-211 Hz to +/-21.70 KHz, as established earlier. (Note that +/- 211 Hz comes from +/-0.1 PPM, which is the receiver's performance requirement before decoding channels, as was established earlier.) This fast rate imposes a restriction on the number of instructions (cycles) available for the digital oscillator per output, which in turn is dictated by the DSP used in the design. Practical DSPs have precluded the use of software digital quadrature recursive oscillator designs of the type illustrated in FIG. 1. Therefore, in existing state of the art oscillator designs for 3GPP DL receivers (for example, User Equipment (UEs) or femto cell APs), software digital oscillators of the type of FIG. 1 have been unsuitable and unused. Instead, in 3GPP DL receivers, the receiver's hardware crystal is directly pulled to correct the frequency error and synchronise to macro-cells. Thus, there exists a need for a method and apparatus for frequency synchronisation in a cellular communication unit, particularly one for a 3GPP femto cell using inexpensive VCTCXO crystal oscillator in a 3GPP combined femto cell /macro cell communication network, which aims to address at least some of the shortcomings of past and present techniques and/or mechanisms. Summary of the Invention Accordingly, the invention seeks to mitigate, alleviate or eliminate one or more of the abovementioned disadvantages singly or in any combination. According to aspects of the invention, there are provided a communication unit capable of communicating in a wireless communication network, a radio network sub-system comprising a communication unit, and a method for frequency synchronising a communication unit, in accordance with the Claims. These and other aspects, features and advantages of the invention will be apparent from, and elucidated with reference to, the embodiment(s) described hereinafter. Brief Description of the Drawings FIG. 1 illustrates a known quadrature coupled recursive software digital oscillator architecture. Embodiments of the invention will be described, by way of example only, with reference to the accompanying drawings, in which: FIG. 2 illustrates an example of a cellular communication system that combines macro-cell and femto-cells, adapted to support frequency synchronisation in accordance with embodiments of the invention. FIG. 3 illustrates a block diagram of a femto cell downlink communication unit and particularly a frequency synchronisation arrangement therein, adapted in accordance with embodiments of the invention. FIG. 4 illustrates a quadrature coupled recursive software digital oscillator architecture comprising parallel Slow-AGC components, in accordance with embodiments of the invention. FIG. 5 illustrates a typical computing system that may be employed to implement processing functionality in embodiments of the invention. Detailed Description of Embodiments of the Invention Embodiments of the invention find particular applicability in a cellular communication system that supports a number of overlapping communication coverage areas, for example a communication system that comprises a combination of femto cells and macro cells. Embodiments of the invention may be used by any communication unit needing to frequency synchronise to another communication unit. For example, embodiments of the invention may be used by a UE comprising a wideband code division multiple access (WCDMA) receiver. Embodiments of the invention may be employed particularly by a femto ceil receiver operating in a cellular communication system comprising both femto cell base-stations (termed APs hereafter) and macro-cell NodeBs. In particular, embodiments of the invention enable a femto cell downlink receiver to synchronise to and use a macro-cell NodeB's frequency and timing transmissions, and reject any femto cell AP frequency and timing transmissions. Such synchronisation is performed prior to decoding the respective transmitted channels. Those skilled in the art, however, will recognize and appreciate that the specifics of this example are merely illustrative of some embodiments and that the teachings set forth herein are applicable in a variety of alternative settings. For example, since the teachings described hereafter do not depend on a particular cellular communication network conforming to any specific standard, it is envisaged that the teachings and inventive concept described herein can be applied to any type of cellular communication network, although a 3"1 generation partnership project (3GPP) network is shown in this embodiment. As such, other alternative implementations within cellular communication networks conforming to different standards are contemplated and are within the scope of the various teachings described. The inventors have recognised that the software digital oscillator architecture proposed in FIG. 1 is not flexible enough to meet the instruction budget required to meet a high throughput, such as 15.36 MSPS (mega samples per second), for a WCDMA receiver. A primary reason for this has been identified as being due to the components in the software digital oscillator architecture proposed in FIG. 1 being sequentially arranged. Referring now to the drawings, and in particular FIG. 2, an example of part of a 3GPP network, adapted in accordance with embodiments of the invention, is illustrated and indicated generally at 200. In FIG. 2, there is illustrated an example of a communication system combining macro cells 285 and femto cells 250 in accordance with one embodiment of the invention. In a femto cell network it is known that there may be a very large number of femto cells per macro cell. Thus, the coverage area of a single macro cell will inevitably encompass a coverage area of a large number of femto cells. For the embodiment illustrated in FIG. 2, a radio network sub-system (RNS) comprises two distinct architectures to handle the respective macro cell and femto cell communications. In the macro cell scenario, the RNS comprises a radio network controller (RNC) 236 having, inter alia, processing logic 238 and being operably coupled to a network element 242, such as a serving general packet radio system (GPRS) support node (SGSN)/mobile switching centre (MSC), as known. In a femto cell scenario, an RNS 210 comprises a network element in a form of an Access Point (AP) 230, and a controller in a form of an AP controller 240. As will be appreciated by a skilled artisan, an Access Point (AP) 230 is a communication element that facilitates access to a communication network via a communication cell, such as a femto-cell. One application that has resulted in the interest in femto cell technology is that an AP 230 may be purchased by a member of the public and installed in their home. The AP 230 may then be connected to an AP controller 240 over the owner's broadband internet connection 260. Thus, an AP 230 is a scalable, multi-channel, two-way communication device that may be provided within, say, residential and commercial (e.g. office) locations, 'hotspots' etc, to extend or improve upon network coverage within those locations. Although there are no standard criteria for the functional components of an AP, an example of a typical AP for use within a 3GPP system may comprise some Node-B functionality and some aspects of radio network controller (RNC) 236 functionality. The AP communicates with UEs, such as UE 214, via a wireless interface (Uu). The AP controller 240 may be coupled to a core network (CN) 242 via an lu-PS interface as shown. In this manner, the AP 230 is able to provide voice and data services to a cellular handset, such as UE 214, in a femto cell in contrast to the macro cell, in the same way as a conventional Node-B, but with the deployment simplicity of, for example, a Wireless Local Area Network (WLAN) access point. In accordance with embodiments of the invention, described in greater detail with respect to FIG. 3 and FIG. 4 below, a femto cell AP 230 is adapted to perform a software-based method to frequency synchronise to a macro cell NodeB, such as synchronising to transmissions 220 from NodeB 224, and reject AP timing transmissions 222, in its frequency synchronising operation. In particular, the femto cell AP 230 comprises a downlink (DL) receiver circuit 235 that has been adapted to frequency synchronise to a number of (macro and femto) cells in software, decode the cells' transmissions, reject the frequency errors estimated from other femto cells, and select only frequency error estimations from macro cells. In particular, the downlink (DL) receiver circuit 235 distinguishes between femto cells and macro cells by decoding the broadcast channel transmitted by the Node-Bs and other femto ceil APs. For example, in one embodiment of the invention, a Public Land Mobile Network (PLMN) identifier (ID) contained in the broadcast channel may be decoded to enable the Operator to associate it with macro cells from the Operator's current network plan configuration. In accordance with embodiments of the invention, the femto cell AP is configured to then calculate a statistical aggregate (for example an average or median) frequency drift. The femto cell AP is then adapted to adjust (correct) the operating frequency of its hardware crystal to synchronise to only macro cell communications in its communication environment. Referring now to FIG. 3, a block diagram of a communication unit 300, and particularly a receiver's frequency synchronisation sub-system therein, adapted in accordance with embodiments of the invention, is illustrated. In one embodiment of the invention, the communication unit may be the femto cell downlink receiver 235 of FIG. 2. The WCDMA communication unit 300 comprises an antenna 302 for receiving transmissions from a macro cell NodeB and/or a femto cell AP. The antenna 302 is operably coupled to radio receiver block 304 comprising known Radio Frequency (RF) circuitry and (if appropriate in some embodiments) Intermediate Frequency (IF) circuits that are capable of receiving and down- converting the WCDMA downlink RF signals from the antenna 302, to, say, 5MHz baseband IQ analogue signals 308. A data converter 312, for example in a form of analogue-to-digital converter, converts the down- converted baseband analogue (IQ) signals 308 to baseband digital (IQ) data samples 314 at, say, an over-sampling rate of Fs (for example, 15.36 MHz, as established earlier). The over-sampling rate (Fs) is derived from the VCTCXO crystal 336 based on a ratio (M/N) set by multiplier logic 338. The VCTCXO crystal 336 also provides the local oscillator (LO) frequency, FL0, to radio receiver block 304, to ensure correct base-band frequency down-conversion. However, in prior art arrangements, the baseband IQ digital samples 314 contain a frequency drift, which is dependent upon the frequency drift of the VCTCXO 336. In embodiments of the invention, the frequency drift is compensated by frequency compensation logic 316, based on compensation l/Q signals generated by the software digital oscillator 330. Baseband frequency estimator logic 318 estimates a residual frequency error in the IQ data samples following the frequency compensation, and forwards 322 the residual frequency error estimation to control logic 326. Control logic 326 is arranged to process the residual frequency error estimation and inform 328, 334 the software digital oscillator 330 or the hardware VCTCXO 336 of the amount of frequency adjustment to effect using an appropriate synthesising algorithm, in order to correct the frequency drift. The down-converted, frequency-compensated, baseband digital IQ samples are then input to a WCDMA rake receiver and decoder logic 320. in one embodiment of the invention, rake receiver and decoder logic 320 is arranged to decode a broadcast channel of the received signal, which contains the system information that informs 324 the control logic 326 whether the channel being received is from a femto ceil or a macro cell. Control logic 326 is then able to decide whether to ignore the frequency estimations of the decoded channel, for example if it determines that they emanate from an AP of a femto cell, or use the frequency error in its aggregate frequency error estimation, for example if it determines that they emanate from a NodeB of a macro cell. Note that the aggregate is taken in order to filter out any frequency drifts in individual NodeB's crystal oscillator themselves (within +/- 0.05 PPM as established earlier), and thus arrive at a better estimate. In a 3GPP embodiment for a femto cell AP, the maximum and minimum frequency requirements on the software digital oscillator 330 are as follows: (i) The maximum frequency that shall be generated by the software digital oscillator 330 shall be sufficient to compensate the worst-case frequency drift in typical crystals used in a femto cell UE. (ii) The minimum frequency that shall be generated by the software digital oscillator 330 is at least sufficient to compensate a frequency error that is required for operation of the WCDMA rake receiver and decoder 320, without degradation in its performance. Thus, in this manner, the software digital oscillator 330 is able to generate I (Cosine) and Q (Sine) waveforms up to a maximum of +/-21.70 KHz and a minimum of at least +/-210 Hz (as established earlier), to be able to de-rotate the input samples, and correct for a maximum of +/-10ppm drift introduced by the VCTCXO crystal 336. In accordance with embodiments of the invention, the digital software oscillator 330 in the baseband modem generates low-frequency, in-phase (cosine) and quadrature (sine) component waveforms in order to de-rotate the digitised data samples input to frequency compensation logic 316. In this manner, crystal induced frequency error, due to the VCTCXO 336 drift, resulting in frequency error relative to the macro cell NodeB transmitted frequency during the frequency down- conversion function, may be removed. Advantageously, with the architecture described in FIG. 3, there is no need for the femto cell downlink receiver to repeatedly correct/tune the hardware VCTCXO crystal 336 to each and every base station (NodeB or AP) within its coverage area in order to synchronise to each cell. In using a software digital oscillator 330, and control logic 326 configured to reject any frequency error estimation of a femto cell transmission, as described above, the femto cell downlink receiver's baseband modem 310 is able to synchronise in software to different macro cells and arrive at a mean frequency drift of the selected macro cells. The femto cell downlink receiver's baseband modem 310 then physically tunes the hardware VCTCXO crystal 336, a single time, so that it is within the desired performance range for all receivable macro cell NodeB transmissions. Advantageously, physically tuning the hardware VCTCXO crystal 336 a single time remains accurate until the next network listen is initiated by the Operator, which would typically be in a couple of days or a week, depending upon the VCTCXO part's drift rate. In a worst case scenario, following the known approach currently adopted, a femto cell downlink receiver may be configured by the Operator to scan the whole 3GPP DL frequency band (2.11 GHz to 2.17 GHz) for potential macro/femto cells. In which case, the hardware crystal oscillator is synchronised in turn to every detected ceil. This is time consuming, since this process will have to accommodate for a finite settling time, after which the hardware crystal oscillator typically reflects the frequency change applied. Doing this operation for every frequency correction per cell, will also consume time. In contrast, the software digital oscillator approach described with respect to FIG. 3 and FIG. 4 has no such associated settling time and the frequency correction applied is reflected instantaneously. Referring now to FIG. 4, a software digital quadrature-coupled oscillator architecture 400, is illustrated, in accordance with embodiments of the invention. Notably, the software digital quadrature-coupled oscillator architecture 400 comprises parallel slow-AGC logic and non-AGC controlled oscillator stage/output and AGC controlled final oscillator stage/output. The software digital quadrature-coupled oscillator architecture 400, in one embodiment of the invention, may be the software digital oscillator 330 of FIG. 3. In addition, the inventors have recognised a disadvantage with the prior art oscillator architecture proposed in FIG. 1, in that it is wholly sequential in nature, per LO quadrature generation path. The principle of operation of the standard Quadrature Coupled Recursive Oscillator illustrated in FIG. 4 is based on the following two trigonometric formulas, which produce the oscillator l/Q outputs as a recursive relation - i.e., the next output is dependent upon the past outputs of itself and the other Q/l component output(s): Cos(φ+Nx) = Cos(φ)Cos(Nx) - Sin(φ)Sin(Nx) [1] Sin(φ + Nx) = Sin(φ)Cos(Nx) + Cos(φ)Sin(Nx) where: N is equal to the number of stages. In FIG. 4, N=2; and φrepresents the phase angle change per l/Q sample and hence defines the frequency synthesized by the software digital oscillator, FR, using the relation: where Fs is 15.36 MHz - the 4 times over-sampled frequency. The initialisation values, Sin(φ) and Cos(φ), for a new frequency generated is set as follows: Sin(φ) ≈ φ [3] Cos(φ) ≈ 1 Sin(x) = Sin(φ ), Cos(x) = Cos(φ ) for small values of