TECHNICAL FIELD
[0001] The present disclosure relates, in general, to noise filters, and more specifically, relates to a low-noise circuit that incorporates complementary super source follower metal oxide silicon field-effect transistor (MOSFET).

BACKGROUND
[0002] The scaling of integrated circuit processes has led to steadily decreasing power supply voltages. Reducing power supply voltages reduces the power consumption of integrated circuits. Reduced power supply voltages also help prevent oxide breakdown that can occur with decreased gate-oxide thicknesses. Reduced power consumption of integrated circuits is particularly important in portable devices. Circuits that can be used for lower-power and lower supply voltage operation can be used in the design of high-performance integrated circuits.
[0003] A few existing techniques include active-RC filter, operational transconductance amplifier, source follower, flipped source follower and enhanced flipped voltage follower are commonly used as continuous-time filter circuits for biomedical applications. However, these filters used for biomedical applications suffer from high noise values in a band of interest of biomedical applications. Owing to high noise values the biomedical signal gets corrupted. Achieving low-noise values at low-voltage, low-current levels with low-power consumption is the major issue in these applications.
[0004] Therefore, it is desired to develop a means for achieving low-noise values at low-voltage, low-current levels with low-power consumption.

OBJECTS OF THE PRESENT DISCLOSURE
[0005] An object of the present disclosure relates, in general, to noise filters, and more specifically, relates to a low-noise circuit incorporates complementary super source follower metal oxide silicon field effect transistor (MOSFET).
[0006] Another object of the present disclosure is to provide a device that achieves low-noise values at low-voltage.
[0007] Another object of the present disclosure is to provide a device that achieves low-power consumption.
[0008] Another object of the present disclosure is to provide a device that achieves low voltage operation.
[0009] Yet another object of the present disclosure is to provide a device that is available at an affordable cost.

SUMMARY
[0010] The present disclosure relates, in general, in general, to noise filters, and more specifically, relates to a low-noise circuit incorporates complementary super source follower metal oxide silicon field effect transistor (MOSFET).
[0011] The present disclosure relates to a filter circuit device includes one or more n-channel metal-oxide semiconductor (NMOS) transistors comprising a first NMOS transistor and a second NMOS transistor, input signal to be filtered is applied to gate terminal of the first NMOS transistor and one or more P-channel metal–oxide–semiconductor (PMOS) transistors comprising a first PMOS transistor, a second p-channel metal-oxide semiconductor (PMOS) transistor and a third PMOS transistor, the filtered output is obtained between source terminal and drain terminal of second PMOS transistor and third PMOS transistor respectively, wherein the one or more NMOS transistors and the one or more PMOS transistors are arranged in such a manner to reduce noise values of biomedical signals.
[0012] According to an embodiment, bias voltage VB1 applied to the first PMOS transistor and bias voltages VB2 applied to the first NMOS transistor respectively for sourcing the required amount of current.
[0013] According to an embodiment, the first PMOS transistor and the second NMOS transistor performs necessary current sourcing and sinking action.
[0014] According to an embodiment, the second PMOS transistor connected between voltage terminal Vdd and output terminal Vout, which reduces noise values.
[0015] According to an embodiment, the device comprises one or more capacitors.
[0016] According to an embodiment, the one or more capacitors comprises a first capacitor and a second capacitor.
[0017] According to an embodiment, the first capacitor coupled to the first NMOS transistor and the second capacitor coupled to the second PMOS transistor.
[0018] According to an embodiment, source terminal and drain terminal of the first NMOS transistor are connected to the first capacitor, wherein both first NMOS transistor and the first capacitor performs first order filtration action.
[0019] According to an embodiment, the second PMOS transistor, the third PMOS transistor and the first capacitor performs second order filtration action.

BRIEF DESCRIPTION OF THE DRAWINGS
[0020] The following drawings form part of the present specification and are included to further illustrate aspects of the present disclosure. The disclosure may be better understood by reference to the drawings in combination with the detailed description of the specific embodiments presented herein.
[0021] FIG. 1 illustrates an exemplary representation of a low-noise circuit, in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION
[0022] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. If the specification states a component or feature “may”, “can”, “could”, or “might” be included or have a characteristic, that particular component or feature is not required to be included or have the characteristic.
[0023] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0024] The present disclosure relates, in general, to noise filters, and more specifically, relates to a low-noise circuit incorporates complementary super source follower metal oxide silicon field effect transistor (MOSFET). The circuit device enables to overcome limitations of the prior art by providing complementary super source follower technique based filter which shows low-noise values at low-voltage with low-power consumption. Additional MOSFET has been added to the pre-existing complementary source follower technique to implement the design of the proposed complementary super source follower technique for filters used in biomedical applications. The MOSFET so added is responsible for the low-noise operation at low voltage with low-power consumption.
[0025] The present disclosure can be described in enabling detail in the following examples, which may represent more than one embodiment of the present disclosure. The description of terms and features related to the present disclosure shall be clear from the embodiments that are illustrated and described; however, the invention is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents of the embodiments are possible within the scope of the present disclosure. Additionally, the invention can include other embodiments that are within the scope of the claims but are not described in detail with respect to the following description.
[0026] FIG. 1 illustrates an exemplary representation of a low-noise circuit, in accordance with an embodiment of the present disclosure.
[0027] Referring to FIG. 1, filter circuit 100 (also referred to as device 100, herein) that includes a combination of complementary unit and super source follower unit that creates complementary super source follower technique of adding a metal oxide silicon field effect transistor (MOSFET) with the pre-existing complementary MOSFET unit. The present disclosure can be applied to various changes and can have various embodiments, and specific embodiments will be illustrated in the drawings and described in detail. However, this is not intended to limit the present invention to specific embodiments, and should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention. In describing each drawing, similar reference numerals are used for similar components.
[0028] In an exemplary embodiment, the device 100 as presented in the example can be complementary super source follower technique-based filter circuit. The device 100 can include metal-oxide semiconductor (MOS) devices, where the MOS devices can include one or more N-channel metal-oxide semiconductor (NMOS) transistors (N1, N2) (102-1, 102-2), one or more p-channel metal-oxide semiconductor (PMOS) transistors (P1-P3) (104-1, 104-2, 104-3) along with capacitors (C1, C2) (106-1, 106-2) to form second order biquad for filter circuit.
[0029] The one or more NMOS transistors can include a first NMOS transistor 102-1 and a second NMOS transistor 102-2, where the first NMOS transistor 102-1 coupled to the second NMOS transistor 102-2. The one or more PMOS transistors can include a first PMOS transistor 104-1, a second PMOS transistor 104-2 and a third PMOS transistor 104-3. The first PMOS transistor 104-1 is connected to voltage terminal Vdd and coupled to the first NMOS transistor 102-1. The second PMOS transistor 104-2 coupled to the third PMOS transistor 104-3. The one or more NMOS transistors and the one or more PMOS transistors are arranged in such a manner to reduce noise values of biomedical signals.
[0030] The first PMOS transistor 104-1, the first NMOS transistor 102-1, the second NMOS transistor 102-2 and the first capacitor 106-1 are connected. The second PMOS transistor 104-2 coupled to the third PMOS transistor 104-3. The proposed filter circuit 100 can use an additional second PMOS transistor 104-2 connected between voltage terminal Vdd and output terminal Vout, which reduces noise values of biomedical signals as well as power consumption.
[0031] The input signal pertains to biomedical signal to be filtered is applied to gate terminal of the first NMOS transistor 102-1 whose source and drain terminals are connected to the first capacitor 106-1. Both the first NMOS transistor 102-1 and the first capacitor 106-1 performs 1st order filtration action. The source and drain terminals of the first NMOS transistor 102-1 are connected to gate terminals of the third PMOS transistor 104-3 and the second PMOS transistor 104-2 respectively. The third PMOS transistor 104-3, the second PMOS transistor 104-2 and the first capacitor 106-1 performs 2nd order filtration action. The filtered output is obtained between source and drain terminals of the third PMOS transistor 104-3 and the second PMOS transistor 104-2 respectively. The device enables to overcome the limitation of prior at by collective contribution of the third PMOS transistor 104-3 and second PMOS transistor 104-2 in filtration along with the first NMOS transistor 102-1. The first PMOS transistor 104-1, the second NMOS transistor 104-2 performs necessary current sourcing and sinking action.
[0032] The VB1-VB2 are the bias voltages applied to the MOS devices i.e., PMOS transistor P1 and NMOS transistor N1 respectively for sourcing the required amount of current. The bias voltage VB1 is applied to the first PMOS transistor 104-1 and the bias voltage VB2 is applied to the second NMOS transistor 102-2 for sourcing the required amount of current.
[0033] The embodiments of the present disclosure described above provide several advantages. The advantages achieved by the device of the present disclosure can be clear from the embodiments provided herein. The device achieves low-noise values at low-voltage, low-power consumption, low voltage operation and is available at an affordable cost.
[0034] It will be apparent to those skilled in the art that the device 100 of the disclosure may be provided using some or all of the mentioned features and components without departing from the scope of the present disclosure. While various embodiments of the present disclosure have been illustrated and described herein, it will be clear that the disclosure is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents will be apparent to those skilled in the art, without departing from the spirit and scope of the disclosure, as described in the claims.

ADVANTAGES OF THE PRESENT DISCLOSURE
[0035] The present disclosure provides a device that achieves low-noise values at low-voltage.
[0036] The present disclosure provides a device that achieves low-power consumption.
[0037] The present disclosure provides a device that achieves low voltage operation.
[0038] The present disclosure provides a device that is available at an affordable cost.

We Claims:

1. A filter circuit device (100) comprising:
one or more n-channel metal-oxide semiconductor (NMOS) transistors comprising a first NMOS transistor (102-1) and a second NMOS transistor (102-2), input signal to be filtered is applied to gate terminal of the first NMOS transistor (102-1); and
one or more P-channel metal–oxide–semiconductor (PMOS) transistors comprising a first PMOS transistor (104-1), a second p-channel metal-oxide semiconductor (PMOS) transistor (104-2) and a third PMOS transistor (104-3), the filtered output is obtained between source terminal and drain terminal of the second PMOS transistor and the third PMOS transistor respectively, wherein the one or more NMOS transistors and the one or more PMOS transistors are arranged in such a manner to reduce noise values of biomedical signals.
2. The device as claimed in claim 1, wherein bias voltage VB1 applied to the first PMOS transistor and bias voltages VB2 applied to the first NMOS transistor respectively for sourcing the required amount of current.
3. The device as claimed in claim 1, wherein the first PMOS transistor (104-1) and the second NMOS transistor (102-2) performs necessary current sourcing and sinking action.
4. The device as claimed in claim 1, wherein the second PMOS transistor connected between voltage terminal Vdd and output terminal Vout, which reduces noise values.
5. The device as claimed in claim 1, wherein the device comprises one or more capacitors.
6. The device as claimed in claim 1, wherein the one or more capacitors comprises a first capacitor and a second capacitor,
7. The device as claimed in claim 1, wherein the first capacitor coupled to the first NMOS transistor and the second capacitor coupled to the second PMOS transistor.
8. The device as claimed in claim 1, wherein source terminal and drain terminal of the NMOS transistor 102-1 are connected to the first capacitor 106-1, wherein both first NMOS transistor (102-1) and the first capacitor (106-1) performs first order filtration action.
9. The device as claimed in claim 1, wherein the second PMOS transistor (104-2), the third PMOS transistor (104-3) and the first capacitor (106-1) performs second order filtration action.