FORM 2
THE PATENTS ACT 1970
(39 of 1970)
&
The Patents Rules, 2003
COMPLETE SPECIFICATION
(See section 10 and rule 13)

1. CONTROL CARD

2. (A) Hi-Rel Electronics Ltd.
(B) An Indian Company
(C) B 117 GIDC Electronics Zone Sector 25
Gandhinagar 382044 Gujarat
India

The following specification particularly describes the invention and the manner in which it is to be performed.

Field of Invention:
The present invention relates to generation of controlled Pulse Width Modulated (PWM) signals. This is carried out by measuring and monitoring the output voltage, the current and the frequency and DC bus voltage of the power inverter. This process sequence is carried out by constantly measuring the voltage, the current and the frequency of the inverter and consequently calculating the true power for source selection and control of power for parallel redundancy. Pre-defined results are achieved by deploying two or more DSPs that are in constant communication with each other for redundancy signal and transparency.

In the Present invention the control circuit has deployed for control of power control products used in power conversion, for maintaining quality of power, or for power back-up and particularly in Uninterruptible Power Supply Systems (UPS) for single phase power output.

Background of the invention
The present invention scores over the existing device in the respect that to control the inverter output voltage, power and the waveform by taking feedback from the Direct Current (DC) bus voltage along with the output true Root Mean Square (RMS) voltage, the frequency and the wave shape of the inverter output which is being constantly corrected to achieve better results.

Exact true output power is calculated by taking reference of output voltage, current and frequency and this is used to source selection and parallel redundancy.

In the earlier designs, feedback was generally taken only from the DC bus or output voltage. Output source selection and parallel redundancy was controlled only by current signal measurement.

Object of the invention:
The object of the present invention is to overcome the limitations of the earlier existing devices and to deploy contemporary technology in a combination of hardware and software to make the control circuit more robust in order to perform to closer measurement tolerances as also to provide better control by measuring, monitoring and taking feedback from critical output sources like DC bus voltage, output true RMS voltage and the frequency and wave shape of the inverter.

Statement of the invention:
In this invention the latest generation of semiconductor devices is deployed in multiple numbers. This invention basically inherits exacting capacity to monitor and control critical parameters, through use of both latest hardware and commensurate software programming. This formidable combination enables monitoring of critical parameters more closely, through constant feedback to ensure better performance.

Summary of the invention:
The present invention has been necessitated to overcome the limitations of the earlier design in order to use multiple parameters to take feedback and to control & monitor, as well as correct the inverter output, using vital feedback from output voltage, current, frequency and DC bus voltage.

Brief description of the accompanying drawings:
Fig.1 is the overall block diagram of the present invention.
Fig. 2 enumerates a circuit diagram of the voltage and current measurement & control as depicted in Fig. 1.
Fig. 3 exemplifies the circuit diagram of power sharing control depicted in Fig. 1.

Detailed description of the invention
The inverter and the static switch, control circuit will now be described below with reference to Fig.1. In Fig. 1 the first and second units of inverters and the static switch are distinguished from each other by use of subscripts (a) & (b) respectively. DC voltages are obtained by rectifiers (not shown) or from the batteries (not shown) or by a combination thereof.

The DC voltages so obtained are applied to the DC power line (25a) of inverter (1a) and power line (25b) of inverter (1b) respectively. Inverter (1a) and (1b) convert the voltages on DC lines (25a) and (25b) to AC voltages.

Output isolation transformers and filters (2a) and (2b) are connected to the AC outputs of inverter (1a) and (1b) in order to change the inverter outputs to sinusoidal waves. Inverter static switches (4a) and (4b) are connected to output circuits of the output isolation transformer and filters (2a) and (2b) to allow inverters (1a) and (1b) to be connected in parallel or to disconnect one inverter (1a) from the other inverter (1b).

Static switches (3a) and (3b) are connected to the bypass source (22). Static switches (3a), (3b), (4a) and (4b) are connected in parallel and at this junction point load (23) is connected. In the normal mode, the inverter static switch (4a) and (4b) will remain ON. When both inverters become unhealthy or the system is manually transferred to bypass static switch (3a) and (3b) will be switched ON is bypass is healthy.

The circuit of Fig.1 also includes inverter voltage feedback signal (13a) and (13b), inverter current feedback (15a) and (15b), output current feedback (14a) and (14b) and bypass voltage (16a) and (16b) as input to V (voltage) / I (current) / F (frequency) / P (power) measurement and control module (9a). In the master mode of operation DPLL (Digital Phase Lock Loop) (11a) and (11b) will take bypass frequency (19a) and (19b) as frequency reference. The function of DPLL is to synchronize inverter source with bypass source and to generate reference frequency (18a) and (18b) to the slave inverter.

In the slave mode of operation DPLL (11a) and (11b) will take master reference frequency (17a) and (17b) as frequency reference. Pulse Width Modulation (PWM) control module (8a) and (8b) generate sine-coded PWM whose width is decided by signal (20a) and (20b) of module (9a) and (9b) and its phase and frequency is decided by the signals of (21a) and (21b) of module (11a) and (11b).

Static switch control module (12a) decides the static switch position on the inverter, on the alternate or to disable as per the control signal of (24a) and (24b).

Fig.2 shows a basic configuration of the voltage control as well as current limit function of inverter (1a) and (1b) – when it is opened in master mode or in the stand alone mode.

When inverter current limit is inactive, from inverter voltage feedback (13a) and (13b), v_inv_moving_average 96 is calculated using Digital Signal Processing (DSP) and is compared with set voltage_reference 97 and error is generated and processed through PI control module 100 and its output (20a) and (20b) will decide the width of the PWM controller.

In this module (9a) and (9b) from inverter current feedback (15a) and (15b), the moving average of the current is measured 90 and is compared with current limit reference. If the inverter moving average is more than the current limit reference, then current limit will be activated 93 and current error is processed through PI control 95 and will decrement voltage reference 97. By this, the inverter voltage is decremented, keeping current constant at current limit reference.
Fig.3 shows a basic circuit configuration of power sharing functions of either of the slave inverter (1a) and (1b) in parallel redundant mode. From the inverter voltage feedback (13a) or (13b) and inverter current (15a) or (15b), moving average of the inverter active power is measured 102 and from the inverter voltage feedback (13a) or (13b) and output current feedback (14a) or (14b), moving average of output active power 101 is measured.

Moving average of inverter active power 102 and half the value of moving average of output active power 101 is compared and error is processed through PI control 104 and this output will decide the width of the PWM control (20a) or (20b) in such a manner that power sharing between the two inverters will be approximately equal.

We Claim:

1. CONTROL CARD consists with inverters(1a &1b), filters(2a &2b) , static switch (3a & 3b), Inverter static switches (4a & 4b) and control circuit, wherein
DC voltage is obtained by rectifiers or by batteries or by combination thereof;
Output isolation transformers and filters (2a) and (2b) are connected to the AC outputs of inverter (1a) and (1b) in order to change the inverter outputs to sinusoidal waves;
the control circuit includes inverter voltage feedback signal (13a) & (13b), inverter current feedback (15a) & (15b), output current feedback (14a) & (14b) and bypass voltage (16a) and (16b) as input to voltage, current, frequency , power measurement and control module(9a) & (9b).

2. CONTROL CARD as claimed in claim 1, wherein the DC voltages are applied to the DC power line (25a) of inverter (1a) and power line (25b) of inverter (1b) respectively.

3. CONTROL CARD as claimed in claim 1, wherein Inverter (1a) and (1b) convert the voltages on DC lines (25a) and (25b) to AC voltages.

4. CONTROL CARD as claimed in claim 1, wherein inverter static switches (4a) & (4b) are connected to output circuits of the output isolation transformer and filters (2a) & (2b) to allow inverters (1a) and (1b) to be connected in parallel or to disconnect one inverter(1a) from the other inverter (1b).

5. CONTROL CARD as claimed in claim 1, wherein static switches (3a) and (3b) are connected to the bypass source (22).

6. CONTROL CARD as claimed in claim 4 & 5 , wherein Static switches (3a) & (3b) and Inverter static switches (4a) and (4b) are connected in parallel and at this junction point load (23) is connected.

7. CONTROL CARD as claimed in claim 1, wherein in the normal mode of control circuit, the inverter static switch (4a) and (4b) will remain ON and when both inverters become unhealthy or the system is manually transferred to bypass static switch (3a & 3b) will be switched ON is bypass is healthy;

in the mater mode of operation ((DPLL) digital phase lock loop (11a & 11b) will take bypass frequency (19a & 19b) as frequency;

in the slave mode of operation (DPLL) digital phase lock loop (11a & 11b) will take master reference frequency (17a & 17b) as frequency.

8. CONTROL CARD as claimed in claim 1, wherein PWM control module (8a & 8b) generate sine-coded PWM, whose width is decided by signal generates single (20a & 20b) of control module (9a & 9b).

9. CONTROL CARD as claimed in claim 1, wherein inverter current limit is inactive, from inverter voltage feedback (13a & 13b), v_inv_moving_average 96 is calculated using Digital Signal Processing (DSP) and is compared with set voltage_reference 97 and error is generated and processed through PI control module 100 and its output (20a & 20b) will decide the width of the PWM controller.

10. CONTROL CARD as claimed in claim 1, wherein control module (9a & 9b) from inverter current feedback (15a) and (15b), the moving average of the current is measured 90 and is compared with current limit reference wherein the inverter moving average is more than the current limit reference, then current limit will be activated 93 and current error is processed through PI control 95 and will decrement voltage reference 97.

11. CONTROL CARD as claimed substantially as herein described with reference to the foregoing description and the accompanying drawings.

Dated 12th day of June , 2009.

Dr. Rajeshkumar H. Acharya
Advocate & Patent Agent
For and on behalf of the applicant