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Cricuitry And Method For Gan Device

Abstract: Provided are a circuit system and method for a gallium nitride (GaN) device. The circuit system comprises: a negative bias voltage circuit configured to provide a gate negative bias voltage of the GaN device; a drain switch circuit configured to connect or disconnect a drain positive voltage of the GaN device; a control circuit configured to control the drain switch circuit on the basis of the provision of the negative bias voltage so that the drain positive voltage is connected after a gate voltage reaches the negative bias voltage and disconnected before the negative bias voltage completely disappears.

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Patent Information

Application #
Filing Date
14 November 2018
Publication Number
04/2020
Publication Type
INA
Invention Field
ELECTRONICS
Status
Email
patent@depenning.com
Parent Application
Patent Number
Legal Status
Grant Date
2023-12-04
Renewal Date

Applicants

ALCATEL LUCENT
Nokia Paris-Saclay, Route de Villejust, 91620 Nozay

Inventors

1. FENG, Baoliang
388# Ningqiao RD, Pudong Jinqiao, Shanghai 201206
2. SHI, Jingjing
388# Ningqiao RD, Pudong Jinqiao, Shanghai 201206
3. LI, Zaiqing
388# Ningqiao RD, Pudong Jinqiao, Shanghai 201206

Specification

1. Circuitry for a gallium nitride (GaN) device, comprising:
a negative bias circuit configured to provide a negative bias voltage for a gate of the GaN device;
a drain switch circuit configured to turn on or off a positive voltage for a drain of the GaN device; and
a control circuit configured to control the drain switch circuit based on provision of the negative bias voltage, such that the positive voltage for the drain is turned on after a voltage of the gate reaches the negative bias voltage and turned off before the negative bias voltage completely disappears.
2. The circuitry according to claim 1, wherein the control circuit is further
configured to:
turn on the drain switch circuit when an output voltage of the negative bias circuit is decreased from a voltage of zero to a threshold voltage, and
turn off the drain switch circuit when the output voltage of the negative bias circuit is increased from the negative bias voltage to the threshold voltage,
the threshold voltage being between the negative bias voltage and the voltage of zero.
3. The circuitry according to claim 2, wherein the control circuit includes at least one of a resistance divider circuit, a comparator circuit, and a Zener diode circuit.
4. The circuitry according to claim 1, further comprising:
a voltage holding circuit configured to hold the negative bias voltage for the gate of the GaN device for a predetermined period when the output voltage of the negative bias circuit begins to increase from the negative bias voltage.
5. The circuitry according to claim 1, wherein the negative bias circuit includes a
negative switch power supply buck-boost circuit, the negative switch power supply
buck-boost circuit converting a power supply voltage into the negative bias voltage and
providing a current required for an operation of the GaN device.

6. The circuitry according to claim 1, wherein the drain switch circuit is further configured to increase from a voltage of zero slowly at a first predetermined speed to the positive voltage for the drain when being turned on, and to decrease from the positive voltage for the drain quickly at a second predetermined speed to the voltage of zero when being turned off.
7. The circuitry according to claim 1, further comprising:
a bias switch circuit connected between the negative bias circuit and the gate of the GaN device and configured to apply an output voltage of the negative bias circuit to the gate of the GaN device based on a control command.
8. The circuitry according to claim 1, further comprising:
a big capacitor having a predetermined large capacitance and connected between the drain of the GaN device and ground.
9. A method for a gallium nitride (GaN) device, comprising:
providing a negative bias voltage to a gate of the GaN device by decreasing a voltage of zero to the negative bias voltage;
providing a positive voltage to a drain of the GaN device during the decreasing;
turning off the negative bias voltage for the gate of the GaN device by increasing the negative bias voltage to the voltage of zero; and
turning off the positive voltage for the drain of the GaN device during the increasing.
10. The method according to claim 9, wherein providing the positive voltage to the
drain of the GaN device during the decreasing comprises:
providing the positive voltage to the drain of the GaN device when the voltage of zero is decreased to a threshold voltage, the threshold voltage being between the negative bias voltage and the voltage of zero.
11. The method according to claim 9, wherein turning off the positive voltage for the
drain of the GaN device during the increasing comprises:
turning off the positive voltage for the drain of the GaN device when the negative bias voltage is increased to the threshold voltage.

12. The method according to claim 9, further comprising:
holding the negative bias voltage for the gate of the GaN device for a predetermined period when the negative bias voltage begins to increase.
13. The method according to claim 9, wherein the decreasing and the increasing are
performed by a negative switch power supply buck-boost circuit, and the method further
comprising:
providing a current required for an operation of the GaN device by the negative switch power supply buck-boost circuit.
14. The method according to claim 9, wherein providing the positive voltage to the
drain of the GaN device during the decreasing comprises:
providing the positive voltage to the drain of the GaN device by increasing a voltage of zero slowly at a first predetermined speed to the positive voltage for the drain; and
turning off the positive voltage for the drain of the GaN device by decreasing the positive voltage for the drain quickly at a second predetermined speed to the voltage of zero.
15. The method according to claim 9, further comprising:
applying a big capacitor having a predetermined large capacitance as a decoupling capacitor of the GaN device.

Documents

Application Documents

# Name Date
1 201847042728-IntimationOfGrant04-12-2023.pdf 2023-12-04
1 201847042728.pdf 2018-11-14
2 201847042728-PatentCertificate04-12-2023.pdf 2023-12-04
2 201847042728-TRANSLATIOIN OF PRIOIRTY DOCUMENTS ETC. [14-11-2018(online)].pdf 2018-11-14
3 201847042728-STATEMENT OF UNDERTAKING (FORM 3) [14-11-2018(online)].pdf 2018-11-14
3 201847042728-FER.pdf 2021-10-17
4 201847042728-REQUEST FOR EXAMINATION (FORM-18) [14-11-2018(online)].pdf 2018-11-14
4 201847042728-CLAIMS [14-09-2021(online)].pdf 2021-09-14
5 201847042728-PROOF OF RIGHT [14-11-2018(online)].pdf 2018-11-14
5 201847042728-FER_SER_REPLY [14-09-2021(online)].pdf 2021-09-14
6 201847042728-PRIORITY DOCUMENTS [14-11-2018(online)].pdf 2018-11-14
6 201847042728-FORM 3 [14-09-2021(online)].pdf 2021-09-14
7 201847042728-POWER OF AUTHORITY [14-11-2018(online)].pdf 2018-11-14
7 201847042728-FORM-26 [14-09-2021(online)].pdf 2021-09-14
8 201847042728-Information under section 8(2) [14-09-2021(online)].pdf 2021-09-14
8 201847042728-FORM 18 [14-11-2018(online)].pdf 2018-11-14
9 201847042728-FORM 1 [14-11-2018(online)].pdf 2018-11-14
9 201847042728-OTHERS [14-09-2021(online)].pdf 2021-09-14
10 201847042728-DRAWINGS [14-11-2018(online)].pdf 2018-11-14
10 201847042728-FORM 3 [22-04-2019(online)].pdf 2019-04-22
11 201847042728-DECLARATION OF INVENTORSHIP (FORM 5) [14-11-2018(online)].pdf 2018-11-14
11 Correspondence by Agent_Form-1_28-11-2018.pdf 2018-11-28
12 201847042728-CLAIMS UNDER RULE 1 (PROVISIO) OF RULE 20 [14-11-2018(online)].pdf 2018-11-14
12 201847042728-COMPLETE SPECIFICATION [14-11-2018(online)].pdf 2018-11-14
13 201847042728-CLAIMS UNDER RULE 1 (PROVISIO) OF RULE 20 [14-11-2018(online)].pdf 2018-11-14
13 201847042728-COMPLETE SPECIFICATION [14-11-2018(online)].pdf 2018-11-14
14 201847042728-DECLARATION OF INVENTORSHIP (FORM 5) [14-11-2018(online)].pdf 2018-11-14
14 Correspondence by Agent_Form-1_28-11-2018.pdf 2018-11-28
15 201847042728-DRAWINGS [14-11-2018(online)].pdf 2018-11-14
15 201847042728-FORM 3 [22-04-2019(online)].pdf 2019-04-22
16 201847042728-FORM 1 [14-11-2018(online)].pdf 2018-11-14
16 201847042728-OTHERS [14-09-2021(online)].pdf 2021-09-14
17 201847042728-Information under section 8(2) [14-09-2021(online)].pdf 2021-09-14
17 201847042728-FORM 18 [14-11-2018(online)].pdf 2018-11-14
18 201847042728-POWER OF AUTHORITY [14-11-2018(online)].pdf 2018-11-14
18 201847042728-FORM-26 [14-09-2021(online)].pdf 2021-09-14
19 201847042728-PRIORITY DOCUMENTS [14-11-2018(online)].pdf 2018-11-14
19 201847042728-FORM 3 [14-09-2021(online)].pdf 2021-09-14
20 201847042728-PROOF OF RIGHT [14-11-2018(online)].pdf 2018-11-14
20 201847042728-FER_SER_REPLY [14-09-2021(online)].pdf 2021-09-14
21 201847042728-REQUEST FOR EXAMINATION (FORM-18) [14-11-2018(online)].pdf 2018-11-14
21 201847042728-CLAIMS [14-09-2021(online)].pdf 2021-09-14
22 201847042728-STATEMENT OF UNDERTAKING (FORM 3) [14-11-2018(online)].pdf 2018-11-14
22 201847042728-FER.pdf 2021-10-17
23 201847042728-TRANSLATIOIN OF PRIOIRTY DOCUMENTS ETC. [14-11-2018(online)].pdf 2018-11-14
23 201847042728-PatentCertificate04-12-2023.pdf 2023-12-04
24 201847042728.pdf 2018-11-14
24 201847042728-IntimationOfGrant04-12-2023.pdf 2023-12-04

Search Strategy

1 searchE_11-02-2021.pdf

ERegister / Renewals

3rd: 23 Jan 2024

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