TECHNICAL FIELD
[0001] The present embodiments relate generally to a buck converter (step-down converter),
and more particularly, to a delta-sigma modulator controlled buck converter.
BACKGROUND
[0002] A buck converter (step-down converter) is a DC-to-DC power converter that steps
down voltage (while stepping up current) from its input (supply) to its output (load). It is a
class of switched-mode power supply (SMPS) typically containing at least two
semiconductors (a diode and a transistor, although modern buck converters frequently replace
the diode with a second transistor used for synchronous rectification) and at least one energy
storage element, a capacitor, inductor, or the two in combination. To reduce voltage ripple,
filters made of capacitors (sometimes in combination with inductors) are normally added to
such a converter's output (load-side filter) and input (supply-side filter). Switching converters
(such as buck converters) provide much greater power efficiency as DC-to-DC converters
than linear regulators, which are simpler circuits that lower voltages by dissipating power as
heat, but do not step up output current.
[0003] Presently, pulse width modulation (PWM) controllers are used in buck converters for
switching of power supply. The main use is to allow control of power supplied to electrical
devices, especially to inertial loads, such as an electric motor, wherein continuous power is
not required for the motor to operate. Burst power can save the total power supplied to the
load while achieving the same performance from the device as it runs on continuous power.
PWM technique is used in devices like DC motors, loudspeakers, Class-D amplifiers, SMPS
etc. In PWM, ON time or OFF time of a pulse is varied according to amplitude of modulating
signal, keeping the (ON time + OFF time) time of the pulse constant. The (ON time + OFF
time) of a pulse is called „Period‟ of the pulse, and the ratio of the ON time or OFF time with
the Period is called the „Duty Cycle‟. Hence the PWM is a kind of modulation which keeps
the Period of pulses constant but varying their duty cycle according to the amplitude of the
modulating signal.
[0004] Despite the fact that the PWM controls the power supplied to electrical devices, one
drawback of the PWM controllers is that ripple exists in the output voltage due to clock feed
through. Ripple is an unwanted residual periodic variation of direct current (DC) output of a
power supply that has been derived from an alternating current (AC) source. This ripple
appears as a noise source added to the desired DC value.
3
[0005] Therefore, there is a need to provide an effective and an efficient power supply
control mechanism to reduce unwanted residual periodic variation of direct current (DC)
output of power supply (ripple), and thereby enhance stability of overall control mechanism
by line and load regulations.
OBJECTS OF THE INVENTION
[0006] An object of the present disclosure is to provide an effective and an efficient power
supply control mechanism to reduce unwanted residual periodic variation of direct current
(DC) output of power supply (ripple).
[0007] Another object of the present disclosure is to provide an effective and an efficient
power supply control mechanism to enhance stability of overall control mechanism by line
and load regulations.
[0008] Yet another object of the present disclosure is to provide a delta-sigma (ΔΣ)
modulator controller based buck converter that reduces unwanted residual periodic variation
of direct current (DC) output of power supply (ripple).
[0009] Still another object of the present disclosure is to provide a delta-sigma (ΔΣ)
modulator controller based buck converter that enhances stability of overall control
mechanism by line and load regulations.
[0010] These objects are achieved by a delta-sigma (ΔΣ) modulator controller based buck
converter having the features of claim 1 and claim 11 and other dependent claims.
SUMMARY
[0011] This summary is provided to introduce concepts related to delta-sigma (ΔΣ)
modulator controller based buck converter and the concepts are further described below in
the detailed description. This summary is not intended to identify essential features of the
claimed subject matter nor is it intended for use in determining or limiting the scope of the
claimed subject matter.
[0012] According to an aspect, the present disclosure provides a Delta-Sigma (ΔΣ) modulator
controller based DC-DC buck converter that includes an attenuator, a compensator having an
error amplifier module, and a controller. The attenuator receives an output voltage from a
switching power supply source and reduces strength of the output voltage received. The
compensator receives the output voltage having the strength reduced from the one or more
attenuator, amplifies the output voltage received, and stabilizes the output voltage amplified.
The controller converts the stabilized output voltage received from the compensator into a
time-varying modulation signal.
4
[0013] In an aspect, the strength of the output voltage can be reduced by subtracting, by
using a comparator, output voltage received from a temperature compensated stable
reference, the temperature compensated stable reference can be being a band gap reference.
[0014] In another aspect, the compensator can be a filter.
[0015] In yet another aspect, the compensator amplifies the output voltage by increasing the
power or amplitude of the output voltage received from the one or more attenuators.
[0016] In another aspect, the compensator stabilizes the output voltage amplified by
offsetting an error or an undesired effect from the amplified output voltage.
[0017] In yet another aspect, the controller can be a nonlinear element or nonlinear device.
[0018] In another aspect, the time-varying modulation signal is transmitted to a driver circuit
that is adapted to provide one or more sharper transitions to the one or more switching power
supply sources. In yet another aspect, the time-varying modulation signal can be utilized to
control the one or more switching power supply sources.
[0019] In an aspect, Delta-Sigma (ΔΣ) modulator controller based DC-DC buck converter of
the present disclosure controls or reduces unwanted residual periodic variation of direct
current (DC) output of power supply (ripple), and thereby enhances stability of overall
control mechanism by line and load regulations.
[0020] The present disclosure further provides a feedback control system based DC-DC
power converter that steps down voltage while stepping up current from an input power
supply to an output supply connected to one or more loads. In an aspect, the feedback control
system can include an attenuator, a compensator device having an error amplifier module,
and a nonlinear device, where the attenuator can be connected to an output supply generated
by one or more power supply switch, and is configured to reduce strength of the output
supply generated by subtracting, by using a comparator, output voltage received from a
temperature compensated stable reference. The compensator device having an error amplifier
module can amplify the output supply having strength reduced by increasing power or
amplitude of the output voltage received from the one or more attenuators and stabilizes
output supply amplified by offsetting an error or an undesired effect from the amplified
output voltage. The nonlinear device converts the output supply stabilized into a time-varying
modulation signal thereby controlling the one or more power supply switches. In an aspect,
the time-varying modulation signal can include a fixed period varying-frequency pulse
waveform.
[0021] In an aspect, the feedback control system based DC-DC power converter can be
configured to control or reduce unwanted residual periodic variation of direct current (DC)
5
output of power supply (ripple), thereby enhancing stability of the overall control mechanism
by line and load regulations.
[0022] As compared to conventional PWM controller based DC-DC buck converter, Delta-
Sigma (ΔΣ) modulator controller or the feedback control system of the present disclosure
controls and reduces unwanted residual periodic variation of direct current (DC) output of
power supply (ripple), thereby enhancing stability of overall control mechanism by line and
load regulations. Further, performance of the overall circuitry is also enhanced.
[0023] In contrast to prior-art, compensator device according to the present disclosure is
modified and includes an error amplifier module to amplify output supply having strength
reduced, by using a comparator, by increasing power or amplitude of output voltage received
from one or more attenuators, and stabilizes the amplified output supply by offsetting an error
or an undesired effect from the amplified output voltage. Further, the nonlinear device
according to the present disclosure converts the output supply stabilized into a time-varying
modulation signal, thereby controlling the one or more power supply switches, wherein the
time-varying modulation signal comprises a fixed period varying-frequency pulse waveform.
[0024] Other features of embodiments of the present disclosure will be apparent from
accompanying drawings and from detailed description that follows.
BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS
[0025] In the figures, similar components and/or features may have the same reference label.
Further, various components of the same type may be distinguished by following the
reference label with a second label that distinguishes among the similar components. If only
the first reference label is used in the specification, the description is applicable to any one of
the similar components having the same first reference label irrespective of the second
reference label.
[0026] FIG.1 is a circuit diagram of a synchronous buck converter using CMOS IC as
available in the prior-art.
[0027] FIG.2(a) illustrates a block diagram of a typical buck-type SMPS as available in the
prior-art.
[0028] FIG.2(b) illustrates a circuit diagram of typical buck-type SMPS as available in the
prior-art.
[0029] FIG.3 illustrates designing of a conventional PWM controller.
[0030] FIG.4 illustrates gain and phase plot of output passive filter associated with the PWM
Controller according to FIG. 3.
6
[0031] FIG.5 illustrates gain and phase plot of proportional-Integral PI compensator
associated with the PWM Controller according to FIG. 3.
[0032] FIG.6 illustrates a switched-capacitor ΔΣ modulator in accordance with an
embodiment of the present invention.
[0033] FIG.7 illustrates a gain and phase plot of the output passive filter associated with ΔΣ
modulator in accordance with an embodiment of the present disclosure.
[0034] FIG.8 illustrates a gain and phase plot of PID compensator associated with ΔΣ
modulator within accordance with an embodiment of the present disclosure.
[0035] FIG.9 illustrates a gain and phase plot of op-amp showing the phase and unity gain
crossover frequency upon implementation of ΔΣ modulator in accordance with an
embodiment of the present disclosure.
[0036] FIG.10(a) illustrates a circuit diagram of the PWM controller as available in the priorart.
[0037] FIG.10(b) illustrates an input and output waveforms of the PWM controller illustrated
in FIG. 10(a).
[0038] FIG.11 illustrates a fast Fourier transform (FFT) output waveform of PWM controller
based DC-DC buck converter illustrated in FIG. 10(a).
[0039] FIG.12 illustrates an input (Sine wave) and output waveform of the delta sigma (ΔΣ)
modulator illustrated in FIG. 6, in accordance with an embodiment of the present disclosure.
[0040] FIG.13 illustrates FFT spectra of the delta-sigma modulator controlled DC-DC buck
converter illustrated in FIG. 6 in accordance with an embodiment of the present disclosure.
[0041] FIG.14 illustrates a FFT plot of delta-sigma modulator illustrated in FIG. 6 in
accordance with an embodiment of the present disclosure.
[0042] FIG.15 illustrates an output voltage and current waveform for sudden switching of
current 0mA 50mA 100mA 50mA 0mA for the conversion of 5V-3.3V in accordance with an
embodiment of the present disclosure.
[0043] FIG.16 illustrates a comparative study of different input (5V,4.5V,4V) in accordance
with an embodiment of the present disclosure.
[0044] FIG.17 illustrates a compensator having error module and a controller in accordance
with an embodiment of the present disclosure.
DETAILED DESCRIPTION OF THE PRESENT INVENTION
[0045] Delta-sigma (ΔΣ) modulator controller based buck converter is described.In the
following description; numerous specific details are set forth in order to provide a thorough
understanding of embodiments of the present disclosure. It will be apparent to one skilled in
7
the art that embodiments of the present invention may be practiced without some of these
specific details.
[0046] Embodiments of the present invention include various steps that will be described
below. The steps may be performed by hardware components or may be embodied in
machine-executable instructions, which may be used to cause a general-purpose or specialpurpose
processor programmed with the instructions to perform the steps. Alternatively, steps
may be performed by a combination of hardware, software, firmware and/or by human
operators.
[0047] Embodiments of the present invention may be provided as a computer program
product, which may include a machine-readable storage medium tangibly embodying thereon
instructions, which may be used to program a computer (or other electronic devices) to
perform a process. The machine-readable medium may include, but is not limited to, fixed
(hard) drives, magnetic tape, floppy diskettes, optical disks, compact disc read-only
memories (CD-ROMs), and magneto-optical disks, semiconductor memories, such as ROMs,
PROMs, random access memories (RAMs), programmable read-only memories (PROMs),
erasable PROMs (EPROMs), electrically erasable PROMs (EEPROMs), flash memory,
magnetic or optical cards, or other type of media/machine-readable medium suitable for
storing electronic instructions (e.g., computer programming code, such as software or
firmware).
[0048] Various methods described herein may be practiced by combining one or more
machine-readable storage media containing the code according to the present invention with
appropriate standard computer hardware to execute the code contained therein. An apparatus
for practicing various embodiments of the present invention may involve one or more
computers (or one or more processors within a single computer) and storage systems
containing or having network access to computer program(s) coded in accordance with
various methods described herein, and the method steps of the invention could be
accomplished by modules, routines, subroutines, or subparts of a computer program product.
[0049] If the specification states a component or feature “may”, “can”, “could”, or “might”
be included or have a characteristic, that particular component or feature is not required to be
included or have the characteristic.
[0050] Although the present disclosure has been described with the purpose of switching
power supply, it should be appreciated that the same has been done merely to illustrate the
invention in an exemplary manner and any other purpose or function for which explained
structure or configuration can be used, is covered within the scope of the present disclosure.
8
[0051] Exemplary embodiments will now be described more fully hereinafter with reference
to the accompanying drawings, in which exemplary embodiments are shown. This invention
may, however, be embodied in many different forms and should not be construed as limited
to the embodiments set forth herein. These embodiments are provided so that this disclosure
will be thorough and complete and will fully convey the scope of the invention to those of
ordinary skill in the art. Moreover, all statements herein reciting embodiments of the
invention, as well as specific examples thereof, are intended to encompass both structural and
functional equivalents thereof. Additionally, it is intended that such equivalents include both
currently known equivalents as well as equivalents developed in the future (i.e., any elements
developed that perform the same function, regardless of structure).
[0052] Thus, for example, it will be appreciated by those of ordinary skill in the art that the
diagrams, schematics, illustrations, and the like represent conceptual views or processes
illustrating systems and methods embodying this invention. The functions of the various
elements shown in the figures may be provided through the use of dedicated hardware as well
as hardware capable of executing associated software. Similarly, any switches shown in the
figures are conceptual only. Their function may be carried out through the operation of
program logic, through dedicated logic, through the interaction of program control and
dedicated logic, or even manually, the particular technique being selectable by the entity
implementing this invention. Those of ordinary skill in the art further understand that the
exemplary hardware, software, processes, methods, and/or operating systems described
herein are for illustrative purposes and, thus, are not intended to be limited to any particular
named
[0053] Delta-sigma (ΔΣ) modulator controller based buck converter is described for detecting
and preventing kernel level exploits.
[0054] FIG.1 illustrates an existingcircuit diagram of synchronous buck converter using
CMOS IC as available in the prior-art. As shown in FIG.1, a PWM controlled DC-DC buck
converter includes a CMOS IC 102 having a PWM controller 104 and a driver 106 for
controlling switching of power supply.
[0055] FIG.2(a) illustrates a block diagram of a typical buck-type SMPSas available in the
prior-art. The buck-type SMPS may include one or more attenuators, one or more
compensators, one or more controllers, and one or more switching components. FIG.2(b)
illustrates a circuit diagram of the typical buck-type SMPS associated with the FIG.
2(a).However, one major drawback of the PWM approach designed, and as discussed in the
background section above, is that ripple exists in the output voltage due to clock feed
through, which ripple appears as a noise source added to the desired DC value.
9
[0056] In order to solve the above drawback of the PWM approach designed, the present
disclosure provides a new compensator having an embedded error amplifier module and a
controller for generating a time-varying modulation signal. Following are the main
components of the the present disclosure (the details of these main components are further
explained in FIG.17 below):
a) A differencing mechanism, such as dynamic comparator, that subtracts output
of power supply from a temperature compensated stable reference such as a band gap
reference Vref.
b) A compensation network (compensator) that is an active filter used to
contribute gain and designed to stabilize closed loop.
c) A controller that is a nonlinear device used to convert error value that has been
filtered by the compensator into a time-varying modulation signal.
d) Output of the controller is then delivered to a driver circuit that gives
switching transistor sharper transitions.
e) Modulation signal is then used to control power-supply switches, and
therefore closes the feedback loop
[0057] Controller for the control of DC-DCbuck converter in conventional PWM controlleris
expressed as:
{
}
( )
( ) (
) Σ (
)
(1)
Where
is the PSD of
[0058] In contrast, a controller for the control of DC-DC buck converter in ΔΣ modulatorbased
controller according to the present invention can be expressed as:
( ) (2)
Where X is the input signal and N is the additive quantization noise.
[0059] In one implementation, the control schemes of DC-DC buck switching converters
may be configured, but are not limited:
 To ensure stable loop response of the switching converters, the usual practice is to
design for a gain of at least 6 dB and phase margin of at least 45○. Under this
condition second order system would have critically damped step response.
 For the system to be stable the unity gain crossover frequency must be half of the
switching frequency. This ensures Nyquist Sampling Theory.
 Even the unity gain crossover frequency should be high enough to allow the switching
converter to respond quickly to its output transients.
10
 Having set the unity gain crossover frequency, the gain of the error amplifier is
selected to yield a total loop gain of 0 dB at unity gain crossover frequency.
 The magnitude response of the error amplifier is designed to cross 0 dB at a slope of
(-) 20 dB/decade with desired gain margin.
[0060] In one implementation, in order to show that DELTA sigma modulator controlled
DC-DC buck converter performs better in comparison to conventional PWM controlled DCDC
buck converter, both the convertors are designed and their outputs are compared.
[0061] In one implementation, for designing of PWM controlled DC-DC buck converter,
following parameters may be required considered:
 Input Voltage: 5V
 Output Voltage: 3.3V
 Required duty cycle is D = 3.3/5 =0 .66 = 66%.
 Operating frequency: 5 MHz
 Load resistor is kept at the value of Rout = 11 Ω
 Output current as 300 mA
[0062] To achieve the above:
1) Selection of Inductance (L):
Sampling frequency= Fs =5M Hz.
( )
(3)
ΔI= peak to peak current ripple in the inductor.
On operating the converter in continuous mode of operation, chosen, ΔI=27.2mA
 The value of L=8.25μ H
2) Selection of corner frequency of the output filter (Fc), load capacitance (Cout) and
effective series capacitance(Rc):
( - ) (
)
(4)
Chosen, ΔVout = .136 mV
 The value of Fc=17.5224KHz
√
(5)
 The value of Cout= 10μ F
 Effective series resistance of the capacitor Cout is Rc = 0.5 Ω
3) Design of Attenuator: The sampling network, R1 and R2, contributes an attenuation
according to its sampling ratio R2/(R1+R2).The gain attenuation of the sampling network
is 20*log (2.5/3.3) = (-) 2.41dB.The chosen value of R1=8K, R2=25K.
11
4) Design of PWM modulator block: PWM controller uses a fixed frequency varying
duty cycle modulation scheme to achieve the desired control signal. One drawback of the
PWM approach is that ripple exists in the output voltage due to clock feed through. When
the output of the error amplifier output is at its peak value of 1.8V, the duty cycle is 100%
and the average voltage at the input end of the output inductor is 5 V. FIG.3 illustrates an
existing PWM Controller designed using the above selected components/parameters. As
shown in FIG.3, the Vline value chosen as 5 V. Csaw = 5pF &Rsaw = 88KΩ for generating
1.8 V saw-tooth wave.
 The low frequency gain of the open loop buck converter is (8.87-2.41)=
6.46dB
 Natural frequency of the output filters
*
( )
+
17.137 KHz(6)
 ESR break frequency =
=31.831 KHz.
5) Design of compensator: Unity gain crossover frequency (F1) = (1/5th of switching
frequency (Fs)) = 1MHz
FIG.4 illustrates gain and phase plot of output passive filter associated with the conventional
PWM Controller designed as shown in FIG. 3. Utilizing the values form the FIG.4, a transfer
function of the output filter is given by:
( )
( )(7)
It may be clearly understood from the transfer function and bode plot that it is a second order
system with a zero as Rc. Hence, the compensation required is PI (proportional-
Integral).FIG.5 illustrates gain and phase plot of PI compensator associated with the PWM
Controller designed as shown in FIG. 3.
[0063] In order to show performance efficiency, a delta-sigma modulator controlled DC-DC
buck converter according to the present disclosure is also designed. The delta-sigma
modulator controlled DC-DC buck converter produces a fixed period varying-frequency
pulse waveform known as pulse code modulation (PCM). It is a variation of the burst-mode
controller because of its fixed period output. In one implementation, for designing of delta
sigma modulator controlled DC-DC buck converter, following parameters are considered:
 Input Voltage: 5V
 Output Voltage: 3.3V
 Required duty cycle is D = 3.3/5 = 0.66 = 66%
 Operating frequency: 200 MHz
12
 Load resistor is kept at the value of Rout = 11 Ω
 Output current = 300 mA.
[0064] To achieve the above:
1) Selection of Inductance (L):
Sampling frequency= Fs =200MHz.
( - )
(9)
ΔI= peak to peak current ripple in the inductor.
On operating the converter in continuous mode of operation, chosen, ΔI=2.8mA
 The value of L= 2 μH
2) Selection of corner frequency of the output filter(Fc),load capacitance (Cout):
( - )
(
)
(10)
Chosen, ΔVout = 0.877 mV
 The value of Fc=2.51646MHz
√
(11)
The value of Cout= 2n F
3) Design of Attenuator: The sampling network, R1and R2, contributes an
attenuation according to its sampling ratio R2/(R1+R2). The gain attenuation of the
sampling network is 20log(0.9/3.3) =(-) 11.285dB. The chosen value of R1=24K, R2=9K
4) Design of ΔΣ modulator block: FIG.6 illustrates a switched-capacitor ΔΣ modulator
in accordance with an embodiment of the present disclosure. If CS1 and CS2 = 0.5pF; Cf1
and Cf2 = 1pF are considered, the low frequency gain of the open loop buck converter is
(8.87-11.285)= (-)2.415dB.
5) Design of compensator: Unity gain crossover frequency (F1) = (1/5th of switching
frequency (Fs)) = 20MHz. FIG.7 illustrates again and phase plot of the output passive
filter (in case of ΔΣ modulator in accordance with an embodiment of the present
disclosure.
The transfers function of the output filter:
(12)
Hence the gain of the error amplifier should be chosen to be (-)(-22.745-2.415)=25.16dB.
 RB/RA= 1.81, Let, RA = 1KΩ
 RB =1.81KΩ
FIG.8 illustrates a gain and phase plot of PID compensator is illustratedin accordance with an
embodiment of the present disclosure. The transfer function of the compensator is given by:
13
(13)
[0065] For experimental purpose: FIG.9 illustrates a gain and phase plot of an op-amp
showing the phase and unity gain crossover frequencyupon implementation of ΔΣ modulator
in conventional op-ampin accordance with an embodiment of the present disclosure. As seen
in FIG.9:
 Opamp gain: 63.09dB
 Opamp unity gain bandwidth: 554.5MHz
 Opamp phase margin: 53.5°
 ICMR = 0-1.8V (Rail to Rail)
 Opamp Power Consumption: 1.552 mW
[0066] FIG.10(a) illustrates an existing circuit diagram of PWM controller. For the circuit of
FIG.10(a), input values are as considered below:
 Overshoot: (3.671-3.075) V
 Settling Time: 46.92μs
 Ripple at Vout: (3.302-3.295) V
 Efficiency: 79%
 FFT Spectre:Signal (5MHz): (-) 46.76 dB
1stHarmonic: (-) 57.19 dB, 2ndHarmonic: (-) 72.05 dB, 3rdHarmonic: (-) 75.23 dB,
4thHarmonic: (-) 74.24 dB, 5thHarmonic: (-) 82.68 dB, 6thHarmonic: (-) 85.98 dB,
7thHarmonic: (-) 81.29 dB, 8thHarmonic: (-) 85.48 dB, 9thHarmonic: (-) 107.7 dB.
[0067] FIG.10(b) illustrates an input and output waveforms of the PWM controller for the
PWM controller according to a prior-art in accordance with an embodiment of the present
disclosure. FIG.11 illustrates a fast Fourier transform (FFT) output waveform of PWM
controller based DC-DC buck converter.
[0068] For comparison purposes and to show the enhanced efficiency of the delta-sigma
controller based DC-DC buck converter according to the present disclosure. Referring again
to FIG.6 illustrating a switched-capacitor ΔΣ modulator (having delta-sigma controller based
DC-DC buck converter implemented) in accordance with an embodiment of the present
disclosure, FIG.12 illustrates an input (Sine wave) and output waveform of the delta sigma
modulator in accordance with an embodiment of the present disclosure.
[0069] For the circuit of FIG.6, the input values are as considered below:
 Input Voltage range = 6V-3.9V
 Output Voltage = 3.3V
14
 Maximum Output Current = 943 mA
 Ripple Voltage = 6mV
[0070] FIG.13 illustrates FFT spectra of the delta-sigma modulator controlled DC-DC buck
converteras illustrated in FIG. 6 in accordance with an embodiment of the present disclosure.
The frequency component values are obtained are as below:
Signal(200MHz) =(-)98.58 dB: 1st Harmonic(400 MHz) = (-)110.6 dB, 2nd Harmonic(600
MHz) = (-)117.4 dB, 3rd Harmonic(800 MHz) = (-)122.7 dB.
[0071] FIG.14 illustrates a FFT plot of delta-sigma modulatoras illustrated in FIG. 6 in
accordance with an embodiment of the present disclosure. From the Plot noise shaping is
clearly visible because out of band noise is shaped at rate of 40dB/decade and SNR = 74.87
dB. FIG.15 illustrates an output voltage and current waveform for sudden switching of
current 0mA → 50mA → 100mA → 50mA → 0mA for the conversion of 5V-3.3V in
accordance with an embodiment of the present disclosure.
[0072] FIG.16 illustrates a graph showing comparative study of different input (5V, 4.5V,
4V) i.e., efficiency vs. output current in accordance with an embodiment of the present
disclosure. The table below shows current, efficiency, resistance, ripple voltage, and output
voltage for 5V, 4.5V, and 4V input for the comparative study of the -sigma modulator in
accordance with an embodiment of the present disclosure.
Current
(mA)
Efficiency
( )
Resistance
(Ohms)
Ripple
(mV)
Output Voltage
(V)
412.543 0.846651597 8 3.319-3.291 3.300344
366.6203 0.861705703 9 3.313-3.284 3.299583
300 0.85949023 11 3.319-3.287 3.300454
275.0327 0.860514994 12 3.316-3.283 3.300392
253.8473 0.87914178 13 3.334-3.270 3.300015
235.7 0.881029275 14 3.318-3.285 3.3
219.9 0.895986612 15 3.321-3.297 3.298
164.9 0.904104811 20 3.314-3.294 3.298
143.4 0.905553609 23 3.322-3.286 3.299
131.9 0.904662042 25 3.315-3.282 3.298
[0073] To summarize the Delta-Sigma (ΔΣ) modulator controller based DC-DC buck
converter, a delta-sigma modulator controlled switch-mode power supplies by considering
advantage of noise-shaping properties to eliminate the spikes present in switching power
supplies. In contrast to the drawbacks of the PWM controlled DC-DC buck converter i.e.,
15
presence of ripple, the delta–sigma (ΔΣ) modulator provides an efficient control method,
while increasing the overall noise at the output, shapes the noise and reduces the tones that
exist in the PWM controller. From the experimental analysis may clearly be understood by
the person skilled in the art that, the delta-sigma (ΔΣ) modulator controlled switch-mode
power supplies according to the present disclosure shows better performance than the PWM
controlled DC-DC buck converter along with peak efficiency of 91% with better noise
performance.
[0074] FIG.17 illustrates a modified compensator having error module and a controller in
accordance with an embodiment of the present disclosure. According to an embodiment, the
present disclosure provides a Delta-Sigma (ΔΣ) modulator controller based DC-DC buck
converter. The Delta-Sigma (ΔΣ) modulator controller includes an attenuator 1702, a
comparator 1704, a compensator 1706 having error amplifier module 1708, and a controller
1710. The attenuator 1702 receives an output voltage from a switching power supply source
and reduces strength of the output voltage received by using a comparator 1704. The
compensator 1706 having error amplifier module 1708 receives the output voltage having the
strength reduced from the one or more attenuator 1702 amplifies the output voltage received
and stabilizes the output voltage amplified. The controller 1710 then converts the output
voltage stabilized received from the compensator 1706 into a time-varying modulation signal
1712.
[0075] In one implementation, the strength of the output voltage is reduced by subtracting the
output voltage received from a temperature compensated stable reference by means of the
comparator 1704, wherein the temperature compensated stable reference can be a band gap
reference.
[0076] In one implementation, the compensator 1706 can be a filter.
[0077] In one implementation, the compensator 1706 amplifies the output voltage
by increasing the power or amplitude of the output voltage received from the one or more
attenuator 1702.
[0078] In one implementation, the compensator 1706 stabilizes the output voltage amplified
by offsetting an error or an undesired effect from the output voltage amplified.
[0079] In one implementation, the controller 1710 can be a nonlinear element or nonlinear
device.
[0080] In one implementation, the time-varying modulation signal 1712 is transmitted to a
driver circuit; the driver circuit is adapted to provide one or more sharper transitions to the
one or more switching power supply source.
16
[0081] In one implementation, the time-varying modulation signal can be utilized to control
the one or more switching power supply source.
[0082] According to another embodiment, the present disclosure provides a feedback control
system based DC-DC power converter. The DC-DC power converter step down the voltage
while stepping up the current from an input power supply to an output supply connected to
one or more loads. The feedback control system includes an attenuator 1702, a comparator
1704, a compensator device 1706 having error amplifier module 1708, and a nonlinear device
1710. The attenuator 1712 is connected to an output supply generated by one or more power
supply switch. The attenuator 1702 reduces the strength of the output supply generated by
subtracting the output voltage received from a temperature compensated stable reference by
using the comparator 1704. The compensator device 1706 having the error amplifier module
1708 amplifies the output supply having strength reduced and stabilizes the output supply
amplified. The nonlinear device 1710 converts the output supply stabilized into a timevarying
modulation signal 1712 thereby by controls the one or more power supply switch.
The time-varying modulation signal 1712 includes a fixed period varying-frequency pulse
waveform.
[0083] Apart from the advantages apparent from the above disclosure, the delta-sigma (ΔΣ)
modulator controller also provides some additional advantages. Some of the advantages of
the delta-sigma (ΔΣ) modulator controller are as provided below:
i. Noise at the output is less from the PWM controlled DC-DC buck converter due to
the use of Delta-Sigma modulator as a controller part.
ii. Stability: Compensator is so designed it supports current maximum up to 953mA and
very low output current without losing stability with change of temperature.
iii. Peak Efficiency is 91% at switching frequency of 200MHz.
iv. Line Regulation: Gives 3.3V output in spite of the variations of the input from 6V to
3.9V.
v. Load Regulation: Gives 3.3V output in spite of variations of the load from 3.5Ω to
very high value.
[0084] While embodiments of the present disclosure have been illustrated and described, it
will be clear that the invention is not limited to these embodiments only. Numerous
modifications, changes, variations, substitutions, and equivalents will be apparent to those
skilled in the art, without departing from the spirit and scope of the invention, as described in
the claim.
[0085] Although implementations for delta-sigma (ΔΣ) modulator controller based buck
converter have been described in language specific to structural features and/or methods, it is
17
to be understood that the appended claims are not necessarily limited to the specific features
or methods described. Rather, the specific features and methods are disclosed as examples of
implementations for delta-sigma (ΔΣ) modulator controller based buck converter.

We Claim:
1. A Delta-Sigma (ΔΣ) modulator controller based DC-DC buck converter, said
converter comprising:
an attenuator 1702 adapted to receive an output voltage from a switching power
supply source and reduce strength of the received output voltage,
characterized in that, the Delta-Sigma (ΔΣ) modulator controller based DC-DC buck
converter comprises:
a compensator 1706 having an error amplifier module 1708 adapted to:
receive, from the attenuator 1702, the output voltage having the reduced
strength;
amplify the received output voltage;
stabilize the amplified output voltage; and
controller 1710 adapted to convert the stabilized output voltage received from the
compensator into a time-varying modulation signal 1712.
2. The DC-DC buck converter as claimed in claim 1, wherein the strength of the output
voltage is reduced by subtracting, by a comparator 1704, the output voltage received from a
temperature compensated stable reference, and wherein the temperature compensated stable
reference comprises a band gap reference Vref.
3. The DC-DC buck converter as claimed in claim 1, wherein the compensator 1706 is a
filter.
4. The DC-DC buck converter as claimed in claim 1, wherein the compensator amplifies
the output voltage by increasing power or amplitude of the output voltage received from the
attenuator.
5. The DC-DC buck converter as claimed in claim 1, wherein the compensator stabilizes
the amplified output voltage by offsetting an error or an undesired effect from the output
voltage amplified.
6. The DC-DC buck converter as claimed in claim 1, wherein the controller comprises a
nonlinear element or a nonlinear device.
7. The DC-DC buck converter as claimed in claim 1, wherein the time-varying
modulation signal is transmitted to a driver circuit that is adapted to provide one or more
sharper transitions to the switching power supply source.
8. The DC-DC buck converter as claimed in claim 1, wherein the time-varying
modulation signal can be utilized to control the switching power supply source.
19
9. The DC-DC buck converter as claimed in claim 1, wherein the converter is adapted to
produce a fixed period varying-frequency pulse waveform.
10. A feedback control system based DC-DC power converter adapted to step down
voltage while stepping up current from an input power supply to an output supply connected
to a load, the feedback control system comprising:
an attenuator 1702 connected to an output supply generated by a power supply switch,
wherein the attenuator 1702 is adapted to reduce the strength of the output supply generated,
and wherein the strength of the output supply is reduced by subtracting, by a comparator
1704, the output voltage received from a temperature compensated stable reference;
characterized in that, the feedback control system comprising:
a compensator device 1706 having an error amplifier module 1708 adapted to
amplify the output supply having strength reduced by increasing the power or
amplitude of the output voltage received from the one or more attenuator, and
stabilize the amplified output supply by offsetting an error or an undesired effect from
the amplified output voltage; and
a nonlinear device 1710 adapted to convert the stabilized output supply into a
time-varying modulation signal 1712 that controls the power supply switch, wherein
the time-varying modulation signal 1712 comprises a fixed period varying-frequency
pulse waveform.