1. SCOPE:

This document describes design of high power amplifier and its control circuitry and bias sequence for UHF SATCOM unit for air borne communication systems.

2. DESCRIPTION:

The power amplifier (PA) is the core of base stations and repeaters and can account for more than half of their total power consumption. Low power consumption, size and high reliability are the challenging tasks for power amplifier design. Low power consumption can be achieved by proper selection of the power device and its matching circuit design. High reliability can be achieved with proper control circuitry.

The microcontroller available in the control and monitor circuitry realizes the functions of monitoring and controlling the power amplifier, including configuring the output power, monitoring the voltage standing wave ratio (VSWR),monitoring the drain current and temperature, signaling and alarm when a parameter is over a predefined threshold. Monitoring and controlling the PA can improve efficiency and reduce operating costs, can maximize output power and achieve the highest possible linearity and can allow the system operator to discover and solve problems, thus improving reliability and maintainability.

GaN HEMT transistors provide large band gap and high breakdown voltage and have high operational frequencies making them a very good device of choice. The Silicon Carbide (SiC) substrates used in these transistors provide high thermal conductivity allowing high power densities to be dissipated effectively for realistic drain efficiencies preventing extreme channel temperatures.

GaN HEMT Biasing Circuit with Temperature compensation provides the gate and drain voltages to GaN HEMT transistors in the correct sequence to allow operation of this depletion mode RF devices i.e. negative gate voltage is generated and supplied to the GaN device prior to drain voltage. The bias sequencing is provided by a low-noise, inverting power supply which is operated from a +5 volt supply only. In addition to bias sequencing the circuit also provides temperature compensation to the RF transistor by changing the gate voltage to assure constant drain current. The low-noise, inverting power supply IC incorporates a charge pump which supplies a negative voltage to the operational amplifier. In addition the low-noise, inverting power supply provides a signal that turns on the MOSFET switch following the stabilization of the generated negative supply. The thermistor is placed in the feedback loop of the Micrel operational amplifier such that the feedback tracks the gate voltage required to maintain constant drain current.

UHF SATCOM High Power Amplifier is designed to work in between 225MHz and 400MHz delivering 100 Watt output power required at the antenna and is intended for air to air and air to ground two way full duplex voice and data communications.

3. Features

1. 100 Watt output power

2. 50 dB gain

3. 20 dB variable gain

4. Single 28V Power Supply

5. 50 Q input and output impedances

6. UART Serial Interface and JTAG Interface

7. Over Temperature Protection

8. VSWR Protection

9. Operating Temperature Range -40 to +85 C

10. Internal Forced Air Cooling System 4.

Functional block Diagram:
5. PA-PREAMPLIFIER
The PA-pre amplifier stage acts as the driver amplifier for the PA module to . which the RF input is fed from the VGA output of the control card. The voltage input, temperature and current monitoring are also done via control card. The bias voltage required for the pre amplifier stage is supplied by the control card

6.2 THEORY OF OPERATION

The PA-fmal amplifier stage forms the final high power amplifier of the PA Module. The GaN Transistor is capable of giving out 180W-220W at saturation and 100W-130W at its 1-dB compression point. The input and output impedance matching are done via balun transformer configuration using 61 material ferrite cores and high power capable semi-rigid co-axial cables.

7.2 THEORY OF OPERATION

The PA-DDC stage consists of a Dual Directional Coupler capable of 300W Power with 50dB coupling and less than 0.25dB insertion loss from 20MHz to 520 MHz. The input to this stage is fed from the output of PA final amplifier stage and the output forms output of PA module. The forward and reverse power from this stage (50 dB coupled) are fed to the RSSI chip on control module.

9. PA CONTROLCARD

8.1 OVERVIEW

The Power Amplifier Control Card contains the circuitry for controlling the bias voltages of PA-pre amplifier and PA-final amplifier stages along.with a Variable Gain Amplifier and RSSI IC. An ARM7TDMI microcontroller controls the above mentioned functions along with temperature and current control circuitry.

8.2 MICRO CONTROLLER

The Control Card uses ADuC7026 microcontroller, a fully integrated, 1 MSPS, 12-bit data acquisition system incorporating high performance multichannel ADC, 32-bit MCU, and Flash/EE memory on a single chip.

The ADuC7026 ADC consists of up to 12 single-ended inputs and four DAC outputs. The ADC can operate in single-ended or differential input mode. The ADC input voltage is 0 V to VREF. A low drift band gap reference, temperature sensor, and voltage comparator complete the ADC peripheral set. The DAC output range is programmable to one of three voltage ranges.

The device operates from an on-chip oscillator and a PLL generating an internal high frequency clock of 41.78 MHz (UCLK). This clock is routed through a programmable clock divider from which the MCU core clock operating frequency is generated. The microcontroller core is an ARM7TDMI®, 16-bit/32-bit RISC machine, which offers up to 41 MIPS peak performance. Eight kilobytes of SRAM and 62 kilobytes of nonvolatile Flash/EE memory are provided on-chip. The ARM7TDMI core views all memory and registers as a single linear array.

On-chip factory firmware supports in-circuit serial download via the UART or 12C serial interface port; nonintrusive emulation is also supported via the JTAG interface. The device operates from 2.7 V to 3.6 V and is specified over an industrial temperature range of -40°C to + 125°C. When operating at 41.78 MHz, the power dissipation is typically 120mW.

8.3 RSSI &VSWRMONITORING

VSWR,is a key parameter in antenna systems, provides a measure of the match between all of the elements in the antenna system. Reverse power influences the PA's output power, and the transmitted signal is distorted if it is too high.

The figure below shows the functional block diagram of the VSWR Monitor, which uses dual directional coupler and the dual True Power detector to measure forward and reverse power. The two-channel, true-rms-responding RF power measurement subsystem precisely measures and controls the signal power. Theoutput can be used to calculate VSWR and monitor the match on the transmission line. The indication of a large VSWR greater than the threshold indicates a problem with the antenna, so the protection of the system can be implemented by adjusting the PA gain or the power supply voltage or in extreme case switching off the system via Microcontroller.

The figure above shows the functional block diagram of the auto power control loop, which, comprises the dual directional coupler, True Power detector, microcontroller, and a variable gain amplifier. The dual directional coupler transfers the forward power to the True Power detector, which tracks the change in signal amplitude. The ADuC7026's on-chip ADC samples the output. The microcontroller compares the actual output power with the expected power and uses a proportional-integral-derivative (PID) algorithm to adjust the control voltage error, making the power amplifier operate at the point of best performance.

The above figure shows a flow chart for the PID algorithm. First, the program initializes the control parameter Kp, Ki and Kd and sets the expected output power. Next, the ADC samples the output of the RSSI. The sampled data is then filtered and converted to power. Then, the difference between the expected output power and the actual output power, the next expected sample value, and the control voltage are calculated according to the system transfer function, and the DAC registers are configured. The DAC output in turn is fed to the gain input of VGA which provides the required gain for the Transit Path. This completes one cycle of the sample and control process, which then continues in a circular manner.

8.5 BIAS CONTROL

GaN HEMT transistors are depletion mode RF devices. Therefore, the correct sequence to allow operation of these devices is to generate and supply negative gate voltage prior to the drain voltage.

The bias sequencing is provided by a charge pump IC which is operated from a +5 volt supply only. In addition to bias sequencing the circuit should also provide temperature compensation to the RF transistor by changing the gate voltage to assure constant drain current. The charge pump IC incorporates a charge pump which supplies a negative voltage to the operational amplifier. In addition the charge pump IC provides a signal that turns on the MOSFET switch following the stabilization of the generated negative supply. The charge pump is capable of supplying the negative gate current required for the circuit and the operational amplifier is capable of supplying the required positive or negative gate current to the GaN HEMT depending on the degree of RF compression in the device.

Typically the gate voltage for a GaN HEMT needs to be changed by 0.4 mV per degree Celsius to maintain a constant drain current. The circuit in Figure -incorporates a thermistor to sense temperature (the thermistor should ideally be placed as close to the transistor as possible to measure its temperature accurately). This thermistor is placed in the feedback loop of the Micrel operational amplifier such that the feedback tracks the gate voltage required to maintain constant drain current. In addition the quiescent drain current at a reference temperature is set by RPOT. The exact temperature coefficient of the gate voltage is set by the values of Rl and R2 in unison with the thermistor.

The figure above shows the functional block diagram of the temperature monitor, which uses the digital temperature sensor to monitor the temperature of the RF and Digital stages of the control card. The temperature sensor digitizes the temperature to a resolution of 0.0625C. Its shutdown mode reduces the typical supply current to 3 uA.

The ADuC7026 MCU periodically reads the temperature data from the two temperature sensors via the I2C bus. Then, it looks at temperature sensor over temperature pin (OS/ALERT) if the temperature is over the threshold. The ADuC7026 can be configured to write the threshold temperature to the ADT75 via the I2C bus. Also a provision can be arranged such that whenever the microcontroller receives the read temperature threshold command, it reads the threshold temperature from the temperature sensor and transmits it to the PC via UART or JTAG.

8.7 CURRENT MONITOR

The current monitoring for the PA-pre amplifier and PA-final amplifier stages is done via , Fully Integrated, Hall Effect-Based Linear Current Sensor IC. 2 IC's are placed on the board, one for each of the power amplifier stages.

The device consists of a precise, low-offset, linear Hall circuit with a copper conduction path located near the surface of the die. Applied current flowing through this copper conduction path generates a magnetic field which the Hall IC converts into a proportional voltage. Device accuracy is optimized through the close proximity of the magnetic signal to the Hall transducer. The output of the device has a positive slope when increasing current flows through the primary copper conduction path, which is used for current sampling.
The figure above shows the circuit diagram for measuring the current required in the respective power amplifier stages. The current sensor IC's are placed immediately after the MOSFET IC switches so that exact drain currents drawn by power amplifiers can be measured.

The output voltage from the current sensor corresponding to the drain current drawn is the amplified by an op-amp IC whose output is in turn fed to the ADC of microcontroller for reading the corresponding voltage value. The following figures - 8B - shows the amplified voltages corresponding to the drain currents drawn at pre amplifier and final amplifier stages respectively.

The total power consumption of the PA Module thus can be calculated by summing up the above mentioned values.

8.8 DIGITAL POTENTIOMETER

The PA control card consists of quad 256-position digital potentiometer (SOkOhm) .Two of the four potentiometers are used as replacement for the 20kOhm analog potentiometer replacements as rheostats in Bias Control Circuitry for configuring the negative gate voltages (VGS) of GaN Transistors. The remaining two are used as potentiometers for generating required threshold voltages for Comparators in the over current protection circuitry. The register values for calculating the required wiper positions and writing into EEMEM of device is configured via I2C interface as explained in the section above. The figure below shows a tentative diagram of potentiometer functions.

CLAIM:

(1) I claim that High power amplifier using GaN device has been designed to drive the UHF SATCOM transceiver unit for airborne applications.

(2) High power output (100W) is achieved by CREE GaN devices both at final stage (100W) and pre amplifier stage (8W).

(3) The final amplifier is a class *B' push pull amplifier which gives an efficiency of 70%.The total power amplifier module draw a current of 4.8A on 28V supply at output power level 100W.

(4) The output power level and bias currents can be configured through the
i micro controller software using advanced microcontroller.

(5) VSWR monitor and protection (shutdown the PA at extreme conditions) can
be achieved through highly directive and small size Dual directional coupler,
dual channel RSSI and microcontroller.

(5) Temperature and current monitoring and protection (shutdown the PA at
extreme conditions) is achieved through the I2C programmable temperature
sensors, digital potentiometer, Hall Effect based current sensors and
automatic bias sequencing.

(7) Power amplifier is automated bias sequencing which is achieved by the
charge pump device and MOSFET switch.