FIELD OF INVENTION:
This invention relates to a process for producing a plasma-deposited multi
junction amorphous silicon solar cell device herein after referred to as
amorphous silicon solar cell module.
BACKGROUND OF THE INVENTION:
Thin firm solar cell modules based on plasma deposited amorphous silicon (a-Si)
have the potential for generation of low-cosl photovostaic power. Hailed in
eighlles as one of the mosl promising thin film PV technologies, these devices
have, so far, failed to realize this dream on account of their lower efficiencies
compared to that for crystalline silicon. The relatively lower stabilized efficiencies
for these devices has primarily been attributed to the so-called Staebler-Wronsky
effect (SWE) according to which amorphous silicon material, by virtue of the
nature of the defects in its lattice, loses pholoconductivity on exposure to light.
This results in degradation in electrical performance of solar cells and brings
down their efficiency.
Degradation due to SWE in plasma deposited a-Si has been reduced through
invention of murii junction (doubls and triple Junction) solar cell structures where
the intrinsic silicon layer (i layer), which is responsible for absorbing incident solar
radiation, is split into thinner layers, each serving as a separate absorber layer in
the respective p-+n junction configuration. The total layer thickness, however,
remains the same as that in 3 single junction device. The reduction in SWE is
brought about by the fact that thinner layers of intrinsic silicon give rise to
sttonger eletlrital field across the device and the electron-hole patrs generated
on absorption of light are quickly separated. This prevents creation of additional
defect sites in the material which are generated from breaking of weak Si-Si
bonds due to the energy liberated from recombination of electrons and holes.
while this improvement in the device configuration reduces the extent of
performance degradation in a-Si solar cell upon exposure to light, comamination
1

of the intrinsic layer from any other source during the fabricalion process (ends to
nullify the beneficial effect. In particular, contamination due to boron and
phosphorus atoms of the i Jayer adversely affects the device performance
In conventional PECVD process, it is otten found advantageous to deposit the
doped (p and n) and the undoped (i) layers in separate deposition chambers so
as to prevent contamination of the intrinsic layer with traces of dopant atoms. In
fact, the superior performance of p-i-n or n-i-p type solar ceils made in multi
chamber deposition systems compared to those made in single chamber
systems has been well documented in literature and text books [1-4]. The reason
cited has been contamination of the highly sensitive intrinsic absorber layer with
boron and phosphorus atoms sticking to the chamber walls and other mechanical
paris inside the chamber, which act as a virtual source of these atoms.
Notwrthstanding the above, there have been altempts in the past by various
research groups of making single junction modules in the single depostton
chamber. The industry leaders, however, almost invariably use multi chamber
deposition systems for improved module performance and process reliability. A
number of treatments [5-10], essentially following the deposition of p layer and
prior to the deposition of i layer, have been suggested by various research and
industrial groups to reduce the boron concentration in the deposition chamber
before the onset of the deposition of i layer. These treatments range from
flushing the deposition chamber with hydrogen or argon [5], nitrogen trifluoride
[6], exposing the chamber interiors with a CO2 plasma [7.8], gas flushing and
brief vacuuming [9], subjecling the chamber interiors to novel oxidation
treatments such as waler vapour and ammonia flush [10] and growing an
adapted buffer layer with high hydrogen dilution between the p snd the i layer [7].
Many of these treatments, e.g exposing the chamber to CO2 plasma require the
substrate to be taken out of the deposition chamber as it is likely to damage the
highly vulnerable p/i interface [7]. Most of these treatments either relate to
formation of devices wrth single p-i-n junctions and/or are limited to module areas
2

not greater than 900 cm2. In all these studies, ultra high purity (UHP) process
and dilution gases have been used in order to realize high-performance devices.
This issue of single chamber deposition assumes much more significance in
case of multi junction devices made on large areas as processing of these
devices is much more complex than that for single junction devices. For double
junction devices, the process involves sequential deposition of several (six to
eight) thru a-si layers, doped and undoped, under varying deposition conditions
of temperature and pressure. The multi junction configurations used in some of
the previous studies [8] have employed a-Sl / ue-Si structures and most of the
groups have TCO (At doped Zno) at the back junction for improved reflection
and module performance. Though some groups mention triple laser-scribed, dry
process far going from cell stage to module stage, there is no clear mention of
the isolation and inter-connection method used by other groups.
It is also well established that the usual method of series interconnecting
individual cells in a monolithic module using sequentral laser scribing of the TCO,
a-Si and metal layers causes minimum loss of the active atea, thereby enhancing
the module current and efficiency [11], Howver, it invoives the use of expensive
capital equipment - a laser scriber with dual wavelengths (0 53 and 1.06
micrometer) and a machine vision for maintaining exact parallelness of the
scribed lines. Also the process is not free from problem areas such as controlling
the depth of focus of the feser beam so as to account tor smart unevenness in the
glass substrates and the reduced shunts caused by debris from laser scribing.
Even gross non-uniformity in the haze of the underlying TCO film affects the
laser scribing process.
Another demerit of this method of Interconnecting cells in a large area a-Si
module is that it necessitates exposing the a-S1 layers to atmosphere prior to
metallzation to enable faser scribing on it. This Increases the chances of
contamination of thin leyers of vufnerable semiconductor surface. and if not
handled with almost care, could deleteriousty affect the module performance.
3

Amorphous silicon solar eell technology has the benefit of using a number of
inexpensive substrates such as glass, slaintess steel and plesite (polyamide)
Mosi of the commercial amiable modutes are made on glass substrates, which
is also the substrate commonly used in laboratories for research and
development purposes. In all these laboratory as well as commercial
applications, float glass is invariably used as it has a very flat surface that
ensures uniformity of thickness of a-Si films in the plasma deposition process
and also facilities laser scribing of all three layers for isolation as well as inter-
connection.
OBJECTS OF THE INVENTION;
An object of this invention is to propose a propose for producing a plasma-
deposited multi junction amorphous silicon solar cell device.
Another object of this invention is to propose a process for producing a plasma-
deposited multi function amorphous silicon solar cell device wherein the doped
and undoped hydrogenated amorphous and microcrystaline silicon films are
deposited in a single plasma deposition chamber.
Still another object of this invention is to propose a process for producing a
plasma-deposited multi junction amorphous sllicon sofar cell device wherein
sequential depositions are interspersed with alternate gas purging end high
vacuum pumping.
Further object of this invention is to propose a process for producing a plasma-
deposifed multi junction amorphous silicon sofer cell device, which employs
direct deposition of the metal layer on the amorphous silicon layer without
breaking the vacuum and employing only one faser scribing coupled witn a
screen-printing and wet chemical etching for eell isolation and interconnection.
4

Still further object of this invention is to propose a simple and cost-effective
process for producing a plasma-deposited multi junction amorphous silicon solar
cell device.
BRIEF DESCRIPTION OF THE INVENTION;
According to this Invention there is provided a process for producing a ptasma-
deposited multi junction solar cell device comprising:
A plurality of piasma-deposited amorphous silicon solar celis made with the
following essential process steps.
Providing a transparent sheet glass plate and coating it with a transparent
conductive oxide (TCO) layer of fluorinated in oxide (Sno2: F) by an atmospheric
pressure chemical vapour deposition method.
Screen printing a number of fine lines and two wider bus bars of Ag frit on TCO
and fired al a high temperature fcr forming metatic contact to each of the
in dividual cells on the glass substrate,
Depositing seven amorphous silicon layers and one microcrysialine silicon layer
in a single plasma deposition chamber at elevated substrate temperatures, the
process gases being diluted with hydrogen:
Depositing a buffer layar al the sensitive p/i interface by introducing briefly 3
carbon containing process gas such as methane gas and relying on the
corrimuous pumping of the gas to product a silicon carbide layer with a graded
band gap:
Removing traces of the dopant gas from the singte deposition chamber by
alternate purging with hydrogen gas and vacuum pumping;
5

Forming a microcrystalline silicon layer such that it forms a recombination
junction with the p layer or the next junction,
Carrying out series Interconnection of cells in the module by firstly forming
without breaking vacuum a back ohmic contact of sputtered silver film covering
the entire module area and secondly removing the silver film from specific areas
with another screen printing and wet chemical elching so as lo obtain the desired
cell is olation and series interconnection of cells.
BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS:
Figure 1 presents the process now employed in fabrication of large area a-SI
modules.
Figure 2 depicts as-produced current- voltage characteristics of a typical large
area double junction amorphous silicon module.
Figure 3 depicts the quantum efficiency of a lypical large area (1 ft. X 3 fl.), a-Si
double junction photovoltaic module.
Figure 4 depicts the module output power plolled against serial number of
modules in a cortinuous process run without chamber cleaning.
Figure 5 shows the performance of a-Si double junction modules in batch
production
Figure 6 snows outdoor degradation date for large area (1' X 3'), double junction
amorphous silicon solar cell modules.
DETAILED DESCRIPTION OF THE INVENTION:
In the present invention, a process is established for large area (1 ft. X 3 ft.),
double junction a-Si soler cell modules where all the doped and undoped
hydrogenated amorphous and microcrystalline silicon films are deposited by
plasma enhanced chemical vapour deposition (PECVD) process in a single
deposition chamber. The sequential depositions are interspersed with alternate
gas purging and high vacuum pumping for short durations to reduce the level of
6

boron contaminant to lolerable limits, which do not adversely affect the
performance of the double junction modules
Referring to Fig.1, it is seen that in making a double junction a-Si module, a
transparent sheet glass plate is first coated with a transparent conducive layer
by an atmospheric pressure chemical vapour deposition (APCVD) process.
Based on the design voltage of the module, a number of line lines and two wider
bus bars of Ag frit are screen printed on TCO and fired at 3 high temperature.
These lines run parallel to the longer dimension of the motiute and their number
depends on the design voltage and current of the module. An IR laser is
employed to scribe fine lines adjacent to each of the Ag trit lines, thus forming
positive contact to each of the individual celts on the glass substrate.
a) Single chamber a-SI deposition process;
The deposition of amorphous silicon layer is carried out next by RF (13.66 MHz)
PECVD of silane and the dopant gases diluted with hydrogen. The depositions
are carried out in a single chamber at elevated substrate temperatures. The
hydrogen gas used has a purity of far lower compared to the purity level of UHP
hydrogen gas (99.999 %) normally used in such processes. The device structure
used is: p a-SiC;H / a-SiC;H / i a-Si:H / n uC-Si / p a-SiC:H / s-SiC:H / f a-Si:H / n
a-5i:H/Ag.
b) Deposition of buffer layer with graded bandgap:
An alloy of silicon and carbon (a SiC:H) material with graded band gap is used at
the sensitive p/i interface in order to reduce the gap stales and Improve the
device performance in general and Voc in particular. A natural process of
pumping gases from the deposition chamber realizes the band gap grading,
which is essentially linked lo the concentration of methane gas in the gas
mixture. The benefit of graded band gap buffer layer in improving the module
performancs is shown in Table 1.
7

c) Decontamination process:
A few brief cycles of alternate purging of the chamber with inexpensive hydrogen
gas and evacuation to high vacuum with a lurbomolecular pump ensures
effective removal of dopant gases from the deposition chamber before deposition
of the intrinsic (i) layer.
d) Deposition of micro crystalline silicon layer:
The n layer in the first junction is deposited as microcrystelline silicon film with
low resistivity so that it forms a recombination junction with the p iayer of the next
junction. The microcrystalline silicon layer 13 formed by a combined effect of high
RF power density and high hydrogen dilution of silane The power applied is
higher in the first few minutes of deposition after which if is reduced to 50-60% of
the initial value As shown in the lable below, the microcrystalline silicon film
formed this way shows a conductivity of 0.5 - 1.0 Scmf over the area of the
substrate. Also the UHP (99.5995%) hydrogen used in the process has been
replaced with less pure (99.9%) hydrogen with no detedoration of the results.
The data in support of this is presented in Table 2
e) Formation of back ohmic contact, Isolation and series Inter-
cornection of cells;
The back ohmic contact for the device in the form of a sputtered Ag layer is
deposited next without breaking vacuum. This, in our opinion, is very important
since in the conventional laser scribing process, it is mandatory to break vacuum
after deposition of a-Si layers to do laser scribing before loading it again in to
vacuum chamber for metalization by DC magnetron sputtering of a layer of
metallic silver.
This layer, to begirt wilh, covers the enfire surface of the module, acting as a
common back contact for all the cetis in the module This, therefore, needs to be
removed from the desired places 30 as to obtein the desired sertes-
interconnection. The senes-interconnection, fakes place through the printed and
fired Ag Frit lines.
8

The removal of sputtered Ag layer from desired places is earned out by a
combination of screen printing and wet chemical elching. inexpensive acid
resistant ink is used as the mask, which is applied by screen-printing. The acid-
resist ink left at the printed areas forms a protective coating for the thin metal
layer
The resultant module has all the cells interconnected in serles in such way that
the module voltage as measured by making contact on the two bus bars at the
two ends is essentially an algebraic sum of the voltages of the individual cells.
The module current on the other hand, is that generated by an individual cell
defined by the area between the two consecutive TCO scribes
f) a-Si modules on sheet gtass substrates:
Thin film modules are. in general, made on very flat surfaces, such as float glass,
highly polished stainless steel or plastic foils. The high degree of flatness is
required form the point of view of deposition of thin layers of amorphous and
microcrystalline sillicon as well as laser scribing of these layers with the aim of
series-interconnection of constituent cells. In the invention described above, the
requirement of a very high degree of flatness is also obviated as the processes of
screen-printing and clremical etching takes place with equal effectiveness on all
kinds of surfaces. The initial laser scribing of TCO layer is not very critical
compared to the scribing of a-Si and metal layers. Based on these facts, it is
established that the above invention can also be used with equal effectiveness
on good quality sheet glass substrates for large area, double junction solar cell
modules. The experimental date in support of this are provided in Table 3. It can
be seen that the results are very much consistent which substantiates our claim.
Since sheet glass substrates are -40 % less expensive compared to float glass
substrates, this also leads to substanliat cost reduction
The invention described above has been successfully tried out on a large number
of double junction amorphous silicon photovoltaic modules made on large area (1
ft. x 3 n.) glass substrates. As already mentioned above, these modules nave the
device configuration of glass/Sno2 ;F/p a-SiC/i a-SiC/l Si/n uc-Si/p a-SiC/i a-
9

SIC/i a-Si/n a-Si/Ag. The intrinsic a-Si layers have the same band gap but
different thickness far the two JuncIions.
The current-voltage characteristic of a typical a-Si floutoie junction module has
been depicted in Fig, 2. The 30 cm width of the module has been divided inlo 14
equal segments, each representing a constituent cell and having an area of
around 160 cm2. The success or the double juretion process and me cell inter-
connection scheme described in the foregoing is seen from fact that an open
citcurt voltage of 24.52 V correspond to an average tell vottage of 1.75 V, which
is normalty enpected out of a high-performance double junction a-Si cell wilh a
buffer layer.
The short-circuit current of 1.38 A, which corresponds to a currenl density at 7.6
mA/cm2, matches welf wrth the data obtained from the QE-l prol in Fig 3. This
can be improved further by employing different band gap materials such as a-Si
ami a-SiGe for absotber layer in the two junctions and a ZnO Al back rellecling
layer. There is, however, good current matching between tne lop and the bottom
cell as has been depicted in the quantum efficiency plol of Fig. 3, The fill factor
however is reasonable for a module of this size. This shows that the resistances
at various inleriaces including that at the n/p interface is Quite low and that the
series-interconnection scheme desuiteti above has been able to connect the
constiuem cells of a module in series wittout any loss or voltage. The
reproducibility of the process over a long process run without any additional
cleaning of the chamber is shown in Fig. 4. The process reliability and
reproducibility is shown in Fig 5 for a small batch of 23 modules, it can be seen
thai the more than 95% of the modules fall in the ± 20 range, which is an
indicator for extremely good control over the overall process.
The outdoor degradation behaviour of the modules labricated with the above
process is snown in Fig. 6. It is evident that the invented process is capable of
producing large area, double Junction a-Si sofar ceil modules that can provide
stable power output in excess of 15 W. which corresponds to a stable: total area
efficiency of sround 5-5.5 %.
10

WE CLAIM
1. A process for producing a plasma-deposited multi junction sofar cell device
called an amorphous silicon solar call module comprising;
a plurality of plasma deposited am orphan silicon solar cells consisting of;
- a transparent sheet glass plate coaled with a transparent conduclive oxide
(TCO) layer by an atmospheric pressure chemical vapour deposition method;
- a number of fine screen-prinied fines and two wider bus bars of Ag frit on
TCO and fired at a high temperature for forming metallic contact to each of the
individual cells on the glass substrate,
- a sequence of seven amorphous silicon layers and one micro crystalline
silicon layer deposited in a single chamber at elevated substrate temperature,
the process gases being diluted with hydrogen,
- an amorphous silicon carbide buffer layer with a graded band gap at the
sensitive p/i interface produced by brief introduction of a carbon containing
process gas such as methane and relying on the continuous vacuum pumping to
produce the desired band gap grading;
- removing traces of dopant gas from the single deposition chamber by
alternate purging with hydrogen gas and vacuum pumping,
- forming a microcrystalline silicon layer such that it form a recombination
junction with the p layer of the next junction;
- carrying cut series interconnection of cells in the module by firstfy forming
without breaking, vacuum a back ohmic condact of sputtered silver film covering
the entire module area and secondly removing the silver film from specific areas
another screen printing and wet chemical siching so as to obtain the desired cell
isolation and series interconnetion of cell.
2. The process as claimed in claim 1, wherein said step of deposition of
amorphous silicon layer is done by RF (13.56 MHz) PECVD of silicon
3. The process as claimed in claim 1, wherein said buffer is an alloy of silicon
and carbon (a-SiC.H)
11

4. The process as claimed in claim 1, wherein said microcrystalline silicon layer
in the first junction comprises an n type layer.

12

A process for producing a plasma-deposited multi junction soter celt device called
an amorphous silicon solar cell module comprising. a plurality of plasma
deposited amorpboua silicon soter cells consisting of; a transparent sheal glass
plate coated with a transparent conductive oxide (TCO) layer by an atmospheric
pressure chemical vapour deposition method; a number of fine screen printed
lines and two wider bus bars of Ag frif on TCO and fired at a high temperafure for
forming metallic confact to each of the individual cells on the glass substrate, a
sequence of seven amorphous silicon layers and one micro crystalline silicon
layer deposited in a single chamber at elevated substrate iemperatures, the
process gases being diluted with hydrogen, an amorphous silicon carbide buffer
layer with a graded band gap at the sensitive p/i interface produced by brief
introduction of a carton containing process gas such as methane and relying on
the continuous vacuum pumping to produce the desired band gap grading;
removing traces of dopant gas from the single deposition chamber by alternate
purging with hydrogen gas and vacuum pumping, forming 3 microcrystalilne
silicon layer such that it form a recombination junction with the p layer of the next
junction, carrying out series interconnection of cells in the modute by firstly
forming without breaking vacuum 9 back ohmic contact of sputtered silver film
covering the entire module area and secondly removing the silver film from
specific areas another screen printing and wei chemical etching so as to obtain
the desired cell isolation and series interconnection of ceils.