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Diamond Like Carbon Dielectric Based Graphene Tfet

Abstract: The present disclosure relates to a method of fabricating a graphene tunnel field effect transistor. The method growing a first layer on a silicon carbide that acts as a buffer layer (comprises energy band gap of 0 eV), and the second graphene layer comprises energy band gap of -0.26 eV. The p-source, ^-channel, and «+-drain region in the second graphene layer are formed by using a source polarity gate metal, a control gate metal electrode, and a drain polarity gate metal, respectively. Insulating the source polarity gate metal and control gate metal electrode from each other and the second graphene layer using a high-& dielectric, wherein a control gate metal electrode and a drain polarity gate metal from each other and the second graphene layer using a carbon allotrope (Diamond-like Carbon).

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
08 November 2021
Publication Number
19/2023
Publication Type
INA
Invention Field
ELECTRONICS
Status
Email
info@khuranaandkhurana.com
Parent Application

Applicants

Chitkara Innovation Incubator Foundation
SCO: 160-161, Sector - 9c, Madhya Marg, Chandigarh- 160009, India.

Inventors

1. SHARMA, Preeti
Research Scholar, Department of Electronics & Communication Engineering, Chitkara University, Chandigarh-Patiala National Highway, Village Jansla, Rajpura, Punjab - 140401, India.
2. MADAN, Jaya
Assistant Professor, Department of Electronics & Communication Engineering, Chitkara University, Chandigarh-Patiala National Highway, Village Jansla, Rajpura, Punjab - 140401, India.
3. PANDEY, Rahul
Assistant Professor, Department of Electronics & Communication Engineering, Chitkara University, Chandigarh-Patiala National Highway, Village Jansla, Rajpura, Punjab - 140401, India.
4. SHARMA, Rajnish
Professor, Department of Electronics & Communication Engineering, Chitkara University, Chandigarh-Patiala National Highway, Village Jansla, Rajpura, Punjab - 140401, India.

Specification

The present disclosure relates to the field of tunnel field effect
transistor (TFET). More particularly the present disclosure relates to a fabrication method for Diamond-like carbon dielectric-based graphene TFET.
BACKGROUND
[0002] Background description includes information that may be useful in
understanding the present invention. It is not an admission that any of the
information provided herein is prior art or relevant to the presently claimed
invention, or that any publication specifically or implicitly referenced is prior art.
[0003] Recent studies shows that a very low-band gap material such as
graphene derived nano-materials lead the way in the accelerating growth of TFETs due to former's outstanding properties such as mass scalability, high tensile strength, high thermal stability, cost-effectivity and high resistance to electromigration. Nevertheless, it is difficult to turn off the graphene based TFET due to its low bandgap (~0 eV) that leads to generation of large leakage current. One major reason of leakage current in graphene based TFET is the use of high-& dielectric such as HfOi {£= 25) at the channel and drain side of charge-plasma technique based dopingless TFET that leads to reduce tunnelling barrier at channel-drain side. Although a few researchers have worked on \ow-k dielectric such as S1O2 (£=3.9) but the lattice mismatching between graphene and S1O2 leads to generate defects at their interface.
[0004] There is, therefore, a need of an improved graphene TFET, which
is free from above discussed problems.
OBJECTS OF THE PRESENT DISCLOSURE
[0005] Some of the objects of the present disclosure, which at least one
embodiment herein satisfies are as listed herein below.
[0006] It is an object of the present disclosure to provide a diamond-like
carbon dielectric based graphene dopingless TFET, which has less leakage
current.

[0007] It is an object of the present disclosure to provide a diamond-like
carbon dielectric based graphene dopingless TFET, which has less sub threshold swing.
[0008] It is an object of the present disclosure to provide a diamond-like
carbon dielectric-based graphene dopingless TFET, which is cost effective.
[0009] It is an object of the present disclosure to provide a diamond-like
carbon dielectric-based graphene dopingless TFET, which is more efficient.
[0010] It is an object of the present disclosure to provide a diamond-like
carbon dielectric-based graphene dopingless TFET, in which a carbon-allotrope based \ow-k dielectric has been used at channel and drain side.
SUMMARY
[0011] The present disclosure relates to the field of tunnel field effect
transistor (TFET). More particularly the present disclosure relates to a fabrication
method for diamond-like carbon dielectric-based graphene TFET.
[0012] An aspect of the present disclosure pertains to a method of
fabricating a diamond-like carbon dielectric-based graphene tunnel field effect transistor. The method includes growing two graphene layers on a silicon carbide in which the first layer acts as a buffer layer (comprises energy band gap of 0 eV), and the second layer comprises graphene along with energy band gap of-0.26 eV. ^-source region, ^-channel, and «+-drain region in the second graphene layer are formed by using a source polarity gate metal, a control gate metal electrode, and a drain polarity gate metal, respectively. Insulating the source polarity gate metal from the first layer using a high-& dielectric, wherein a control gate metal electrode, and a drain polarity gate metal from the first layer using a carbon allotrope (Diamond-like Carbon).
[0013] In an aspect, two graphene layers may be epitaxially grown on the
silicon carbide.
[0014] In an aspect, the source region, the channel, and the drains region
may be induced on the second layer using charge plasma technique.

[0015] In an aspect, the polarity source metal and control gate metal
electrodes may be isolated from each other using a high-& dielectric material.
[0016] In an aspect, the polarity drain metal and the control gate metal
electrodes may be isolated using the carbon allotrope.
[0017] Various objects, features, aspects and advantages of the inventive
subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components.
BRIEF DESCRIPTION OF DRAWINGS
[0018] The accompanying drawings are included to provide a further
understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure. The diagrams are for illustration only, which thus is not a limitation of the present disclosure.
[0019] In the figures, similar components and/or features may have the
same reference label. Further, various components of the same type may be distinguished by following the reference label with a second label that distinguishes among the similar components. If only the first reference label is used in the specification, the description is applicable to any one of the similar components having the same first reference label irrespective of the second reference label.
[0020] FIG. 1 illustrates an exemplary diagram of a diamond-like carbon
dielectric based graphene dopingless TFET, in accordance with an embodiment of the present disclosure.
[0021] FIG. 2 illustrates a method for fabricating the graphene TFET, in
accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION
[0022] The following is a detailed description of embodiments of the
disclosure depicted in the accompanying drawings. The embodiments are in such
detail as to clearly communicate the disclosure. However, the amount of detail
offered is not intended to limit the anticipated variations of embodiments; on the
contrary, the intention is to cover all modifications, equivalents, and alternatives
falling within the scope of the present disclosure as defined by the appended
claims.
[0023] In the following description, numerous specific details are set forth
in order to provide a thorough understanding of embodiments of the present
invention. It will be apparent to one skilled in the art that embodiments of the
present invention may be practiced without some of these specific details.
[0024] The present disclosure relates to the field of tunnel field effect
transistor (TFET). More particularly the present disclosure relates to a fabrication
method for graphene TFET.
[0025] The present disclosure elaborates upon a method of fabricating a
graphene tunnel field effect transistor. The method includes growing a first layer
on a silicon carbide that acts as a buffer layer (comprises zero eV energy band
gap), and the second layer comprises graphene along with energy band gap of
-0.26 eV. /^-source region, ^-channel, and «+-drain region in the second graphene
layer are formed by using a source polarity gate metal, a control gate metal
electrode, and a drain polarity gate metal, respectively. Insulating the source
polarity gate metal from the second layer using a high-& dielectric, wherein a
control gate metal electrode, and a drain polarity gate metal from the second layer
using a carbon allotrope (Diamond-like Carbon).
[0026] In an embodiment, two graphene layers may be epitaxially grown
on the silicon carbide.
[0027] In an embodiment, the source region, the channel, and the drains
region can be induced on the second layer using charge plasma technique.
[0028] In an embodiment, the polarity source metal and control gate metal
electrodes can be isolated from each other using a high-& dielectric material.

[0029] In an embodiment, the polarity drain metal and the control gate
metal electrodes can be isolated using the carbon allotrope.
[0030] FIG. 1 illustrates an exemplary diagram of a graphene TFET, in
accordance with an embodiment of the present disclosure.
[0031] As illustrated, a graphene TFET 100 can include a substrate 102
that can be made of silicon carbide material. A layer 104-2 of graphene can be epitaxially grown over the substrate 102 through a buffer layer 104-1. The buffer layer 104-1 can be made of graphene. The layers 104-1 and 104-2 can also be referred as two graphene layers. The graphene TFET can include a source polarity metal 106, a control gate 108, and a polarity drain metal 110 disposed over the graphene layer 104-2. The source metal 106 and the control gate 108 can be insulated from each other using a layer 114 of high-& dielectric material such as but not limited to hafnium dioxide or hafnia. The drain 110 metal and the control gate 108 can be isolated from each other using a layer 116 of \ow-k dielectric material. The \ow-k dielectric material comprises a carbon allotrope such as diamond like carbon.
[0032] FIG. 2 illustrates a method for fabricating the graphene TFET, in
accordance with an embodiment of the present disclosure.
[0033] As illustrated, at step 202, a method 200 of fabricating a graphene
tunnel field effect transistor includes growing a first layer 104-1 on a silicon
carbide that acts as a buffer layer (comprises zero eV energy band gap), and the
second layer 104-2 can include graphene along with energy band gap of-0.26 eV.
The first layer 104-1 can be epitaxially disposed on the silicon carbide (SiC) 102.
[0034] In an embodiment, at step 204, the method 200 can include
inducing a source region, a channel, and a drain region in the second graphene layer 104-2. The source region, the channel, and the drain region are formed by using by using a source polarity gate metal, a control gate metal electrode, and a drain polarity gate metal, respectively.
[0035] In an embodiment, at step 206, the method 200 can include
insulating the source polarity gate metal, a control gate metal electrode, and a drain polarity gate metal from the second layer. At step 206, the method can

include forming the source region using source polarity metal, drain region using drain polarity metal, and a channel region using control gate metal electrode. At step 208, source polarity gate metal 106, a control gate metal electrode 108 can be isolated from each other and the second layer 104 by a high-& dielectric material such as hafnium dioxide (Hf02). A drain polarity gate metal 110 and the control gate metal electrode 108 can be isolated from each other using a \ow-k dielectric layer such as carbon allotrope. The carbon allotrope can also be referred as diamond like carbon.
[0036] Moreover, in interpreting the specification, all terms should be
interpreted in the broadest possible manner consistent with the context. In particular, the terms "comprises" and "comprising" should be interpreted as referring to elements, components, or steps in a non-exclusive manner, indicating that the referenced elements, components, or steps may be present, or utilized, or combined with other elements, components, or steps that are not expressly referenced. Where the specification claims refer to at least one of something selected from the group consisting of A, B, C ....and N, the text should be interpreted as requiring only one element from the group, not A plus N, or B plus N, etc.
[0037] While the foregoing describes various embodiments of the
invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof. The scope of the invention is determined by the claims that follow. The invention is not limited to the described embodiments, versions or examples, which are included to enable a person having ordinary skill in the art to make and use the invention when combined with information and knowledge available to the person having ordinary skill in the art.
ADVANTAGES OF THE INVENTION
[0038] The proposed invention provides a diamond-like carbon dielectric-
based graphene dopingless TFET, which has less leakage current.
[0039] The proposed invention provides a diamond-like carbon dielectric-
based graphene dopingless TFET, which has less sub threshold swing.

[0040] The proposed invention provides a diamond-like carbon dielectric-
based graphene dopingless TFET, which is cost effective.
[0041] The proposed invention provides a diamond-like carbon dielectric-
based graphene dopingless TFET, which is more efficient.
[0042] The proposed invention provides a diamond-like carbon dielectric-
based graphene dopingless TFET, in which a carbon-allotrope based \ow-k dielectric has been used at channel and drain side.

We Claim:

1. A method of fabricating a graphene tunnel field effect transistor, the
method comprising:
growing a first layer on a silicon carbide, wherein the first layer comprises graphene;
growing a second layer over the first layer, wherein the second layer comprises graphene;
forming a source polarity gate metal over the source region, a drain polarity gate metal over the drain region, and a control gate metal electrode over the channel region;
^-source region, ^-channel, and «+-drain region in the second graphene layer are formed by using a source polarity gate metal, a control gate metal electrode, and a drain polarity gate metal, respectively; and
Insulating the source polarity gate metal from the second layer using a high-& dielectric, wherein a control gate metal electrode, and a drain polarity gate metal from the second layer using a carbon allotrope (Diamond-like Carbon).
2. The method as claimed in claim 1, wherein the two graphene layers are epitaxially grown on the silicon carbide.
3. The method as claimed in claim 1, wherein the source region, the channel, and the drains region are induced on the second layer using charge plasma technique.
4. The method as claimed in claim 1, wherein the polarity source metal and control gate metal electrodes are isolated from each other using a high-& dielectric material.
5. The method as claimed in claim 1, wherein the polarity drain metal and the control gate metal electrodes are isolated using a \ow-k dielectric material.

6. The method as claimed in claim 1, wherein a source electrode (SE), and a drain electrode contact are made by any of copper and aluminum.

Documents

Application Documents

# Name Date
1 202111051113-STATEMENT OF UNDERTAKING (FORM 3) [08-11-2021(online)].pdf 2021-11-08
2 202111051113-POWER OF AUTHORITY [08-11-2021(online)].pdf 2021-11-08
3 202111051113-FORM FOR STARTUP [08-11-2021(online)].pdf 2021-11-08
4 202111051113-FORM FOR SMALL ENTITY(FORM-28) [08-11-2021(online)].pdf 2021-11-08
5 202111051113-FORM 1 [08-11-2021(online)].pdf 2021-11-08
6 202111051113-EVIDENCE FOR REGISTRATION UNDER SSI(FORM-28) [08-11-2021(online)].pdf 2021-11-08
7 202111051113-EVIDENCE FOR REGISTRATION UNDER SSI [08-11-2021(online)].pdf 2021-11-08
8 202111051113-DRAWINGS [08-11-2021(online)].pdf 2021-11-08
9 202111051113-DECLARATION OF INVENTORSHIP (FORM 5) [08-11-2021(online)].pdf 2021-11-08
10 202111051113-COMPLETE SPECIFICATION [08-11-2021(online)].pdf 2021-11-08
11 202111051113-Proof of Right [08-04-2022(online)].pdf 2022-04-08
12 202111051113-FORM 18 [11-08-2023(online)].pdf 2023-08-11
13 202111051113-FER.pdf 2025-03-12
14 202111051113-FORM 3 [12-06-2025(online)].pdf 2025-06-12
15 202111051113-FORM-5 [12-09-2025(online)].pdf 2025-09-12
16 202111051113-FORM-26 [12-09-2025(online)].pdf 2025-09-12
17 202111051113-FER_SER_REPLY [12-09-2025(online)].pdf 2025-09-12
18 202111051113-DRAWING [12-09-2025(online)].pdf 2025-09-12
19 202111051113-CORRESPONDENCE [12-09-2025(online)].pdf 2025-09-12
20 202111051113-CLAIMS [12-09-2025(online)].pdf 2025-09-12
21 202111051113-ABSTRACT [12-09-2025(online)].pdf 2025-09-12

Search Strategy

1 202111051113_SearchStrategyNew_E_SearchstrategyE_10-03-2025.pdf