FORM 2
THE PATENTS ACT, 1970
(39 OF 1970)
As amended by the Patents (Amendment) Act, 2005
&
The Patents Rules, 2003
As amended by the Patents (Amendment) Rules, 2006
COMPLETE SPECIFICATION (See section 10 and rule 13)
TITLE OF THE INVENTION
Digital transient control system to enhance response of CVT
APPLICANT (S)
Crompton Greaves Limited, CG House, Dr Annie Besant Road, Worli, Mumbai 400 030, Maharashtra, India, an Indian Company
INVENTOR (S)
Devraj John Yesuraj of Crompton Greaves Limited Switchgear (S1 & S4) R&D Division, Switchgear Complex, Crompton Greaves Limited, A3, Ambad, Nashik, Maharashtra, India; Baviskar Ganesh and Desale Sohankumar of Crompton Greaves Limited S2-R&D Division, Switchgear Complex, Crompton Greaves Limited, A3, Ambad, Nashik, Maharashtra, India; and Sakamuri Jayachandra Naidu - S4 R&D Division, Switchgear Complex, Crompton Greaves Limited, A3, Ambad, Nashik, Maharashtra, India; all Indian Nationals.
PREAMBLE TO THE DESCRIPTION:
The following specification particularly describes the nature of this invention and the manner in which it is to be performed:

Field of the Invention:
This invention relates to the field of electronic and electrical systems. Particularly, this invention relates to capacitor voltage transformers (CVT).
More particularly, this invention relates to a digital transient control system to enhance response of CVT.
Background of the Invention:
Transformer is a device which transfers electrical energy from one circuit to another through inductively coupled conductors i.e. through transformer's coils. A varying current in the first or primary winding creates a varying magnetic flux in the transformer's core and thus a varying magnetic field through the secondary winding. This varying magnetic field induces a varying electromotive force (EMF) or "voltage" in the secondary winding. This effect is called mutual induction.
An electric power system is a network of electrical components used to supply, transmit and use electric power.
A capacitor voltage transformer (CVT), or capacitance coupled voltage transformer (CCVT) is a transformer used in power systems to step down extra high voltage signals and provide a low voltage signal, for measurement or to operate a protective relay. In its most basic form the device consists of three parts: two capacitors across which the transmission line signal is split, an inductive element to tune the device to the line frequency, and a transformer to isolate and further step down the voltage for the instrumentation or protective relay.

It has been observed that CVTs are riddled with the problems of ferroresonance and transient voltages which affect its performance.
Ferroresonance can occur when an unloaded 3-phase system consisting mainly of inductive and capacitive components is interrupted by single phase means. In the electrical distribution field this typically occurs on a medium voltage electrical distribution network of transformers (inductive component) and power cables (capacitive component). If such a network has little or no resistive load connected load and one phase of the applied voltage is then interrupted, ferroresonance can occur. If the remaining phases are not quickly interrupted and the phenomenon continues, overvoltage can lead to the breakdown of insulation in the connected components resulting in their failure. The causes for ferroresonance are, a series or and/or parallel combination capacitive component and lightly loaded iron cores of inductive or power transformers.
In a CVT, ferroresonance occurs due to its internal components, coupling capacitor and iron core of intermediate voltage transformer (VT). Under normal operating conditions, the coupling capacitor and the compensating inductor resonates at fundamental frequency so that the phase of CVT secondary voltage is same as that of primary (or HV line voltage). Due to switching operations or faults in CVT primary or secondary, the iron core of VT goes into saturation, there by its magnetizing reactance matches with the capacitive reactance of coupling capacitors producing higher voltage magnitudes at sub harmonic frequencies. These oscillations will sustain longer if there is no sufficient damping is provided across the VT secondary which leads to insulation and thermal failure of VT and other components in a CVT. The type of ferroresonance occurs in a CVT is series Ferroresonance.

The other problem with a CVT is that its transient response is not good due its energy storage elements such as capacitors and inductors. For example, under primary fault conditions (short circuit), the secondary voltage of CVT is not an exact replica of primary voltage. It goes under some transients before it reaches to a steady state value (i.e. replica of primary voltage). As the output of CVT is supplied to relays, these inherent transients may cause mal-functioning of relays, particularly distance relays. Hence, the transients of CVT should be minimized so that its secondary voltage is exact replica of primary voltage. These transients in a CVT may not damage its components but it will lead to mal operation of relays which leads to the mal functioning of power system.
Hence, Ferroreonnace is an internal problem to the CVT and bad transient response will affect the power system functioning.
Catastrophic equipment failures continue to occur today due to ferroresonance and mal operation of relays if its transient performance is not good. Hence, there is a need for a suppression circuit system in order to 'detect' the conditions of ferroresonance and transient voltages and to 'suppress' them.
There exists different ferroresonance suppression circuits (FSC) for CVT in the existing literature. These can be classified:
1. Active FSC - Composed of energy storage elements capacitors, inductors and
resistors and works on series or parallel or combination of series and parallel
resonance principles.
2. Passive FSCs - Composed of less or no energy storage elements and works on
the principle of voltage magnitude.

However, active FSCs can only suppress ferroresonance but these FSCs worsen the transient response of CVTs, whereas passive FSCs suppress the ferroresonance, but the effect on transient response of these circuits is less compared to active FSCs.
But both the existing circuits cannot suppress the transient response oscillations. As both the circuits are permanently connected across CVTs, these will also affect the accuracy of the CVTs.
Prior Art:
GB1150865 relates to Improvements relating to Capacitive Voltage Transformers. It discloses a concept of anti-ferroresonance circuit for a capacitive voltage transformer, including a damping burden, a gate-controlled AC 5i semi-conductor switch arranged to connect the damping burden to the intermediate voltage transformer of the capacitive voltage transformer when the switch is conductive, and triggering means for rendering the 5 s switch conductive throughout occurrence of unwanted oscillations
GB 1384995 relates to a protection circuit for capactitative voltage transformers.lt discloses an arrangement switching device and burden resistor to suppress voltage transients.
WO2009143967 relates to protection system for voltage transformers. It discloses a concept of protection system for voltage transformers, finding application in the attenuation of ferroresonant states occurring in voltage transformers in high and medium voltage grids by using ferroresonance detection circuit, connected to

voltage transformer secondary winding terminals and in parallel with the damping circuit containing a control block and a switching means, connected in series to a damping burden, is the fact that the control block contains a PWM (Pulse Width Modulation) generator
However, there is no system which assesses a foolproof method of detecting a plurality of conditions resulting in ferroresonance or a plurality of conditions resulting in transient voltage; either jointly or independently.
Objects of the Invention:
An object of the invention is to design a suppression circuit system which dampens the ferroresonance oscillations and which suppresses transient oscillations in case of primary fault to achieve 3PT3 transient response class of IEC 60044-5.
Another object of the invention is to provide a suppression circuit system which does not worsen the transient response of CVT.
Yet another object of the invention is to sense the transient condition and suppress it according to IEC 60044-5 3PT1, 3PT2 and 3PT3.
Still another object of the invention is to senses the ferroresonance condition and suppresses the oscillations according to IEC 60044-5.
An additional object of the invention is to improve the accuracy of a CVT.
Yet an additional object of the invention is to provide a CVT to give better transient response (3PT3 of IEC60044-5).

Still an additional object of the invention is to reduce the size and cost of Electromagnetic unit (EMU) of CVT
Another additional object of the invention is to better the steady state performance of CVT.
Yet another additional object of the invention is to incorporate an 'intelligent' CVT suppression circuit system.
Still another object of the invention is to suppress ferroresonance oscillations in a CVT within an acceptable number of cycles in order to meet the requirements IEC 60044-5 standards.
An additional object of the invention is to lessen the temperature rise of Electromagnetic unit (EMU) of CVT.
Yet an additional object of the invention is to eliminate of inductors and capacitors in Ferroresoannce suppression circuits.
An additional object of the invention is to develop one common suppression system to detect and suppress the ferroresonance and transient conditions.
An additional object of the invention is to provide a suppression system which is intelligent so that it can be used to monitor the healthiness of the CVT by reading its data continuously.
Yet an additional object of the invention is to detect the ferroresonance using different principles or methods so that CVT is protected in a better way.

Still an additional object of the invention is to detect the transient condition using different methods so that these oscillations can be suppressed to give better performance of relays.
Summary of the Invention:
For the purposes of this specification, a 'burden' refers to an electrical load or a resistance.
According to this invention, there is provided digital transient control system to enhance response of CVT, said system comprises:
a. input means adapted to receive inputs from said transformer;
b. voltage transformer adapted to attenuate said input received by said input
means to obtain attenuated input signal;
c. signal conditioning means adapted to condition said attenuated input signal,
before being relayed further;
d. Analog to Digital Converter with at least a first channel input and a second
channel input, said conditioned signal being given to said second channel of
said Analog to Digital Converter in order to obtain RMS input signals and
instantaneous digital samples of input signal;
e. rectifier means and a filter circuit adapted to receive said attenuated signal
from said voltage transformer in order to convert said attenuated signals into
DC signals, said DC signal being given to said first channel of said Analog
to Digital Converter in order to obtain digital samples of DC signal;
f. frequency detection means adapted to receive attenuated signals from said
voltage transformer in order to convert said attenuated signals into a pulse
train to provide interrupts in a microcontroller set for each pulse,

g. microcontroller adapted to receive each of said RMS input signals, digital
samples, interrupts; further adapted to calculate frequency of the
corresponding pulse and still further including:
i. storage means for storing preset values which are threshold values in
relation to each condition selected from a group of conditions consisting
of Ferro-resonance condition based on said digital samples, Ferro-
resonance condition based on said RMS signals; Ferro-resonance
condition based on said frequency; Transient condition detection based
on said digital samples; Transient condition detection based on said
RMS; Transient condition detection based on DC signals;
ii. comparator means adapted to compare each value in relation to said RMS input signals, said digital samples, said frequency with corresponding stored preset values in order to obtain a comparative score; and
iii. decision making means adapted to decide at least two conditions, first condition being selected from a first group of conditions consisting of normal working condition; Ferro-resonance condition based on said digital samples, Ferro-resonance condition based on said RMS signals; Ferro-resonance condition based on said frequency; and second condition being selected from a second group of conditions consisting of normal working condition; Transient condition detection based on said digital samples; Transient condition detection based on said RMS; Transient condition detection based on DC signals; and

h control means adapted to control a steady state device for triggering a suppression circuit for suppressing said detected ferroresonance conditions or said transient voltage conditions based on each of said decided conditions.
Typically, said suppression circuit includes thyristor solid state switch assembly comprising a first set of thyristors connected across a full rated burden in order to trigger said suppression circuit upon detection of said first condition and further comprising a second set of thyristors connected across a half or part of rated burden in order to trigger said suppression circuit upon detection of said second condition; said burden being a single common burden.
Alternatively, any other suitable solid state device for AC applications can be used in place of Thyristor.
Typically, said system includes a driver means connected to said microcontroller for driving said solid state device.
Typically, said microcontroller includes disabling means adapted to disable decision making means upon obtaining decided condition for a pre-defined amount of time in correlation with the amount of time required for suppressing said decided condition.
Typically, said signal conditioning means includes filtering means in order to filters noise of said attenuated signal.
Typically, said signal conditioning means includes booster means adapted to boost said attenuated signal to a required level.

Typically, said storage means is editable storage means adapted to edit said stored reference values according to user preference, said values being amplitude values, frequency values, time values, addition of dead time value.
Brief Description of the Accompanying Drawings:
Figure 1 illustrates a CVT schematic diagram of the prior art; Figure 2 illustrates Ferroresonance oscillations in a CVT of Figure 1;
Figure 3 illustrates Series RLC Filter (first ferroresonance suppression circuit of the prior art);
Figure 4 illustrates Impedance, power versus frequency characteristics of series RLC filter of Figure 3;
Figure 5(a) illustrates Power frequency Blocking Filter; Figure 5(b) illustrates Digital model of the filter of Figure 5(a);
Figure 6 illustrates Impedance, power versus frequency characteristics of power frequency blocking filter;
Figure 7 illustrates Simple Electronic FSC;
The invention will now be described in relation to the accompanying drawings, in which:
Figure 8 illustrates Modified Electronic FSC;

Figure 9 illustrates proposed thyristor (solid state switch) based Electronic FSC
block diagram;
Figure 9a illustrates a circuit diagram for the suppression circuit system;
Figure 9b illustrates a flow diagram of Transient - Ferroresonance Suppressor
microcontroller logic;
Figure 9c illustrates a flow diagram for frequency calculation;
Figure 10 illustrates CVT Model implemented in pSCAD;
Figure 11 illustrates Ferroresoannce Simulation with series RLC filter as FSC at 80% input voltage wherein Figure 11(a) relates to CVT Secondary Voltage; Figure 11(b) relates to its RMS Value; and Figure 11(c) relates to Current through FSC elements.
Figure 12 illustrates Ferroresoannce Simulation with RLC filter and 300 W permanent burden as FSC at 80% input voltage wherein Figure 12(a) relates to CVT Secondary Voltage; Figure 12(b) relates to its RMS Value; and Figure 12(c) relates to Current through FSC elements.
Figure 13 illustrates Ferroresoannce with Series RLC and Permanent burden of 300 W as FSC at 80% input voltage, wherein Figure 13(a) illustrates Simulation Result and Figure 13(b) illustrates Practical Test Result.
Figure 14 illustrates Ferroresoannce with Thyristor FSC with 100 W Permanent Burden at 80% input voltage wherein Figure l^(a) relates to CVT Secondary Voltage; Figure 14(b) relates to its RMS Value; and Figure 14(c) relates to Current through FSC elements.

Figure 15 illustrates Ferroresoannce with Electronic FSC and Permanent burden of 100 W as FSC at 100% input voltage, wherein Figure 15(a) illustrates Simulation Result and Figure 15(b) illustrates Practical Test Result.
Figurel6 illustrates Transient Response of CVT with Series RLC filter and 300W Permanent Burden. The upper graph shows primary voltage and the lower graph shows secondary voltage of CVT (fault applied at primary winding at a time of t=ls)
Figure 17 illustrates Transient Response of CVT with Series RLC FSC and 300 W Permanent Burden, wherein Figure 17(a) illustrates Simulation Result and Figure 17(b) illustrates Practical Test Result.
Figure 18 illustrates Transient Response with Thyristor FSC and 100 W Permanent Burden, wherein Figure 18(a) illustrates Simulation Result and Figure 18(b) illustrates Practical Test Result. In each of these Figures, upper graph is primary voltage, middle graph is secondary voltage, and the lower graph is the voltage across the damping burden connected in series with the thyristor.
Figure 19 illustrates Transient Response of CVT with Series RLC FSC and 300 W Permanent Burden with reduced magnetizing current of VT (4mA), wherein Figure 19(a) illustrates Simulation Result and Figurel9(b) illustrates Practical Test Result.
Figure 20 illustrates Transient Response with Thyristor FSC and 100 W Permanent Burden with low magnetizing current of VT (4mA), wherein Figure 20(a) illustrates Simulation Result and Figure 20(b) illustrates Practical Test Result.

Detailed Description of the Accompanying Drawings:
According to this invention, there is provided a digital transient control system to enhance response of CVT.
This is a Thyristor (or any other solid state switch) based electronic system connected in series with a damping resistor across Capacitor Voltage Transformer secondary terminals as a protection device and a transient suppressor. It senses the dangerous ferroresonance condition in CVT and brings the damping resistor to damp the ferroresonance oscillations by triggering the thyrsitor switch. It also senses the transient oscillations of a CVT in case of its primary fault and brings the damping resistor into picture by triggering the second thyristor switch thereby suppressing the oscillations. This circuit not only protects the CVT from ferroresonance but also damps the transient oscillations. In normal operating conditions, the thyristor switch is open and hence no damping burden is connected. With this circuit, CVT meets all the transient response classes mentioned in IEC 60044-5, i.e. 3PT1 or 6PT1, 3PT2 or 6PT2 and 3PT3 or 6PT3.
According to the prior art, a typical 420 kV,4400 pf CVT is shown in Figure 1 of the accompanying drawings. It is used for analysis. Ferroresonance is a phenomenon due to which distorted high voltages are produced in the CVT. The Ferroresonance is created by closing the breaker S2 for a specified duration (about 100ms) and opening after that. Immediately after opening breaker S2, a distorted voltage oscillations with higher in magnitude as shown in Figure 2 of the accompanying drawings appears across VT terminals if proper suppression circuit is not connected across VT. Hence, one of the FSC as explained below is needed to suppress these oscillations.

A. Series RLC Filter is a first FSC according to the prior art:
Parameters of the series RLC filter shown in Figure 3 of the accompanying drawings are chosen in such a way that it resonates at l/3rd of fundamental frequency (it is 16.66 Hz if the fundamental frequency is 50 Hz) at which dominant Ferroresonance oscillations occur as shown in Figure 2 of the accompanying drawings and hence filter's impedance, shown in (1) is equal to R and a maximum load (in W) is connected. The filter impedance is maximum at fundamental frequency and hence acts as an open circuit. But this filter impacts the transient response and accuracy of the CVT as the filter imposes a burden of specified magnitude (around 60VA) at low power factor (0.12 lag) at fundamental frequency. Hence, to get the good accuracy (0.2 class of IEC60044-5), the core size of the intermediate voltage transformer(VT) has to be large. The size of the filter inductor and capacitor is more. Hence, total size and cost of CVT is more.

The filter parameters were chosen as R = 75Ω , L=1.825H, and C= 50uF at 50 Hz fundamental frequency connected across 200 V auxiliary winding. Therefore, the variation of impedance and active power load of the filter with frequency is shown in Figure 4 of the accompanying drawings.
B. Power Frequency Blocking Filter is a second FSC according to the prior art:
The circuit shown in Figure 5 of the accompanying drawings is a series-parallel
RLC filter consisting of two inductors Lf1 and LF2 with the mutual coupling Mf, a
capacitor Cf, and damping resistor Rf, tuned to the fundamental frequency with a
high Q factor. The damping resistor is used to attenuate Ferroresonance

oscillations. The filter impedance, shown in (2) is high at the fundamental frequency. Therefore, this filter has no loading effect on the CVT under normal operating conditions.

At off-nominal frequencies, the impedance of the filter gradually approaches to the resistance of the damping resistor. The variation of impedance, active power load with frequency is shown in Figure 6 of the accompanying drawings. But this filter impacts the transient response. The size of the VT has to be more to get the specified accuracy due to energy storage elements. The size and cost of the CVT is also more due to the filter components and increased VT size. The filter is designed at 50 Hz frequency connected at 63.5 V, and the values are:

C. Simple Resistive Burden is a third FSC according to the prior art:
A simple resistive burden can also be used to suppress the ferroresonance if the power capacity of the resistor is high enough to suppress the ferroresonance. The disadvantage of this FSC is its large burden reduces the accuracy of the CVT. Large resistive burden can also hamper the transient response. If the VT of CVT is immersed in oil, then this large burden can also cause the rise in temperature of the oil and hence affects the performance and reliability of the CVT. Normal practice is to employ a limited value of permanent burden along with the other type of

FSCs mentioned above. It is necessary to employ at least some permanent burden across CVT as it will help to minimize the chances of CVT to fall into ferroresonance mode.
The FSCs explained in the above section can damp the Ferroresonance oscillations. But the transient performance of CVT is affected by them. Hence, there is a need to develop an FSC which should not only suppresses Ferroresonance and should not affect transient response. And also the suppression system should sense the transient condition and damp the oscillations by bringing resistive burden across VT secondary. The thyristor based Electronic FSC shown in Figure 7 and Figure 8 of the accompanying drawings can suppress the Ferroresonance and transient response oscillations. Reference numeral 1 refers to a thyristor assembly in conjunction with full burden (load resistance i.e. Rl) which is typically activated in order to suppress ferroresonance. Reference numeral 2 refers to a thyristor assembly in conjunction with half burden (load resistance i.e. R2) which is typically activated in order to suppress transient voltage. One common resistor with a tap at specified point can be used with both these thyristor switches.
The FSC shown in Figure 7 of the accompanying drawings has already been explained in reference to suppressing ferroresonance oscillations.
Figure 9 illustrates proposed thyristor based Electronic FSC block diagram.
Figure 9a illustrates a circuit diagram for the suppression circuit system.
Figure 9b illustrates a flow diagram of Transient - Ferro-resonance Suppressor
microcontroller logic.
Figure 9c illustrates a flow diagram for frequency calculation.

Ferro-resonance detection depends on three factors.
1) Ferro-resonance detection by ADC samples
2) Ferro-resonance detection by RMS value
3) Ferro-resonance detection by frequency
Transient detection is also depend on three factors
1) Transient detection by ADC samples
2) Transient detection by RMS value
3) Transient detection by DC value of input signal
Hence, it is important, that each of these 6 conditions independently be monitored in order to ascertain conditions of ferroresonance or transient voltage depending upon the condition sensed, and so that timely suppression circuit can be actuated.
In accordance with an embodiment of this invention, there is provided an input means (I/P) adapted to receive inputs in a continuous fashion from a capacitor voltage transformer (CVT). From here, the input is pre-processed and processed for obtaining pertinent outputs.
In accordance with another embodiment of this invention, there is provided a voltage transformer (VT) adapted to attenuate the voltage input received by said input means (I/P). It converts a typical 63.5 V input to a certain predefined mV input.
In accordance with yet another embodiment of this invention, there is provided a signal conditioning means (SC) adapted to condition the attenuated input signal, before being relayed further. It filters the noise and boosts the signal to the required level.

In accordance with still another embodiment of this invention, there is provided an Analog to Digital Converter (ADC) with at least a first channel input (CHI) and a second channel input (CH2). The conditioned signal is given to the second channel (CH2) of the ADC. This provides for the RMS input signals in order to detect the conditions of 'Ferro-resonance detection by RMS' and 'Transient detection by RMS', as disclosed above. CH2 also provides the continuous attenuated analog data to the ADC to get the ADC samples which is used to detect ferroresonance and transient conditions using a program logic implemented in a microcontroller, as disclosed above.
In accordance with an additional embodiment of this invention, there is provided a rectifier means (RM) and a filter circuit (FC) adapted to receive attenuated signals from the voltage transformer (VT) in order to convert the attenuated signals into DC signals, which is given to the first channel (CHI) of the ADC in order to get digital samples. These samples are compared with a transient set value and the solid state device is triggered if transient condition is detected.
In accordance with yet an additional embodiment of this invention, there is provided a frequency detection means (FM) adapted to receive attenuated signals from the voltage transformer (VT) in order to convert the signals into a pulse train to obtain frequency and provide interrupts in the microcontroller set for each pulse. Once the interrupt is detected, a micro controller calculates the frequency of the corresponding pulse. If the frequency of this signal exceeds a set value, the solid state device (in this case it is Thyristor) is triggered.

This provides the input signals in order to detect the conditions of 'Ferro-resonance detection by frequency, as disclosed above.
In accordance with still an additional embodiment of this invention, there is provided a microcontroller (MC) adapted to detect ferroresonance conditions and transient voltage conditions and further adapted to control a steady state device for triggering a suppression circuit for suppressing ferroresonance conditions and transient voltage conditions.
The ferroresonance conditions need to be detected from any one of the three conditions mentioned above. The transient voltage conditions, too, need to be detected from any one of the three conditions mentioned above.
The microcontroller includes storage means for storing preset values which are threshold values in relation to detecting the following conditions:
1) Ferro-resonance detection by ADC samples
2) Ferro-resonance detection by RMS
3) Ferro-resonance detection by frequency
4) Transient detection by ADC samples
5) Transient detection by RMS
6) Transient detection by DC value of input signal
For each of these conditions reference preset threshold values are stored by the controller which are later looked up in' correlation to instantaneous input as received from each of said ADC and FM.

The microcontroller continuously monitors the output samples from ADC and checks whether these ADC sample values are crossing the references set for Ferro-resonance and transient condition in case of primary fault. The ferroresonance and transient detection conditions are two different logics which are running independently in round robin mode. The ADC samples are also used to calculate the RMS values for every half cycle (10ms in case of 50Hz) and the microcontroller checks for the transient and ferroresonance conditions based on the set RMS values thereby takes the decision to trigger the corresponding solid state device.
The suppression circuit is the thyristor assembly of Figure 8.
The output of microcontroller is given to a driver (D) for solid state device.
As explained above, the ferroresonance condition is detected by three independent
logics based on (1) ADC samples (2) RMS value (3) Frequency
The ADC sample, RMS, and frequency logics are independent and do not interrupt
each other. Once, the ferroresonance condition is detected by any one of the logics,
then other logics are disabled for specified time to avoid racing condition.
Also the transient condition is detected by three independent logics based on (1) ADC samples (2) RMS value (3) DC value of input signal. The ADC sample, RMS, and DC value of input signal logics are independent and do not interrupt each other. Once, the transient condition is detected by any one of the logics, then other logics are disabled for specified time to avoid racing condition. The microcontroller is programmed to differentiate between transient and ferroresonance condition and the interaction between the two logics to avoid malfunctioning of the device.

The damping burden is connected across the CVT secondary by switching on a power electronic device in case of fault (either Ferroresonance or transient condition). Under normal operating conditions, there is very low and inherent burden connected; hence accuracy of the CVT also will be improved. The rise in temperature of the EMU is less. This technique leads to size reduction of the electromagnetic unit of CVT as it does not involve bulky inductor and capacitor. It also damps the dangerous high voltage oscillations due to Ferroresoannce within less time compared to other techniques. As it does not involve any energy storage elements, it will not affect the transient response of the CVT. Moreover, by switching on the electronic device in case of transient condition, it can further damp the low voltage oscillations by bringing the damping resistance across CVT secondary. To design the FSC, the following points are considered:
a. The magnitudes of high voltage oscillations without any FSC are
approximately 2.5 p.u. and the CVT should withstand (a voltage of 1.5 p.u).
for about 30s according to IEC 60044-5. Hence the FSC can be turned on if
the voltage exceeds 1.5 p.u so that it will not affect the normal CVT
operation. The switch can also be made ON if the frequency of the CVT
output voltage is less than a specified reference frequency.
b. The switch can be made ON for a specified duration until fault is cleared.
c. In case of fault, the damping burden should be connected in both positive
and negative half cycles hence switch should be selected accordingly.
d. The switch can also be turned on if the RMS value of the CVT voltage falls
below certain low value to suppress the low transient oscillations.

e. The ON time and OFF time of the switch can be programmed.
The above mentioned switching logic for the thyristor is implemented by means of a computation means such as a microcontroller. The block diagram of the proposed switching logic is shown in Figure 9 of the accompanying drawings. The CVT output voltage (63.5 V) is given to the VT which will further steps down to a voltage of 600 mV. This small voltage is given to the Analog to Digital Converter (ADC) to convert the analog signal into to digital data. The microcontroller gives a signal to the one of the thyristor switch (of Figure 8 of the accompanying drawings) based on the fault condition (Ferroresonance or Transient).
According to an exemplary embodiment, during testing, it was observed that the Ferroresoannce was suppressed within 5 cycles with a series burden of 80Ω connected at 200 V as shown in Figure 7 of the accompanying drawings. With the same burden, the transient response is better. But with half burden as that of 80Ω, i.e. 40Ω, the transient response is further better. But with 40Ω burden, Ferroresoannce was getting suppressed in 8 cycles. Hence, an Electronic FSC shown in Figure 8 is proposed in this invention. This contains two switches connected in series with 80Ω and 40Ω respectively to suppress Ferroresoannce and transient response oscillations. The values of these resistances can be adjusted, if required, according to the specifications of a CVT.
Each of the above-mentioned FSCs were tested and the following description elaborates the nature and results of the tests: A. Ferroresoannce Test Results

The Ferroresoannce test was simulated in PSCAD/EMTDC on 400 kV 420 kV, 4400 pf CVT and a practical test was also conducted using a 750 kV test transformer with series RLC filter and Thyristor based Electronic circuit as FSC.
(a) Series RLC FSC
The model of 400 kV CVT implemented in PSCAD is shown in Figure 10 of the accompanying drawings
With the series RLC filter parameters given above, the Ferroresonance simulation was performed by applying a short circuit using a breaker S2 at time t= 2s and releasing at t=2.1s. The simulation results are shown in Figure 11 which shows that the series RLC Filter alone cannot alone suppress Ferroresonance completely. It can be clearly observed from the VT secondary RMS voltage before and after short circuit.
The Permanent burden of 300 W is also connected across CVT secondary along with the series RLC filter. The corresponding simulation results are shown in Figure 12 of the accompanying drawings. This results shows that a permanent burden along with RLC filter reduces damps the Ferroresonance oscillations more
precisely.
The practical test results with series RLC filter along with 300 W permanent burden is shown in Figure 13b of the accompanying drawings. The corresponding simulation result given in Figure 13a of the accompanying drawings for a comparison.

(b) Thyristor Based Electronic FSC- Present invention (suppression circuit system of the current invention)
Thyristor was connected at 200 V with a total series resistance of 80Ω and having a tap at 40Ω as shown in Figure 8 of the accompanying drawings. The switch 1 was turned ON during Ferroresonance conditions and switch 2 was turned ON during transient conditions. A permanent burden (load) of 100 W was also connected across CVT secondary for better Ferroresonance suppression. The simulation result with Electronic FSC is shown in Figure 14 of the accompanying drawings.
From Figure 14, the Ferroresoannce was suppressed faster than that of series RLC filter. The simulation and practical test results with thyristor FSC at 100% input voltage is shown in Figure 15 of the accompanying drawings. In this Figure 15b, the upper graph is voltage across the short circuited winding of VT, the second graph is the voltage across another secondary winding. The third graph is the voltage across resistor in series with the thyristor, which shows the ON duration of thyrstor.
B. Transient Response Test Results
Transient response test was conducted by applying the line to ground fault at HV terminal. This was accomplished by closing the breaker S1 of Figure 1 or Figure 10. The transient response test was simulated and practically tested using series RLC filter with permanent burden of 300 W and the thyristor based Electronic FSC (of the current invention) with a permanent burden of 100W. In all the cases, fault is applied at primary voltage zero crossing as the transient response is more critical at zero crossing rather than peak point and other points.

(a) Series RLC filter
The simulated result with series RLC filter and permanent burden of 100W is shown in Figure 16 of the accompanying drawings. The enlarged view of CVT secondary voltage is shown in Figure 17a of the accompanying drawings. The corresponding practical test result is shown in Figure 17b of the accompanying drawings as a comparison.
(b) Thyristor FSC- Present Invention (suppression circuit system of the current
invention)
The switch 2 of Figure 8 was triggered in case of transient condition is detected and hence a 40D resistance is connected across 200 V winding. The 100 W permanent burden is also connected across the secondary winding of CVT. The simulation and practical test results for a short circuit at primary zero crossing is shown in Figure 18 of the accompanying drawings. By comparing Figures 17 and 18, it can be observed that with Electronic FSC, the transient response is much better than the conventional series RLC FSC.
(c) Transient response on CVT with low VT magnetising current.
The VT magnetizing current is more, the more the energy stored in the capacitor and compensating reactor and hence more the subsidence transient. The magnetizing current of VT can be reduced by designing the core with less air gaps. The VT core discussed above is C&I type whose magnetizing current is 12mA at rated voltage. If the core is designed with interleaved laminations then the


Table 1: Transient Response classes of IEC 60044-5
magnetizing current is reduced to 4 mA. The transient response is studied on this CVT with interleaved VT core with both series RLC FSC and Thyristor FSC. Figure 19 of the accompanying drawings shows the transient response results of a typical 420 kV, 4400pf CVT with reduced VT magnetizing current with series RLC filter as FSC. The transient response is better compared to higher magnetizing current shown in Figure 17. The test results using Thyristor FSC is shown in Figure 20 of the accompanying drawings. This is the best result among all. The result shows that the CVT is meeting all the transient response classes such as 3PT1, 3PT2, and 3PT3 of IEC 60044-5. The various transient response class mentioned in IEC 60044-5 is given in Table 1 and the transient response achieved by thyristor based Electronic FSC is given in Table 2. From these tables, it is clear that with the proposed Electronic FSC, the CVT could able to meet 3PT3 transient response class.

Time
(ms) Ratio (%)

10 3.5
20 1.4
40 0.7
60 0.5
90 0.1
Table 2: Transient response result achieved with proposed Electonic FSC Different Ferroresoannce suppression circuits available in the literature were reviewed. The 420 kV, 4400pf CVT was simulated using PSCAD/EMTDC for Ferroresoannce and Transient response oscillations. The series RLC filter alone cannot suppress Ferroresoannce within specified time. Hence, a permanent resistive burden along with series RLC filter not only helps to suppress the Ferroresoannce but also prevent CVT to enter into Ferroresoannce mode. But this type of FSC will badly affect the transient response of CVT.
Hence, a Thyristor based Electronic FSC is proposed, which not only suppresses the Ferroresonance but also the Transient Oscillations during fault at CVT input terminals. A reduced permanent burden is sufficient because the Electronic FSC is fast enough to suppress Ferroresonance. The simulations as well as practical test results with series RLC and Electronic FSC shows that the Electronic FSC can suppress Ferroresonance very fast (less than 5 cycles) and also suppresses transient oscillations there by meeting all the transient response standard of IEC 60044-5. The temperature rise of EMU with new FSC is also less. Hence performance and thermal reliability will be improved.

Transient Response of CVT is not affected by this circuit and it also suppresses the transient oscillations in case of CVT primary fault. Hence transient response of CVT with this circuit is better compared to existing circuits and meeting 3PT3 class of IEC 60044-5. Ferroresonance oscillations are suppressed within 5 cycles and hence meet the requirements of IEC 60044-5. Accuracy of CVT with this circuit is better compared to existing one. Steady state performance of CVT is better because in normal conditions there is no burden connected across CVT. Cost of the Electromagnetic unit (EMU) of CVT is less with this circuit. Temperature rise of the EMU is less. Size of the EMU is also less due to the elimination of inductors and capacitors and higher permanent resistive burden in Ferroresonance suppression circuit.
The system of this invention makes the CVT to give better transient response (3PT3 of IEC60044-5) compared existing suppression systems. The size and Cost of the EMU of CVT is less. Cost can be reduced by 30%. Steady state performance of CVT is better compared to existing suppression systems. Probability of incorporating intelligence in the CVT is improved.
The advantages with this circuit are:
1. It will not affect the transient response of CVT.
2. It will sense the transient condition and suppresses according to IEC 60044-5 3PT1, 3PT2 and 3PT3. 3. It will not affect the steady state performance of CVT.

4. It senses the ferroresonance condition and suppresses the oscillations according to IEC 60044-5.
5. Accuracy of the CVT can be improved

While this detailed description has disclosed certain specific embodiments of the present invention for illustrative purposes, various modifications will be apparent to those skilled in the art which do not constitute departures from the spirit and scope of the invention as defined in the following claims, and it is to be distinctly understood that the foregoing descriptive matter is to be interpreted merely as illustrative of the invention and not as a limitation.

We claim,
1. A digital transient control system to enhance response of CVT, said system comprising:
a) input means adapted to receive inputs from said transformer;
b) voltage transformer adapted to attenuate said input received by said input means to obtain attenuated input signal;
c) signal conditioning means adapted to condition said attenuated input signal, before being relayed further;
d) Analog to Digital Converter with at least a first channel input and a second channel input, said conditioned signal being given to said second channel of said Analog to Digital Converter in order to obtain RMS input signals and instantaneous digital samples of input signal;
e) rectifier means and a filter circuit adapted to receive said attenuated signal from said voltage transformer in order to convert said attenuated signals into DC signals, said DC signal being given to said first channel of said Analog to Digital Converter in order to obtain digital samples of DC signal;
f) frequency detection means adapted to receive attenuated signals from said voltage transformer in order to convert said attenuated signals into a pulse train to provide interrupts in a microcontroller set for each pulse;
g) microcontroller adapted to receive each of said RMS input signals, digital samples, interrupts; further adapted to calculate frequency of the corresponding pulse and still further including:
i. storage means for storing preset values which are threshold values in relation to each condition selected from a group of conditions

consisting of Ferro-resonance condition based on said digital samples, Ferro-resonance condition based on said RMS signals; Ferro-resonance condition based on said frequency; Transient condition detection based on said digital samples; Transient condition detection based on said RMS; Transient condition detection based on DC signals; ii. comparator means adapted to compare each value in relation to said RMS input signals, said digital samples, said frequency with corresponding stored preset values in order to obtain a comparative score; and
iii. decision making means adapted to decide at least two conditions, first condition being selected from a first group of conditions consisting of normal working condition; Ferro-resonance condition based on said digital samples, Ferro-resonance condition based on said RMS signals; Ferro-resonance condition based on said frequency; and second condition being selected from a second group of conditions consisting of normal working condition; Transient condition detection based on said digital samples; Transient condition detection based on said RMS; Transient condition detection based on DC signals;
and
h) control means adapted to control a steady state device for triggering a suppression circuit for suppressing said detected ferroresonance conditions or said transient voltage conditions based on each of said decided conditions.
2. A system as claimed in claim 1 wherein, said suppression circuit includes a thyristor assembly comprising a first set of thyristors connected across a full

rated burden in order to trigger said suppression circuit upon detection of said first condition and further comprising a second set of thyristors connected across a half or part of rated burden in order to trigger said suppression circuit upon detection of said second condition; said burden being a single common burden.
3. A system as claimed in claim 1 wherein, said system includes a driver means connected to said microcontroller for driving said solid state device.
4. A system as claimed in claim 1 wherein, said microcontroller includes disabling means adapted to disable decision making means upon obtaining decided condition for a pre-defined amount of time in correlation with the amount of time required for suppressing said decided condition.
5. A system as claimed in claim 1 wherein, said signal conditioning means includes filtering means in order to filters noise of said attenuated signal.
6. A system as claimed in claim 1 wherein, said signal conditioning means includes booster means adapted to boost said attenuated signal to a required level.
7. A system as claimed in claim 1 wherein, said storage means is editable storage means adapted to edit said stored reference values according to user preference, said values being amplitude values, frequency values, time values, addition of dead time value.