FORM 2
THE PATENTS ACT, 1970
(39 of 1970)
&
THE PATENTS RULES, 2003
COMPLETE SPECIFICATION
(See section 10, rule 13)
1. Title of the invention: DOUBLE-BASE NUMBER SYSTEM BASED DATA PROCESSING
2. Applicant(s)
NAME NATIONALITY ADDRESS
TATA CONSULTANCY Indian Nirmal Building, 9th Floor, Nariman Point,
SER VICES LIMITED Mumbai 400021, Maharashtra, India
R Preamble to the description
COMPLETE SPECIFICATION
The following specification particularly describes the invention and the manner in which it
is to be performed.

TECHNICAL FIELD
The present subject matter, in general, relates to data processing, in particular, to a
double-base number system based data processing system.
BACKGROUND
Real-time applications, such as digital signal processing and security applications
are mathematical applications that require computation of arithmetic operations. For example, in the security applications, random mathematical sequences are used as keys to encrypt information to be used as digital certificates. Similarly, in digital signal processing, discrete time signals are represented by a sequence of numbers or symbols. Such applications typically have high computational complexities as these applications require processing large volumes of data within a short period of time for computation of complex arithmetic operations. The applications generally use processors for fulfilling the computational requirements of processing the large volumes of data in a fast and efficient way.
Typically, the processors are configured to process the data in form of bits.
Further, data, such as numbers is generally represented using single-base number systems (SBNS), such as binary, octal, or decimal systems. The SBNS however consume large number of bits, thereby affecting the processing speed and capability of the processors. In recent years, double-base number systems (DBNS) have been introduced to represent data in real-time applications as the DBNS utilizes fewer bits as compared to the SBNS. However, processors based on the DBNS generally have high hardware complexities and increased latency in cases of large bit size data.
SUMMARY
This summary is provided to introduce concepts related to processing data using
double-base number representation system. These concepts are further described below in the detailed description. This summary is not intended to identify essential features of the claimed subject matter nor is it intended for use in determining or limiting the scope of the claimed subject matter. In one implementation, a method for reducing memory usage is described.
The method comprises computing bits data by performing bits computation
process on input data. The bits data may be defined as data representing the number of bits

required to represent the input data in binary form. Based on the bits data, a maximum value attainable by exponents of at least one summand required to convert the input data to DBNS representation is ascertained. The at least one summand is then determined based on the ascertaining, such that the at least one summand is a 2-integer nearest to the input data. The input data is then converted to DBNS representation based on the at least one summand.
These and other features, aspects, and advantages of the present subject matter
will be better understood with reference to the following description and appended claims.
BRIEF DESCRIPTION OF THE FIGURES
The detailed description is provided with reference to the accompanying figures.
In the figures, the left-most digit(s) of a reference number identifies the figure in which the reference number first appears. The same numbers are used throughout the drawings to reference like features and components.
Fig. 1 illustrates a data processing system, in accordance with an implementation
of the present subject matter.
Fig. 2 illustrates an exemplary method for processing data, in accordance with an
implementation of the present subject matter.
DETAILED DESCRIPTION
The present subject matter relates to methods and systems for processing data,
such as numbers in form of a double-base number system (DBNS) representation. The methods and systems may be used in various real-time applications, such as data security, digital signal processing (DSP), and data compression. Further, the systems implementing the method include, but are not limited to, a cryptography system, a data compression system, a mobile phone, a hearing aid, and an Elliptic Curve Cryptography (ECC) scalar multiplication system.
Numeral systems, also known as number systems are typically used to represent
numbers using graphemes or symbols in a consistent manner. Examples of such numeral systems include single-base number systems (SBNS), such as binary, octal, decimal, and hexadecimal number systems. In recent years, a new form of number systems known as the DBNS has been introduced to represent numbers. In DBNS, numbers are expressed as a sum of one or more terms of the form 2a3b, where 2a3b depicts a product of 2a and 3b. For example, in DBNS the

number 4 may be represented as 2 3, similarly 101 can be represented as 2332 + 2331 + 21 31 -2°3o. Using the DBNS for representing numbers has proved to be advantageous as the DBNS utilizes fewer bits as compared to the SBNS.
In addition, the DBNS representation has proved to be efficient in computing
arithmetic operations, such as addition, subtraction, and multiplication, particularly in applications where complex computation with large numbers have to be performed. Efficiency in computing the arithmetic operations allows the DBNS to be effectively useful for solving mathematical problems, particularly in real-time applications, such as in the field of DSP. The arithmetic operations are generally performed by processors provided in the devices running the real-time operations. For example, processors provided in a filter bank of a cellular communication device may be configured to perform the arithmetic operations. However, the processors based on the DBNS have high hardware complexities and increased latency in cases of large bit size data.
Further, advancements in DSP require processors capable of high speed
processing of signal data in real-time with a high degree of adaptability. In addition, minimization of energy consumption and area is desired for increasing efficiency of the processors required for the real-time applications, such as DSP. Further, as the processors are configured to compute arithmetic operations, such as multiplication and addition, major design requirements relate to enhancement of the processor's capability to compute arithmetic operations. Additionally, computing arithmetic operations include, apart from processing numbers, converting the numbers from their standard representation to DBNS before being processed and converting back to the standard representation after being processed, thus increasing the computation time and complexity.
In accordance with the present subject matter, systems and methods are described
for processing data, such as numbers in the form of DBNS in the real-time applications. The method for processing data may be implemented in a hardware device, such as a processor; a data processing program running on a computing system; or a combination thereof. For example, the method for processing data may be implemented on a computing system for computing elliptic curve cryptography (ECC) scalar multiplication, whereas for filter bank designs in mobile handsets and hearing aids the method for processing data may be implemented using one

or more processors having, such as adders, shifters, sign correctors, generators, etc. In one implementation, input data is received by a data processing system for processing. For example, for ECC scalar multiplication, the input data may be a private key or a public key represented in the form of numbers, similarly for applications in DSP, such as for the filter bank design in mobile handsets the input data may be discrete time signals represented by a sequence of numbers. The input data, say a number 'n', is then converted from its standard representation to the DBNS representation, in the form 2a3b, for being processed by the data processing system.
In one embodiment, a DBNS conversion method is implemented to represent the
input data as a sum of one or more summands of the form 2a3b, i.e., in the form of Σ2a3b. Initially, a maximum value (tmax) that the exponents 'a' and 'b' can attain for converting the input data in the required form of Σ2a3b is determined. In one implementation, for determining the value of tmax, the input data is initially converted from its number form to corresponding binary form using a bits computation process. Subsequent to conversion, a 2-integer 'z! nearest to the input data is determined by using the value of tmax such that the value of 'z' may be represented in the form of 2al3b1, where value of al and bl lies between 0 and tmax In one implementation, a summands determination process may be used for this purpose. The 2-integer 'z' thus forms a first summand from among the one or more summands used for representing the input data in the form ofΣ2a3b . In order to determine the remaining of the one or more summands, the 2-integer cz' is subtracted from the input data to determine a difference, referred to as an integer 'k'.
The bits computation process may then be applied on the integer 'k' to determine
value of the integer 'k' in the form of 2a23b2. The integer 'k' thus forms a next summand used for representing the input data in the form of Σ2a3b. The bits computation process and the summands determination process may then be repeated to determine the value of the one or more summands till the difference becomes zero. The values of the one or more summands thus determined may be added to ascertain value of the input data in the required form of Σ2a3b. A converted input data is thus obtained in the form of Σ2a3b such that value of each of the exponents 'a' and 'b' lies between 0 and tmax. The DBNS conversion method thus converts the input data from its standard representation to the DBNS representation in an efficient way. Further, converting the input data into the DBNS representation also reduces the memory space required to store the input data as compared to the memory space utilized by the other number systems, such as the SBNS as the input data is stored using bits corresponding to the values of the exponents 'a' and 'b'.

The converted input data is then processed by the data processing system for
computing arithmetic operations required for implementing the real-time applications. For example, the converted input data may be used to compute the ECC scalar multiplication required for generating digital signatures. Similarly, for the filter bank designs in mobile handsets and hearing aids, the converted input data may be used to transmit discrete time signals. Using the converted input data in the form of DBNS helps in reducing the complexity involved in computing the arithmetic operations, as the processors now need to compute the arithmetic operations using less number of bits. For example, for multiplying two numbers represented in the form of DBNS, say 2a3b and 2c3d, the processors simply need to add exponents corresponding to a common base, which is 2 and 3 in this case. Considering the aforementioned example to compute the result of multiplication of the two numbers, the processor needs to multiply 'a' with 'c' and 'b' with 'd' to give the result of multiplication as 2a+c3b+d. Using DBNS thus helps in reducing the complexity and time period required for computing the arithmetic "operations. Additionally, DBNS conversion method helps in reducing the memory size and resources required for converting the input data from the standard representation to the DBNS representation, thus reducing overall memory space, resources, and in turn power required by the data processing system for processing data, such as the input data.
While aspects of systems and methods for converting input to DBNS
representation can be implemented in any number of different computing systems, environments, and/or configurations, the embodiments are described in the context of the following exemplary system architecture(s).
Figure 1 illustrates exemplary components of a data processing system 102 for
processing data, in accordance with an embodiment of the present subject matter. Examples of fche data processing system 102 include, but are not limited to, computing device such as mainframe computers, workstations, personal computers, desktop computers, minicomputers, servers, multiprocessor systems, and laptops; a cellular communicating device such as a personal digital assistant, a smart phone, and a mobile phone; other DSP based devices, such as hearing aid devices; and the like. For instance, the data processing system 102 maybe implemented as one of a cryptography system, a data compression system, a mobile phone, a hearing aid, and an Elliptic Curve Cryptography (ECC) scalar multiplication system.

The data processing system 102, hereinafter referred to as the system 102,
includes one or more processor(s) 104, I/O interface(s) 106, and a memory 108 coupled to the processor 104. The processor 104 can be a single processing unit or a number of units, all of which could also include multiple computing units. The processor 104 may be implemented as one or more microprocessors, microcomputers, microcontrollers, digital signal processors, central processing units, state machines, logic circuitries, and/or any devices that manipulate signals based on operational instructions. Among other capabilities, the processor 104 is configured to fetch and execute computer-readable instructions and data stored in the memory 108.
Functions of the various elements shown in the figures, including any functional
blocks labeled as "processor(s)", may be provided through the use of dedicated hardware as well as hardware capable of executing software in association with appropriate software. When provided by a processor, the functions may be provided by a single dedicated processor, by a single shared processor, or by a plurality of individual processors, some of which may be shared. Moreover, explicit use of the term "processor" should not be construed to refer exclusively to hardware capable of executing software, and may implicitly include, without limitation, digital signal processor (DSP) hardware, network processor, application specific integrated circuit (ASIC), field programmable gate array (FPGA), read only memory (ROM) for storing software, random access memory (RAM), and non volatile storage. Other hardware, conventional and/or custom, may also be included. Further, the processor 104 may include various hardware components, such as adders, shifters, sign correctors, generators, etc. required for computing various applications such as arithmetic operations.
The I/O interface(s) 106 may include a variety of software and hardware
Interfaces, for example, interface for peripheral device(s), such as a keyboard, a mouse, an external, memory, and a printer. Further, the I/O interface(s) 106 may enable the system 102 to communicate with other computing devices, such as a personal computer, a laptop, and like.
The memory 108 may include any computer-readable medium known in the art
including, for example, volatile memory such as static random access memory (SRAM) and dynamic random access memory (DRAM), and/or non-volatile memory, such as read only

memory (ROM), erasable programmable ROM, flash memories, hard disks, optical disks, and magnetic tapes. The memory 108 also includes modules 110 and data 112.
The modules 110 include routines, programs, objects, components, data
structures, etc., which perform particular tasks or implement particular abstract data types. The modules 110 further include a bits computation module 114, a summands determination module 116, a computation module 118, and other module(s) 120. The other module(s) 120 may include programs or coded instructions that supplement applications and functions of the system 102.
On the other hand, the data 112. amongst other things, serves as a repository for
storing data processed, received, and generated by one or more of the modules 110. The data 112 includes, for example, bits computation data 122, summands data 124, computation data 126, and other data 128. The other data 128 includes data generated as a result of the execution of one or more modules in the other module(s) 120.
In one implementation, the system 102 is configured to process data required in
various real-time applications, such as data security, digital signal processing (DSP), and data compression. For example, for ECC scalar multiplication, the system 102 may be configured to process data, such as a private key or a public key represented in the form of numbers to obtain cryptographic data such as digital signatures. Similarly, for applications in DSP, such as for the filter bank design in mobile handsets, the system 102 may be configured to process data, such as discrete time signals represented by a sequence of numbers. According to an embodiment, input data, say a number 'n' for processing is received by the other modu!e(s) 120. In one implementation, the input data may be represented in any known numeral system used to represent numbers, for instance, the input data may be received in decimal representation. The input data is then converted from its standard representation to a DBNS representation, in the form 2a3b, for being processed by the computation module 118. In one embodiment, the input data is represented in the form of Σ 2a3b, i.e., as a sum 'S' of one or more summands of a summand set having summands of the form 2a3b. In one implementation, the summand set includes at least one summand.
Initially, a maximum value (tmax) that the exponents 'a' and 'b' can attain for
converting the input data in the required form of Σ 2a3b is determined by the bits computation module 114. For the purpose, the bits computation module 114 initially performs a bits

computation process. According to the bits computation process, the bits computation module 114 converts the input data from its standard form to binary form. Based on the binary form the bits computation module 114 obtains bits data corresponding to the input data. In one embodiment, the bits data may be defined as data represents the number of bits required to represent the input data in binary form. For example, if the input data is number 38, bits computation module 114 converts the number 38 to its binary form (1001102). The computation module 114 then counts the number of bits required for representing the input data in the binary form to obtain the bits data, which for the above example would be 6. Once the bits data is obtained, the bits computation module 114 ascertains the value of tmax. In one implementation, the bits computation module 114 divides the bits data by 2 to obtain the value of tmax. In the above example, the value of tmax is thus ascertained to be 6/2, i.e., 3. On the other hand, if the value of bits data was 5, then the value of tmax would be 5/2, i.e., 2.5 rounded off to an integer less then the obtained value, i.e., 2 therefore, the value tmax for bits data 5 will be ascertained to be 2. The bits data and the value of tmax may then be saved in the bits computation data 122. Using the bits computation process to obtain the maximum value helps reducing the memory and space requirements by around 50% as compared to the conventional data processing systems.
The value of tmax is then provided to the summands determination module 116 for
determining the one or more summands of the form 2a3b required to convert the input data to the DBNS representation of Σ 2a3 using a summands determination process. In one implementation, the summands determination module 116 determines a 2-integer 'z' nearest to the input data, say a number 'n', using the value of tmax such that the value of 'z' may be represented in the form of 2a,3b', where values of al and bl lie between 0 and tmax. For the purpose, the summands determination module 116 initially assigns the value of tmax to the exponents 'a! and 'b' and computes the value of 'z' as a product of 2tmax and 3tmax, i.e., 2tmax X 3tmax The summands determination module 116 then compares the value of 'z' with the input data. If the value of 'z' is extremely greater than the input data, then the summands determination module 116 again decreases the value of either 'a' or 'b' by 1 to get the integer nearest to 'n'. The summands determination module 116 thus repeats the above stated process till the 2-integer 'z' nearest to the input data is determined. In one implementation, the nearest number may be determined using a look up table having data related to nearest number for all the numbers. The 2-integer 'z' thus forms a first summand from among the one or more summands used for representing the

number 'n' in the form of Σ 2a3b. The 2-integer V, i.e., the first summand is then saved in a summand set stored in the summands data 124. Further, the remaining one or more summands are determined such that the remaining of the one or more summands are less than the first summand.
In one embodiment, the first summand is a largest 2-integer less than or equal to
the input data. For the purpose, the summands determination module 116 initially assigns the value of tmax to the exponents 'a' and 'b' and computes the value of 'z' as a product of 2tmax and 3tmax, i.e., 2tmax X 3tmax. The summands determination module 116 then compares the value of 'z' with the input data. If the value of 'z' is greater than the input data, then the summands determination module 116 again decreases the value of either 'a' or 'b' by 1 to get the integer nearest to 'n'. The summands determination module 116 thus repeats the above stated process till the largest 2-integer 'z' less than or equal to the input data is determined. The 2-integer 'z' thus forms the first summand from among the one or more summands used for representing the number 'n' in the form of Σ2a3b. Assigning the largest 2-integer 'z' less than or equal to the input data as the first summand helps in decreasing the memory consumption in small processors. For example, in a 64 bit processor selecting a 2-integer greater than the input data will consume more memory and space as compared to memory consumed by the largest 2-integer less than or equal to the input data. For instance, a 63-bit integer n = 9223372036854775806 may be expressed as a difference of a 64-bit number (9223372036854775808) and 2, i.e., 9223372036854775808 - 2 = 263 -2. Computing such a representation that exceeds 64 bit computation requires the use of a multi-precision integer arithmetic (MIA) library. However, using the MIA library for computations consumes more memory and power, which may not suitable for tiny hardware processors, such as processors used in the hearing aids. Thus, the first summand is always determined as a largest 2-integer less than or equal to n.
Referring to the above example, for the number 38, the summands determination
module 116 determines the largest 2-integer 'z' by assigning 'a' and 'b' the values between 0 and tmax, i.e., 3. The summands determination module 116 first determines the value 23X33 which is 216 and thus greater than 38. The summands determination module 116 may then determine the value of 23X32 and 22X33 and so on until the largest 2-integer less than or equal 38 is identified. In the present example, the largest 2-integer 'z' less than 38 is determined to be 2232,

i.e., 36. Thus, for the input data 38 the first summand is determined to be 2 3 and saved in the summands data 124.
In one implementation, the summands determination module 116 is configured to
determine one summand at a time for the input data. Upon determination of a first summand, a difference between the input data and the first summand is determined. The difference is then provided as next input data and the bits computation process and the summands determination process are performed for calculation of a next summand. The same processes are again repeated till the difference between next input data and the summand becomes zero. The one or more summands thus determined may then be added to convert the input data to DBNS representation to provide a DBNS converted input data.
In order to determine the remaining of the one or more summands, the summands
determination module 116 subtracts the 2-integer 'z' from the input data to evaluate a difference,
interchangeably referred to as an integer 'k'. If the value of integer 'k' is greater than zero, then
'k' is assigned as the next input data and saved in the bits computation data 122. In addition, the
input data is saved as original input data in the summands data 124. The bits computation
module 114 then performs the bits computation process for the integer 'k' to determine a new
value of bits data and in turn the tmax for representing the integer 'k' in the form of 2a23b2, where
value of a2 and b2 lies between 0 and the new value of tmax. The value of tmax is then provided to
the summands determination module 116 for determining the next summand that is a 2-integer
'z' nearest to the next input data, i.e., the integer 'k'. The summands determination module 116
determines the 2-integer 'z' nearest to the next input data using the summands determination
process as described above. The value of the 2-integer 'z' thus determined becomes the next
summand used for representing the number 'n' in the form of Σ2a3b. The bits computation
process and the summands determination process may be repeated till value of the entire one or
more summands is determined. In one implementation, the summands are determined till a next
difference, i.e., difference between the next summand and the new difference becomes zero, i.e.,
the one or more summands are ascertained for a non-zero value of the next difference.
In one implementation, before calculating the next summand, the summands
determination module 116 determines whether a previous summand is larger than the next input data provided to the system 102. If the previous summand is less than the next input data, then

magnitude data of the next summand to be determined is assigned to be '+1'. Magnitude data may be defined as the magnitude, i.e., sign of any summand used for converting the input data to DBNS representation. If the previous summand is ascertained to be greater than the next input data, then magnitude data of the next summand to be determined is assigned to be '-1'. Thus, when a magnitude data of a summand is '+1, the summand will be added to the sum 'S' whereas if the magnitude data of a summand is '-1', the summand will be subtracted from the sum 'S'. In one implementation, the processor 104 may include a sign shifter for assigning the magnitude data. For instance, while computing the next summand after the first summand, the summands determination module 116 determine if the first summand is larger than the input data and based on the determination ascertains the magnitude data of the next summand. Similarly, when computing a subsequent next summand, the summands determination module 116 determine if the next summand is larger than the next input data and based on the determination ascertains the magnitude data of the subsequent next summand. Thus, magnitude data of the one or more summands are determined.
In the above referenced example, for number 38, the summands determination
module 116 subtracts the number 36 from 38 to determine an integer 'k' = 2. Since 2 is greater
than 0, therefore k is assigned as the next input data and provided to the bits computation module
114. The bits computation module 114 then performs the bits computation process for the integer
'k' to determine a new value of bits data, which in present case is 2. The value of tmax is then
ascertained to be 1 and saved in the bits computation data 122. Base on the value of tmax the
summands determination module 116 determines the largest 2-integer 'z' nearest to the next
input data, i.e., the integer 2 to be 213° using the summands determination process as described
above, The value of the 2-integer 'z'. i.e., 2'13° thus determined becomes the next summand used
for representing the number '38' in the form of Σ 2a3b. The 2-integer 'z', i.e., the next summand
is then saved in the summands data 124. Since after calculating the next summand 213°, the
differences between the 2-integer 'z' was calculated to be 0, the summands calculation process
will not be further repeated.
The summands determination module 116 then computes the value of sum 'S' by
adding the one or more summands of the summand set thus determined. The sum 'S' thus forms, a converted input data, i.e., the DBNS representation of the input data in the form of Σ 2a3b such

that value of each of the exponents 'a' and 'b' lies between 0 and tmax- For instance, in the above example, for the input data 38, the DBNS converted number would 2232 +213°.
Once the DBNS representation of the input data is obtained, the computation
module 118, computes various arithmetic operations required for implementing the real-time applications. For example, the converted input data may be used to compute the ECC scalar multiplication required for generating digital signatures. For generating a digital signature for a person typically input data such as a private key assigned to the person is multiplied with other input data such as identity information associated with the person. Thus, when DBNS representations for both the input data, i.e., the private key and the identity information is obtained, the computation module 118 performs various arithmetic operations, such as multiplication, division, subtraction, addition, and like using the private key and the identity information to obtain the digital signature. The digital signatures, thus obtained may be stored in the computation data 126. Similarly, for the filter bank designs in mobile handsets and other tiny devices such as hearing aids, the converted input data may be used to perform various operations, such as transmit, receive, generate, and modulate discrete time signals. In another example, for performing data compression, the converted input data may be used for encoding and decoding of the data to be compressed.
In one implementation, the computation module 118 or the processor 104 may
include various components such as adders, sign shifters, and like for computing the arithmetic operations. For instance, to compute the result of multiplication of the private key, say, 2a3b and the identity information 2c3d , the computation module 118 simply needs to add 'a; to 'c' and 'b' to 'd' to give the result of multiplication as 2a+c3b+d. The computed value 2a+c3b+d is thus saved in the computation data 126 and can be used for further processing by the system 102. Using the input data in the form of DBNS representation helps in reducing the complexity involved in computing the arithmetic operations, as the processors now need to compute the arithmetic operations using less number of bits. Using DBNS thus helps in reducing the complexity and time period required for computing the arithmetic operations.
The system 102 thus converts the input data from its standard representation to
DBNS in an efficient way. In one implementation, the input data is converted such that the DBNS representation is in decreasing order of exponents. Referring to the above example, for

number 38, the value of exponents for the second summand is less than the value of the exponents for the first summand. Further, computational complexity for converting input data, a positive integer 'n', to DBNS representation using the system 102 is at most O (log n/ log (log n)). Additionally, converting the input data from the standard representation to the DBNS representation also reduces the memory size and resources required to convert and store the number as compared to the memory and resources utilized by the other number systems, such as the SBNS as the input data is stored using only two bits corresponding to the values of the exponents 'a' and 'b'. Reducing the overall memory space, resources, in turn reduces power utilized by the system 102 for processing data, such as the input data.
Fig. 2 illustrates a method 200 for processing data, in accordance with an
implementation of the present subject matter. In one embodiment, the method 200 is a DBNS conversion method implemented for converting input data from a standard representation to a DBNS representation before being processed for real-time applications. The method 200 may be described in the general context of computer executable instructions. Generally, computer executable instructions can include routines, programs, objects, components, data structures, procedures, modules, functions, and the like that perform particular functions or implement particular abstract data types. The method may also be practiced in a distributed computing environment where functions are performed by remote processing devices that are linked through a communication network. In a distributed computing environment, computer executable instructions may be located in both local and remote computer storage media, including memory storage devices.
The order in which the method is described is not intended to be construed as a
limitation, and any number of the described method blocks can be combined in any order to Implement the method, or an alternate method. Additionally, individual blocks may be deleted from the method without departing from the spirit and scope of the subject matter described herein. Furthermore, the method is not restricted to the present system 102 and can be implemented in any suitable hardware, software, firmware, or combination thereof.
At block 202, a bits computation process is performed on input data to compute
bits data. In one implementation, the input data is received by a data processing system, such as the system 102. The input data may be data required in various real-time applications, such as

data security, digital signal processing (DSP), and data compression. For example, for ECC scalar multiplication, the input data may be a private key, a public key, or identity information represented in form of numbers. Similarly, for applications in DSP, such as for the filter bank design in mobile handsets, the input data may be discrete time signals represented by a sequence of numbers or symbols. The system 102, for example, performs the bit computation process on the input data to compute the bits data, i.e.. the number of bits required to represent the input data in binary form. In order to obtain the bits data, a bits computation module such as the bits computation module 114 converts the input data from its standard form to a binary form and then counts the number of bits required for representation in the binary form. For example, where input data is number 34, bits computation module 114 converts the input data to its binary form (1000102) to obtain the bits data as 6. The bits data is then saved in the bits computation data 122.
At block 204, a maximum value attainable by exponents required to convert the
input data to DBNS representation is ascertained. In one implementation, the maximum value (tmax) is ascertained based on the bits data. For the purpose, the bits data is divided by 2 and the value thus obtained is ascertained to be the tmax. Further, if the bits data is an odd integer, then the value obtained by dividing the bits data is rounded off to an integer less then the obtained value. In the above example, the value of tmax is thus ascertained to be 6/2, i.e., 3. On the other hand, if the value of bits data is 5, then the value of tmBX would be 5/2, i.e., 2.5 rounded off to an integer less then the obtained value, i.e., 2 therefore, the value tmax for bits data 5 will be ascertained to be 2. In one implementation, the value of tmax is ascertained by the bits computation module 114. The value of tmax may then be saved in the bits computation data 122.
At block 206, the at least one summand of the form 2a3b is determined based on
he ascertaining. In one implementation, a summands determination process is performed to determine the at least one summand, where the at least one summand is a 2-integer nearest to the input data. According to the summands determination process, initially the value of tmax is assigned to the exponents 'a' and 'b' and the value of 'z' is computed as a product of 2tma* and 3tmax, i.e., 2tmax X 3tmax The value of 'z' is then compared with the input data. If the value of 'z' is greater than the input data, then the value of either 'a' or 'b; is decreased by 1 to get the largest integer less than or equal to 'n'. The above stated process is repeated till the 2-integer 'z' nearest to the input data is determined. In one implementation, the first summand is a largest 2-integer

less than or equal to the input data. Further, only one summand is determined at a time for the input data. Upon determination of one summand. a difference between the input data and the summand is determined. The difference is then provided as a next input data and the bits computation process and the summands determination process are performed for calculation of a next summand. The same processes are again repeated till the difference between the next input data and the next summand becomes zero. A summand set having one or more summands is thus determined,
For instance, in the above referred example for the number 34, to determine the
largest 2-integer nearest to 38, value of 'a' and 'b' is determined to be between 0 and tmax, i.e., 3.
Initially, the value of z is determined with a = b = tmax = 3, which is 23 X33, i.e., 216 and which is
greater than 38. Then the value of 2 X3 , 2 X3 , 2 X3 and so on is determined till the largest 2-
integer nearest 34 is determined. In the present example, the largest 2-integer 'z' nearest to 34 is
determined to be 2 3 , i.e., 27. Thus, for the input data 38 the first summand is determined to be
2 3 and saved in the summands set is stored in the summands data 124. In one implementation,
the first summand is a largest 2-integer less than or equal to the input data. The difference
between 34 and 27, i.e., 7 now becomes the next input number and the bits computation process
and the summands determination process, i.e., blocks 202 to 206 will now be repeated with the
next input data 7. The summands for 34 will thus be determined to be 2°32, 2°3', 2°3'„ and 2°3°.
Further, for all next summands calculated after the first summand, the value of magnitude data is
determined based on the difference between the next summand and the next input data. As
previously described, when a magnitude data of a summand is '+1', the summand will be added
to the sum 'S' whereas if the magnitude data of a summand is '-1', the summand will be
subtracted from the sum 'S'
At block 208, the input data is converted to DBNS representation based on the at
least one summand to obtain DBNS converted input data. In one implementation, one or more summands determined at the block 206 are added together to obtain the DBNS converted input data. In the above stated example, the summands determination module 1 ] 6 adds the summands 2132, 2'32, and 2130 to convert 34 to DBNS representation of: 2132 + 2132 - 2130.
Although embodiments of a data processing system have been described in
language specific to structural features and/or methods, it is to be understood that the invention is

not necessarily limited to the specific features or methods described. Rather, the specific features and methods are disclosed as exemplary implementations for the data processing system.

1/We claim:
1. A method for reducing memory usage comprising:
performing bits computation process on input data, by a processor, to compute bits data, wherein the bits data represents number of bits used for representing the input data in a binary form;
ascertaining, based on the bits data stored in a memory, a maximum value attainable by exponents of at least one summand required to convert the input data to a double-base number system (DBNS) representation;
determining, by the processor, the at least one summand based on the ascertaining, wherein the at least one summand is a 2-integer nearest to the input data; and
converting the input data to the DBNS representation based, in part, on the at least one summand, stored in the memory, to obtain DBNS converted input data, wherein the DBNS converted input data is stored on the memory for being processed by the processor.
2. The method as claimed in claim J, wherein the performing bits computation process comprises determining number of bits used for representing the input data in the binary .
3. The method as claimed in claim I, wherein the ascertaining comprises dividing the bits data by 2 to obtain the maximum value attainable by the exponents of the at least one summand.
4. The method as claimed in claim 1, wherein the determining comprises:
assigning the maximum value to exponents of a 2-integer 'z' to compute a value of the 2-integer 'z';
comparing the value of 'z' with the input data to evaluate if the 2-integer 'z' is nearest to the input data; and
assigning, based on the comparison, the 2-integer 'z' as the at least one summand.
5. The method as claimed in claim 1, wherein the determining further comprises:
determining, by the processor, a first summand based on the maximum value, wherein the first summand is a largest 2-integer less than or equal to the input data;
evaluating, by the processor, a difference between the first summand and the input data;
storing, based on the evaluating, the difference as a next input data in the memory;

identifying, as a next summand, a 2-integer nearest to the next input data, wherein value of exponents of the next summand is less than a secondary maximum value obtained by performing the bits computation process on the next input data;
obtaining a next difference between the next summand and the next input data; and ascertaining, by the processor, one or more summands for a non-zero value of the next difference.
6. The method as claimed in claim 1, further comprises computing arithmetic operations using the DBNS converted number.
7. The method as claimed in any one of the preceding claims, wherein the method may be implemented for processing input data in real-time applications selected from at least one of a data security, digital signal processing (DSP), and data compression application,
8. A data processing system (102) comprising:
a processor (104); and
a memory (108) coupled to the processor (104), the memory (108) comprising:
a bits computation module (114) configured to obtain a maximum value attainable by exponents of a first summand to convert input data to a double-base number system (DBNS) representation; and
a summands determination module (116) configured to.
determine the first summand based on the maximum value, wherein the first summand is a largest 2-integer less than or equal to the input data; evaluate a difference between the first summand and the input data; store, based on the evaluation, the difference as a next input data; identify, as a next summand, a 2-integer nearest to the next input data, wherein value of exponents of the next summand is less than a secondary maximum value obtained by performing a bits computation process on the next input data;
obtain a next difference between the next summand and the next input data; and
ascertain one or more summands for a non-zero value of the next difference.

9. The data processing system (102) as claimed in claim 8, wherein the summands determination module (116) is further configured to convert the input data to the DBNS representation based, in part, on the first summand, the next summand, and the one or more summands to obtain DBNS converted input data, wherein the DBNS converted input data is stored on a memory (108) for being processed by the processor (104).
10. The data processing system (102) as claimed in claim 8, wherein the bits computation module (114) is further configured to compute bits data for ascertaining the maximum value attainable by exponents of the first summand, wherein the bits data represents the number of bits used for representing the input data in a binary form.
11. The data processing system (102) as claimed in claim 8, wherein the bits computation module (114) is further configured to compute bits data for ascertaining the secondary maximum value attainable by exponents of the next summand and the one or more summands, wherein the bits data represents the number of bits used for representing the next input data in the binary form.
12. The data processing system (102) as claimed in claim 8, further comprises a computation module (118) configured to compute arithmetic operations based on the DBNS converted input data.
13. The data processing system (102) as claimed in claim 8, wherein the summands determination module (116) is further configured to:
assign the maximum value to exponents of a 2-integer 'z' to compute the value of the 2-integer 'z;
compare the value of 'z' with the input data to evaluate if the 2-integer 'z' is the largest 2-integer less than or equal to the input data; and
assign based on the comparison, the 2-integer 'z' as the first summand. '14. The data processing system (102) as claimed in claim 8, wherein the summands determination module (116) is further configured to:
compare the next summand with the next input data;
analyzing based on the comparison if the next summand is greater than or less than the next input data; and
ascertaining, based on the analyzing, magnitude data corresponding to a subsequent next summand from among the one or more summands.

15. The data processing system (102) as claimed in claim 8, wherein the data processing system (102) is implemented as at least one of a cryptography system, a data compression system, a mobile phone, a hearing aid, and an Elliptic Curve Cryptography (ECC) scalar multiplication system.
16. A computer-readable medium having embodied thereon a computer program for executing a method comprising:
performing bits computation process on input data, by a processor, to obtain a maximum value attainable by exponents of a first summand required to convert the input data to a double-base number system (DBNS) representation;
determining, by the processor, the first summand based on the maximum value, wherein the first summand is a 2-integer nearest to the input data;
storing the first summand in a summand set, wherein the summand set includes at least one summand;
evaluating, by the processor, a difference between the first summand and the input data;
providing based on the evaluating, the difference as a next input data;
identifying., as a next summand, a 2-integer nearest to the next input data, wherein value of exponents of the next summand is less than a secondary maximum value obtained by performing the bits computation process on the next input data;
saving the next summand in the summand set;
obtaining a next difference between the next summand and the next input data; and
assigning the next difference as the next input data till the next difference is nonzero.
17. The computer readable medium as claimed in claim 16, further comprises converting the input data to DBNS representation based, in part, on the summand set, stored in a memory, to obtain DBNS converted input data, wherein the DBNS converted input data is stored on the memory for being processed by the processor.
18. The computer readable medium as claimed in claim 16, wherein the determining comprises:
assigning the maximum value to exponents of a 2-integer 'z: to compute the value of the 2-integer '2;

comparing the value of z' with the input data to evaluate if the 2-integer V is the largest 2-integer Jess than or equal to the input data; and
assigning, based on the comparison, the 2-integer 'z' as the first summand.