EFFICIENT SCHEME FOR AUTOMATIC GAIN CONTROL IN COMMUNICATION SYSTEMS BACKGROUND Technical Field [0001] The embodiments herein generally relate to electric circuits, and, more particularly, to electrical circuits for gain control by RF tuner stages in a receiver. Description of the Related Art [0002] In a wireless communication environment, a tuner is provided in receivers such as radios and televisions to tune in to a channel selected by a user. The tuner typically includes a mixer that mixes a received Radio Frequency (RF) signal with locally generated carriers to produce a predetermined Intermediate Frequency (IF) signal. Conventional tuners provide controllable options for adjusting gain at RF and IF stages. This flexibility is provided to ensure that the IF signal at the input of the data converters of the demodulator are maintained within a specified dynamic range irrespective of an input signal dynamic range, thus ensuring optimum performance. [0003] Typically, gain at an IF or an RF stage is controlled either by applying a constant voltage on an external pin or by changing the value of a programmable gain register. Depending upon the performance required, receiving system either applies a constant voltage to a RF gain control circuit or dynamically changes a RF gain control voltage by using external circuitry. Both methods have a direct impact on the performance of the tuner as well as system cost. Although applying a constant voltage to a RF gain control circuit requires no external component and the system cost is low, the control voltage is set for a worst input case. The second approach of dynamically changing the RF gain control voltage through an external circuitry controls the RF gain depending upon the input signal scenario. Demodulators employing this method typically use an external additional RF Signal Strength Indicator (RSSI) circuit to control RF gain. This requires a wide band ADC and energy measuring circuitry and thus increases the system cost. [0004] FIG. 1 illustrates a typical receiving system that includes a tuner block 102 and a demodulator block 104. The tuner block 102 down-converts the desired RF signal into a Standard IF or a Low IF or a Zero IF. The demodulator block 104 digitizes the Intermediate frequency (IF) signal and demodulates it using one or more digital signal processing algorithms. Optimal integration of the tuner block 102 and the demodulator block 104 improves the system performance. The demodulator block 104 performs optimally when inputs to the digitizer or data converters are maintained at the optimal level. This requires a constant signal level at the output of the tuner block 102 irrespective of the input signal condition. [0005] FIG. 2 illustrates a typical tuner block 202 with a RF_VGA, an IF_VGA whose gains are controlled by a RFAGC block 204 and an IF_AGC block 206 respectively. The desired RF signal level at the tuner block 202 input varies over a wide dynamic range due to near-far field problems. The tuner block 202 uses multi stage programmable gain amplifiers (e.g., VGAs) to deliver relatively constant output signal amplitude irrespective of the input signal levels. The tuner block 202 provides an external pin or a programmable register to control the gain of a VGA. An optimal gain setting is required to deliver a relatively constant output signal level. [0006] FIG. 3 illustrates another typical tuner 302 with a RF_VGA and an IF_VGA that are controlled by a RFAGC block 304 and a IF_AGC block 306 respectively. A fixed voltage is fed as an input to the RFAGC block 304. This fixed control voltage is derived from analyzing a worst case input condition and a performance of the tuner 302. This method is also termed as a "Fixed RFAGC signal method" or a "Static Take-over-Point method". This arrangement does not require any external components and it reduces the cost. However, the tuner 302 will under perform for most of the input conditions as the gain control voltage value is obtained for a worst case condition. [0007] FIG. 4A illustrates a typical RF Signal Strength Indicator (RSSI) controlled tuner 402, having a RFAGC control circuit 404, an IF_AGC control circuit 406, and a filter 408. The RSSI indicator signal controls the RF gain. This method will keep the RFVGA gain at optimal level for all input condition. However the RSSI indicator uses expensive wide band ADC and RF energy measuring logic, which increases the system cost. [0008] FIG. 4B illustrates a typical receiver system with a demodulator 412, having a RF Strength Indicator (RSSI) 414 for optimal control of RF gain of tuner block in the demodulator 412. A RF input signal is fed to both a tuner 410 and the demodulator 412. The demodulator 412 digitizes the RF signal using a wideband ADC 416. An energy measurement circuitry determines the RF signal energy at the input of the tuner RFVGA. This value is used to optimally control the RF gain of the tuner. However, this system is still expensive due to the addition of energy management circuitry. [0009] FIG. 4C illustrates a typical receiver system with an optimal RF gain setting of a tuner 418 using a received signal metric. This system does not make use of expensive RSSI based RF gain control circuitry. A demodulator measures the received signal metric in terms of signal to noise ratio (SNR) or bit error rate (BER) and computes the RF gain required to achieve optimal performance. However, this system takes more time to measure SNR or BER and compute the RF gain. Accordingly, there remains a need to provide an optimal gain control for a tuner without increasing the cost of the system or increasing time for channel change. SUMMARY [0010] In view of foregoing embodiments herein is provided a system for controlling an RF gain of a receiver without using any external components that reduces a time taken to maintain an input signal level at an optimum dynamic range. The system includes a tuner that receives a Radio Frequency (RF) signal and down-converts the RF signal to an intermediate frequency (IF) signal, and a demodulator. The tuner further includes a radio frequency programmable gain amplifier (RFVGA), a filter that rejects out-of-band signals from the IF signal to obtain a filtered IF signal, and an intermediate frequency programmable gain amplifier (IFVGA). The demodulator includes an analog to digital converter (ADC) and an Automatic Gain Control (AGC) unit. [0011] The ADC (i) converts the filtered IF signal to a digital signal and (ii) samples the digital signal under oversampling conditions to obtain an oversampled signal that includes an in-band signal and the out-of-band signal. The AGC unit (i) receives the digital signal and an IF gain of the IFVGA. The AGC unit (ii) controls the RF_VGA and the IFVGA, and (iii) measures a RF energy for the RF signal based on the IFVGA gain. The IFVGA gain (g) may be computed in accordance with an equation: g = f(v), where f(v) is a higher order polynomial function of a control voltage. [0012] The RF energy may be computed by a summation of an energy of the in-band signal (Eib) and an energy of the out-of-band signal (Eob). The energy of the out-of-band may be computed in accordance with an equation: Eob = (Edif- Eib) / (