The invention relates to the field of electronic cards, in particular in the field of aeronautics and space, and more precisely the mounting surface mount components on printed circuits.

BACKGROUND

In a manner known per se, an electronic card may comprise surface-mounted components (CMS), that is to say, the electronic components soldered directly to the surface of the printed circuit of an electronic card.

Usually the CMS are brazed or reflow surface

( "Reflow soldering" in English) or wave ( "solder wave" in English).

In the case of reflow soldering, the printed circuit bare is first screen-printed covering the conductive layers of the printed circuit (usually copper) with a solder paste using a printing screen (or stencil) so that only the locations for receiving the terminations of the components are covered by the solder paste. The solder paste comprises, in known manner, a metallic alloy slurry in a brazing flux. Then the termini of the components (SMD) are placed on the solder paste before undergoing a thermal reflow treatment, during which heat is recast alloy and evaporate the flux of solder to form solder joints from of the metal alloy present in the solder paste.

The reliability and service life of solder joints which attach the CMS to the printed circuit, depends on the vertical height (usually designated by the term "standoff") between the top face of the brazing range of copper and the point bottom conductive terminations CMS once brazed. The standoff height corresponds to the alloy interface between the CMS and the copper layer. Indeed, in use, the CMS and the surface on which it is soldered expand differently, causing relative movements particularly in the surface plane (X, Y). Thus, over the standoff, the greater the brazed joint is flexible and therefore robust.

However, increasing the standoff is limited by conventional connecting means provided in production and by the variety of geometries of components Tin solder surface.

It was therefore proposed to increase the amount of solder paste applied to the layers of the PCB. For this, the size (width) of the apertures in the printing screen may for example be increased, so that during the reflow step, the height of the solder joint is increased by effect of coalescence: thickness the brazed joint is greater than the alloy of equivalent thickness obtained after reflow with smaller apertures in the printing screen, since the metal alloy can be spread beyond the layers of the printed circuit by effect wettability in its liquid phase (liquidus) during soldering. This method actually increases the standoff.

Par ailleurs, tous les composants d'une même carte électronique sont soumis à des paramètres de process communs, et notamment l'épaisseur du pochoir et le circuit imprimé de la carte. En effet, la hauteur de crème à braser déposée sur le circuit imprimé en vue de braser plusieurs CMS est sensiblement la même pour chaque CMS, puisque celle-ci est déposée par sérigraphie à l'aide d'un écran. De plus, le dépôt de la crème à braser par sérigraphie limite la densité d'implantation des composants électroniques sur le circuit imprimé et/ou le type de composant pouvant être utilisé, notamment dans le cas des composants à pas fin ou dans le cas des gros composants. Plus précisément, la taille des fenêtres de l'écran de sérigraphie est limitée par la condition suivante pour que l'écran puisse être démoulé sans endommager la crème à braser qui a été déposée : le rapport entre la surface de la fenêtre (dans le plan de l'écran, qui est parallèle au plan (X, Y)) et la surface des parois internes de la fenêtre (qui s'étendent perpendiculairement au plan de l'écran) doit être supérieur ou égal à 0.66. Pour respecter un tel rapport, lorsque le composant a un pas fin, il est donc nécessaire de réduire l'épaisseur de l'écran, ce qui implique nécessairement de diminuer la hauteur de crème à braser appliquée sur la face de connexion et/ou d'augmenter la surface de la fenêtre. A contrario, lorsque le composant est volumineux ou comprend terminaisons du type « pattes de mouette », pattes en J ou pattes en C, il est nécessaire d'augmenter la quantité de crème à braser dans l'orifice et donc de privilégier un pochoir ayant une épaisseur élevée. L'implantation à la fois de CMS à pas fin et de CMS de gros volume nécessite donc à la fois un pochoir de faible épaisseur et un pochoir d'épaisseur élevée.

Of course, there are screens having a variable thickness to locally increase the height of the openings of the screen, and therefore the amount of solder paste deposited. However, these often involve varying thicknesses screen printing problems for adjacent CMS (cream solder height in adjacent holes unsatisfactory) and makes it difficult to optimize the implementation of CMS in the electronic card. In addition, the minimum and maximum thicknesses of the screen that can be considered, while ensuring a sufficient filling of the openings are still insufficient to ensure both a sufficient lifetime for components of large volume and the possibility of solder components fine pitch on the electronic board.

SUMMARY OF THE INVENTION

An object of the invention is therefore to propose a new component mounting process surface-mounted on a printed circuit board which allows to increase the density of components, to increase their lifespan, increase the diversity of electronic components making possible the assembly without constraint of various components, be it fine pitch components, large sizes, with legs gull wings, etc., this new method is further simple to perform and moderate cost of whatever component packing density on the PCB and / or the type of component without impacting the performance of assembling the electronic board.

For this, the invention provides a method of manufacturing an electronic card, said electronic card comprises a multilayer printed circuit, said printed circuit comprising at least four conductive layers separated in pairs by insulating layers, including:

- a first and a second conductive layer of skin affixed to a first and a second insulating layer, respectively, the first conductive skin layer being substantially planar and defining a plane normal to a Z-axis,

- a first and a second internal conductive layer extending between the first and the second insulating layer, respectively, and separated by a third insulating layer, at least the first inner conductive layer being processed to form at least a range of brazing,

the manufacturing method being characterized in that it comprises the following steps:

- forming a first cavity in the first conductive layer of skin and the first insulating layer, opposite the brazing range of the first inner conductive layer, so that at least a portion of the solder pad is disclosed,

- filling the first cavity with a metal alloy together with a brazing flux,

- placing a first electronic component opposite the first cavity,

- applying a heat treatment to the printed circuit on which is placed the first component to transform the brazing metal alloy the accompanied flow solder joint so as to secure the first component to the printed circuit.

Some preferred features but not limitative of the manufacturing process described above are the following, taken individually or in combination:

- the first cavity is formed using at least one of the following techniques: photolithography on the surface, laser drilling, mechanical drilling, mechanical cutting.

- the method further comprises a step of metallization of the first cavity in order to deposit a metal layer in the first cavity.

- the method further comprises an additional step wherein a portion of the metal layer of the first cavity is removed prior to the step of filling the first cavity.

- partial removal of the metal layer is carried out by laser or mechanical cutting or by mechanical drilling.

- the first inner conductive layer comprises an additional soldering track and the manufacturing method further comprises the following additional steps, prior to the heat treatment step of: forming a second cavity in the first insulating layer, facing the range of additional brazing, whereby at least a further part of the additional brazing range being revealed; filling the second cavity with the accompanied metal alloy of a brazing flux; and placing a second electronic component facing the second cavity, the steps of filling the first and second cavities and placement of the components being carried out substantially simultaneously.

- the method further comprises a step of etching the first conductive layer of skin.

- the first cavity is filled in accordance with one at least of the following filling techniques: printing with screen printing stencil, screen printing without printing screen, inkjet printing, passing through a turbulent wave, by dipping or passing through d a hot metal alloy reflow, wave soldering, manual soldering.

- the second inner conductive layer is processed so as to form at least a brazing range, the manufacturing method further comprising the steps, prior to the heat treatment step of: forming a third cavity in the first insulating layer and the third insulating layer, opposite the brazing range of the second inner conductive layer, so that at least a portion of the brazing range of the second inner conductive layer is revealed; filling the third cavity with the metal alloy along with a brazing flux; and placing a third additional electronic component opposite the third cavity.

- the second inner conductive layer is processed so as to form at least a brazing range, the manufacturing method further comprising the steps, prior to the heat treatment step of: forming a fourth recess in the second conductive layer skin and in the second insulating layer opposite the brazing range of the second inner conductive layer, so that at least a portion of the brazing range of the second inner conductive layer is revealed; the fourth cavity fill with the metal alloy along with a brazing flux; and placing a fourth electronic component opposite the fourth cavity.

- the method further comprises, prior to the heat treatment step, a step during which an additional layer comprising an electrically insulating material is applied on the first conductive layer of skin, the first cavity being formed in part in said layer additional.

- the electrically insulating material of the additional layer has a first coefficient of thermal expansion along the axis Z, the metal alloy has a second coefficient of thermal expansion along the Z axis, and wherein the first coefficient of thermal expansion is more larger than the second coefficient of thermal expansion.

- a surface of the first cavity in the plane is at least equal to 0.04 mm 2 .

According to a second aspect, the invention also provides an electronic card comprising a multilayer printed circuit, said printed circuit comprising at least four conductive layers separated in pairs by insulating layers, including:

- a first and a second conductive layer of skin affixed to a first and a second insulating layer, respectively, the first conductive layer being substantially planar and defining a plane normal to a Z-axis,

- a first and a second internal conductive layers extending between the first and the second insulating layer, respectively, and separated by a third insulating layer, at least the first inner conductive layer being processed to form at least a range of brazing,

- a first cavity formed in the first conductive layer of skin and the first insulating layer exposing said first cavity at least in part the brazing range, and

- a first surface mounted electronic component comprising at least one terminus, said first component being in contact or at a distance from the first conductive layer of skin, the termination of the first component being secured in the first cavity via a seal solder.

Some preferred but not limiting features of the electronic card described above are the following, individually or in combination:

- the first cavity comprises a metal plating layer. - the first cavity is partially covered with a metal plating layer.

- the electronic card further comprises a solder mask applied to the first conductive layer and on top of the insulating layer at least partially revealed and / or a metallic finish applied to the first conductive layer of skin and areas of the first conductive layer internal which form the first cavity.

- the first component comprises an additional termination, said termination being attached to the first conductive layer of skin by means of a solder joint.

- the second inner conductive layer is processed so as to form at least a brazing range, the circuit board further comprising: a second cavity formed in the first insulating layer and the third insulating layer opposite the second conductive layer internally, and a second surface mounted electronic component comprising at least one terminus, said second component being in contact or at a distance from the first conductive layer of skin, the termination of the second component being fixed in the second cavity by means of a solder joint.

- the first component further comprises an additional terminal, the second inner conductive layer is processed so as to form at least one solder pad and the electronic card further comprises an additional cavity formed in the first insulating layer and the third layer insulating, opposite the brazing range of the second inner conductive layer, the additional terminal of the component being secured to said solder range in the additional cavity via a solder joint.

- the second inner conductive layer is processed so as to form at least a brazing range, the circuit board further comprising: a fourth cavity formed in the second conductive layer of skin and in the second insulating layer opposite the second internal conductive layer, and a fourth electronic component mounted surface comprising at least one terminus, said fourth component being in contact or at a distance from the second conductive layer of skin, the termination of the fourth component being fixed in the fourth cavity through a solder joint.

- a surface of the first cavity in the plane is at least equal to 0.04 mm 2 .

BRIEF DESCRIPTION OF DRAWINGS

Other features, objects and advantages of the invention appear better on reading the detailed description that follows, and the accompanying drawings given as non-limiting examples and in which:

Figures 1 to 11 illustrate steps of an exemplary embodiment of a mounting process according to the invention.

2a to 2c are views in partial section of three examples of electronic card implementation comprising partially or completely metallized cavities in which is brazed a sample component,

Figure 3a is a sectional view of another example embodiment of partial metallization of cavities at different depths, while Figure 3b is a view of two embodiments of the left cavity of the example of Figure 3a before filling,

4a is a sectional view of another example embodiment of partial metallization of cavities at different depths, while Figure 4b is a top view of the cavity of the example of Figure 4a before filling,

Figures 5 to 8 are examples of electronic cards according to the invention, and

Figure 9 is a flowchart illustrating an example of steps for manufacturing an electronic card according to an embodiment of the invention.

DETAILED DESCRIPTION OF AN EMBODIMENT

An electronic card 1 comprises a printed circuit having two conductive layers separated by insulating layers 10, 1 1, 12, on which are fixed electronic components mounted on the surface (hereinafter CMS 3).

Generally, a printed circuit 2 may be of the monolayer type (also known as single layer) and comprise only a single conductive layer, double layer (also called two-sided) and include a conductive layer on either side of an insulating layer or multilayer, and comprise at least four conductive layers.

The present invention is of particular interest when the PCB 2 is a multilayer and comprises at least four conductive layers, separated in pairs by insulating layers 10, with 1 1 12. In the following, the invention will more particularly be described in the case of a printed circuit 2 comprising exactly four conductive layers, including:

- a first and a second skin of conductive layers (hereinafter layer C and layer C2, respectively) fixed on a first and a second insulating layer 10 to 1 1, respectively,

- a first and a second internal conductive layers (hereinafter layer C3 and layer C 4 , respectively) extending between the first and the second insulating layer 10 to 1 1, respectively, and separated by a third insulating layer 12.

However this is not limitative in so far as, as we shall see later, the invention also applies in the case where the printed circuit board 2 comprises a larger number of inner conductive layers (e.g., layers C5 and Ce) separated in pairs by insulating layers 10, with 1 1 additional 12.

Ci layer is substantially planar and defines a plane (X, Y) normal to an axis Z. The layers Ci and C2 correspond to the layers of the circuit

Printed 2 located most outside of said circuit and sandwichent the insulating layers 10, January 1, 12 and the internal conductive layers C 3 and C 4 .

To increase the diversity of the electronic board 1 and improve the life of the components, the electronic card 1 can be manufactured in accordance with the following steps:

- S1 form a cavity 20 in the layer C (respectively, in the layer C2) and the first insulating layer 10 (respectively, in the second insulating layer-1 1), in front of a solder pad 4 of the layer C3 or layer C 4 , such that at least a portion of the solder strip 4 is revealed,

- S5 fill the cavity 20 with a metal alloy together with a brazing flux,

- placing a S6 8 of CMS termination 3 on the layer C (respectively, on the layer C2) opposite the cavity 20,

- applying to the printed circuit 2 S7 heat treatment on which is placed the CMS in order to transform the brazing flux accompanied metal alloy solder joint 5 so as to fix the SMD 3 to the circuit board 2.

A cavity surface, in the plane (X, Y), is at least equal to

0.04 mm 2 to achieve the desired lifetime for the CMS 3.

A depth p of the cavity 20 may for example be at least equal to 60 m. For example, for a cavity 20 having a depth p of 60 m, the life is increased by 50%. For a cavity 20 having a depth p of 120 m, the lifetime is increased by 100%.

As indicated above, the cavity 20 may be formed (step S1) so as to expose a solder pad 4 of the C3 layer or a solder pad 4 of the layer C 4 . Only the depth p of the cavity 20 and the number of insulating layers 10, January 1, 12 exchange crossings, the steps of the process S is not changed.

Moreover, the cavity 20 may be formed from the layer C or from the C2 layer. One or more cavities 20 may also be formed from both the layer C and from the C2 layer.

Finally, several cavities 20 can be formed in the printed circuit board 2. These cavities 20 can have different depths p and thus achieve a solder pad 4 of the C3 layer or the layer C 4 .

The number of cavities 20, the depth p (and therefore the inner conductive layer C 3 or C 4 reached) and -C 2 layer from which CMS cavities 20 are dependent on the type formed are 3 fixed on the circuit board 2, but also mixed and density to be achieved for the printed circuit board 2.

In the following, to simplify the description the invention will be more particularly described in the case where four cavities 20 are formed in the printed circuit 2, two cavities 20 since the layer C opposite two solder pads 4 of the C3 layer, and two cavities 20 from the C2 layer, opposite two solder pads 4 of the layer C 4 . This is however not limited to, as we have seen, a different number of cavities 20 may be formed in the printed circuit 2, since the layer C and / or from the layer C2, each of said cavities 20 can pass through a number of upper insulating layer or equal to one.

The order described above for the CMS placement of steps 3 and filling the cavity 20 is also not limiting. CMS 3 can be placed above the cavity 20 (step S6) before or after the latter is filled (step S5), according to the technique of filling selected. Indeed, the filling step S5 may be performed by filling the cavity 20 with a solder paste comprising a metal alloy in suspension in a brazing flux. In this case, the CMS 3 is placed on the solder paste (Step S6), above the cavity 20. Alternatively, the filling step S5 of the cavity 20 can be achieved by a contribution through of a molten alloy bath, in which case the CMS 3 is placed on a spot of adhesive on the layer C (step S6) before the passage of the printed circuit 2 in the bath

The solder strip 4 of the layer C3 can be obtained, in a known manner, by chemical treatment of the C3 layer, typically by etching. This chemical treatment step may in particular be implemented during manufacture of the printed circuit 2, prior to the stacking step of Ci and C2 conductive layers and insulating layers 10, January 1, 12 intended to form the printed circuit 2. for example, the multilayer circuit can be obtained according to the following substeps (see Figure 1 a):

- providing a printed circuit board 2 on both sides, that is to say comprising an insulating layer (destined to become the third insulating layer 12) and two conductive layers (destined to become the layers C3 and C 4 ) on and side of the insulating layer,

- etching at least one of the layers C3 and C 4 , preferably both, to form solder pads 4 in layers C3 and C 4 ,

- report and set another insulating layer on each layer C 3 and C 4 , said insulating layers being intended to be respectively the first and the second insulating layer 10, with 1 1 of multilayer circuit,

- report and fix a conductive layer on each of the insulating layers 1 1, an additional 12, said conductive layers being destined to become the layers Ci and C2, and

- compressing in temperature the assembly thus formed to obtain the multilayer printed 2 circuit. One then obtains the printed circuit 2 in Figure

1 b.

Alternatively, the multilayer circuit can be supplied directly

2.

Where appropriate, the layers Ci and C2 may also be etched, before or after compression substep temperature to form solder pads 4 and / or conductive tracks.

The insulating layers 10, January 1, 12 of the printed circuit 2 may include, in known manner, an epoxy resin and glass fibers. Ci conductive layers -C 4 for their part may be made of copper (or a copper-based alloy).

The cavities 20 may be formed by cutting the layer C and the first insulating layer 10. The cutting may be performed mechanically (using a mechanical milling type cutting tool or mechanical drilling or laser drilling). The realization by laser drilling can be achieved only from the moment when the surface (in the plane (X, Y)) to the bottom 21 of a cavity 20 is smaller than 4 copper brazing of the range so that the solder strip 4 extends beyond the bottom 21 of the cavity 20 to allow the stopping of the action of the CO2 laser in depth p of copper.

When the cavities 20 are formed by laser drilling, the laser may be of the laser type gas (carbon dioxide). The parameters selected for the laser may then be similar to those commonly used for the realization of laser vias.

The technique of laser drilling is used to form the cavities 20 with high accuracy. In particular, it is possible to position the cavities 20 with high accuracy and low dimensional tolerances. Typically, the dimensional tolerance is about 25 microns (for cavities 20 of minimum 100 m from the side) when the recesses 20 are made by laser drilling, as opposed to about 100 microns (for cavities 20 of at least 300 m side) when they are produced by cutting (mechanical or chemical).

Laser drilling thus permits an increase in the density of CMS 3 on the circuit board 2, since the size of the cavities 20 can be reduced (the minimum size of the cavity can be obtained by laser drilling is smaller).

Laser drilling thus permits an increase in the density of CMS 3 on the circuit board 2, since the distance between two recesses 20 can be reduced (the positioning and dimensional tolerances are smaller).

The shape of the cavities 20 is preferably cylindrical, particularly when obtained by laser drilling, by mechanical cutting or by mechanical drilling. The section in the plane (X, Y) of the cavities 20 may be any one, for example circular, rectangular, etc.

Where appropriate, one or more vias 6 can also be made in the printed circuit board 2 according to the conventional techniques.

Where appropriate, one or more lasers vias 6 'can also be made in the printed circuit board 2 according to conventional techniques (see in particular Figure 7).

In a first embodiment shown in Figure 1 d, the cavities 20 may be metallized (step S2) before S5 filling with a metal alloy together with a brazing flux. Metallization S2 has the effect of depositing a thin metal layer 13 (a thickness of a few microns) on the walls of each cavity 20.

The layers Ci and C2 and the solder pads 4 are generally made of copper, the metal layer 13 is deposited a copper layer whose thickness may be of the order of twenty microns.

The metallization of the cavities 20 can be performed by any conventional technique, for example by electrolysis. The copper layer 13 may comprise a first layer of copper known as "chemical" followed by depositing a second copper-called "electrolytic" and covers the bottom 21 of the cavities 20 (substantially corresponding to the solder pad 4) and the revealed surfaces of the first and the second insulating layer 10, 1 1 (which form the vertical walls 22 of the cavities 20).

In one embodiment, both layers Ci, C2 and the cavities 20 are metallized in this step. The layers Ci, C2, the solder pads 4 and the vertical walls 22 of the cavities 20 are covered with a copper layer 13, resulting from the deposition of a electroless copper followed by electrolytic copper plating.

S method can further comprise a step of etching the layer C (Figure 1 e). For this purpose, in known manner, a photosensitive film 14 is applied on the free face of the layers Ci and C2. The photosensitive film 14 is preferably a positive photoresist (the ultraviolet radiation results in breakage of macromolecules, resulting in increased solubility of the exposed areas in the developing solvent). The resin may in particular comprise an epoxy resin.

A mask 15 (or artwork) is then applied on the photosensitive film 14. The mask 15 has transparent regions and opaque regions to allow etching of the layer C and form, for example, conductive tracks 16 and / or collar 23 to the output of one or more cavities 20. in the example illustrated in Figure 1e, the PCB 15 includes, for example opaque areas at two cavities 20, the via 6 and two zones for forming conductive tracks 16.

Finally, the photosensitive film 14 is exposed to light radiation: in the case of a positive photoresist (typically epoxy resin), the portions of the film 14 present in the transparent areas will then respond to this light radiation and solubilize while that the parties present in the opaque areas will be protected. Alternatively, the PCB 15 is insolated by laser method (generally known by the English terminology Laser Direct Insolation LDI).

In all cases, the solubilized portions are then removed with a developing solvent, thereby partly uncovered layer Ci. Unsolubilized parts of the photosensitive film 14 remain above the two cavities 20, the via 6 and the two areas for forming the conductive tracks 16.

The areas not protected by the photosensitive film 14 can then be etched until complete disappearance of the copper, for example by electrolysis (Figure 1g).

This etching process S is known in itself, it will not be detailed further here.

Optionally, a portion of the metallization can be removed (step S3), so as to obtain one or more cavities 20 partially metallized (Figures 1 1 and k 1). This withdrawal S3 can be performed at all the cavities 20 formed in the layers Ci and C2, at only some of the cavities 20 formed in the layers Ci and C2, or even differently according to the cavities 20 formed in the layers Ci and C2, in order to adapt the metallization of each cavity 20 to the type of terminal 8 adapted to be secured in said recesses 20. the partial withdrawal can also involve layers Ci and C2, in whole or part, to form one or several flanges 23 (complete or partial).

This removal can be achieved in particular by laser, to pierce the electroless copper layer. The partial withdrawal S3 may concern:

- all or part of the metal layer 13 deposited on the vertical walls 22 of one or more cavities 20 and / or

- all or part or all of the metal layer 13 deposited at the bottom 21 of one or more cavities 20 and / or

- all or part of the metal layer 13 deposited on the layers Ci and / or C2.

If necessary, the laser can be inclined with respect to vertical walls 22 of the cavity 20 in order to present a non-zero angle impactor to better remove the metallisation of the vertical walls 22.

For example, there is illustrated in Figure 2a is an example of a portion of an electronic card 1, wherein the cavity 20 has been metallized but where the metal layer 13 was not removed.

It was also shown in Figure 2b where the metal layer 13 has been removed over the entire vertical wall 22 of the cavities 20 and exit the cavities 20, but has been left to the bottom 21 of the cavity 20.

Figure 2c illustrates the case where the metal layer 13 has been removed over the entire vertical wall 22 of the cavities 20 but was left in the bottom 21 of the cavity 20 and out of the cavity 20, thereby forming two collars 23 in the Ci layer.

Figures 3a and 3b illustrate the case where the metal layer 13 was removed on the whole vertical wall 22 of the cavities 20 but was left in the bottom 21 of the cavity 20 and on a portion of the output of the cavities 20, thereby forming two half-collars 23 in the layer Ci.

Figures 4a and 4b show the case where the metal layer 13 has been removed on one half of the periphery of the vertical wall 22 of the cavities 20, on one half of the bottom 21 of the cavity 20 and on a portion of the output of the cavities 20 to form two half-collars 23 in the layer Ci.

It will be understood that step S3 of partial removal of the metal layer 13 may be performed before or after the step of etching the layer Ci.

Where appropriate, one or more non-metallized cavities 20 may also be formed in the layer C (step S4) after the step S2 metallization, by laser drilling of the layer C and the first insulating layer 10.

Alternatively, the non-metallized cavities 20 may be obtained, as mentioned above, by removing the copper layer of the cavity 20 already formed (during step S3).

Conventionally, a layer of sparing lacquer 17 can then be applied on the revealed surfaces of the first insulating layer 10 and, where appropriate, on the conductive tracks 16, without covering the parts requiring electrical contact with the outside (such the vertical walls 22 of the cavities 20, their possible flange 23 or a ground connection contact for example).

A finish 18 can also be deposited to protect the copper that is exposed and to maintain the ability of pads 4 to receive a solder joint 5. The finish 18 may comprise, in known manner, an organic finish (Organic Solder Preservative , OSP) or a metallic finish comprising at least one of the following alloys: nickel / immersion gold, nickel / gold electroplating, immersion tin, immersion silver. The thickness of the finish 18 may be of the order of a few microns and can be applied to all exposed copper surfaces.

Where appropriate, a finish 18 by hot air leveling (Hot Air Leveling, HAL) type alloy based on lead / tin or tin may be used.

The cavities 20 may be filled by screen printing a solder paste 24 comprising the metallic alloy slurry in the brazing flux.

For this purpose, in a first substep, a 7 by screen printing screen (or stencil) in which were formed two windows 9 (by a cavity 20 formed) is placed on the layer Ci. The screen 7 is positioned so that each window is located facing the corresponding cavity 20 to be filled.

Of course, the screen 7 may comprise a different number of windows 9 if a different number of recesses 20 must be completed.

The dimensions of the windows 9 are substantially equal to the dimensions of the cavity 20 associated to fulfill in order to optimize the filling of the cavity 20. Preferably the dimensional accuracy to achieve the windows 9 is of the order of thirty microns. The window 9 may be slightly larger than the cavity 20 associated to ensure good filling of the latter and increase the amount of solder paste 24 deposited.

In a second substep, the solder paste 24 is deposited on the screen 7 and then forced in the windows 9 and the recesses 20 using a squeegee (see Figure 1d). In a manner known per se, the scraper may comprise a metal sheet, which is inclined at an angle which may be between 45 ° and 60 ° to better drive the solder paste 24 in the cavity 20.

In a third substep, the screen 7 can be removed from the mold so as to allow the solder paste 24 into the cavities 20. Note that the thickness of the solder paste 24 deposited being greater than the the thickness of the layer and the first insulating layer 10, because of the presence of the screen 7 during filling.

A CMS 3 can then be placed on the layer C, so that each terminal 8 is located above a cavity (step S6), then the S7 heat treatment may be applied to the electronic card 1.

The three sub-steps described above for the filling of the cavities 20 by silkscreen are then repeated for the cavities 20 of the C2 layer.

In an alternative embodiment, the cavities 20 may be filled by screen printing a solder paste 24 without using screen 7. Indeed, the scraper can be moved directly on free face of the printed circuit 10: the layer C and the first insulating layer 10 (respectively, the C2 layer and the second insulating layer-1 1) are used in effect to screen 7. When the squeegee reaches a cavity 20, it then forces the solder paste 24 in the cavity 20 in a similar manner what is usually done with a screen 7.

In order to avoid the presence of solder paste 24 on top of the layers Ci and C2, it is preferable to use a squeegee 6 polymer. The few remaining alloy beads can then be removed by washing after the heat treatment step. After filling of the cavities 20, the layer C and the first insulating layer 10 (respectively, the C2 layer and the second insulating layer 1 1) are however not demolded. They will also support the CMS 3 and play a cream-keeping role solder 24 during heat treatment.

This embodiment without screen 7 thus reduces the manufacturing costs of the electronic board 1 to the extent that it is no longer necessary to produce a 7 screen printing screen and use of equipment requiring high accuracy (more screen 7 to be positioned face to face with the circuit board 2). The filling step S5 of the cavities 20 is further facilitated since it is no longer necessary to position with unspecified A screen 7 on the layers Ci and C2.

According to yet another variant, the cavities 20 may be filled

S5 by inkjet printing ( "jetting" in English) of the alloy metal accompanied flow soldering by passing through a turbulent wave of molten metal alloy along with the brazing flux by dipping or passing through d a hot metal alloy by reflow or wave soldering or by manual soldering.

The dimensions of the cavities 20 are chosen so that each cavity 20 reveals at least a brazing the beach portion 4 facing each other and that the lifetime of the termination 8 CMS 3 brazed in this cavity 20 is sufficient. For example, each cavity 20 may be dimensioned to cover and extend beyond the brazing range 4. The definition of the dimensions of each cavity 20 depends SMD component terminations 8 3 assembled. For example, for a 0603 size casing which comprises several terminals 8, the cavities 20 may have dimensions of the order of 0.5 mm * 1 mm; for case size 1206: 1 mm * 2 mm; for case size 2010, the cavities 20 may have dimensions of about 1 .5 mm *4.5 mm. For fine pitch type packages, the width of the cavities 20 may for example be of the order of 0.3 mm. The bottom surface 21 of each cavity 20 is larger than the surface that reveals the brazing range 4. This is however not restrictive, the cavities 20 may be dimensioned so as not to overflow from the beach brazing 4 they reveal.

Over the first insulating layer 10 and the layer C are thick, the greater the depth p of the cavities 20 and the greater the thickness of solder paste 24 inserted into the cavities 20 may be important. Indeed, in the case where the cavities 20 are filled with solder paste 24 by screen printing with a screen 7, the window size 9 of the screen 7 of screen printing is no longer limited by the ability to demold the screen 7 after filling of the cavity 20, since the layer C and the first insulating layer 10 remain on the soldering strip 4 and are not removed from the mold. Therefore, the cream solder 24 height introduced into each cavity 20 is equal to the sum of the depth p of the cavity 20 and the thickness of the screen 7, the thickness of the screen 7 can be small when'

More specifically, the size of a window 9 of a screen printing screen 7 is limited by the ratio between the surface of the window 9 (in the plane of the screen 7, which is parallel to the plane (X, Y)) and the surface of inner walls of the window 9 (which extend perpendicularly to the plane of the screen 7), which must be greater than or equal to 0.66. Until now it was necessary to reduce the thickness of the screen 7, which implied a reduction in the amount of solder paste 24 and therefore the standoff CMS 3 or increase the window surface 9, preventing implement 3 SMD fine pitch or limited CMS density implantable 3 on the circuit board 2.

The formation of the cavities 20 in the layer C and in the first insulating layer 10 thus moves the upper face of the solder strip 4 of the lowest point of the terminations 8 conductive CMS 3 once brazed thereby, so quite advantageous to lift this limitation since it becomes possible to drastically increase the height of cream solder 24 applied to the printed circuit 2, without changing the thickness of the screen printing screen 7. Where appropriate, it is even possible, during the production of the circuit board 2, to increase as much as necessary the thickness of the first insulating layer 10 and to achieve a window 9 having a surface adapted to the surface of the cavity 20

associated, its thickness being dictated by the above relation so that it remains greater than 0.66.

Thus, the invention overcomes difficulties of release 7 of the screen printing screen, when such a screen 7 is used and makes possible the implantation of CMS 3 fine pitch and / or a high density of CMS 3 on the circuit board 1. Typically, it may be envisaged to use a screen 7 having a thickness of about 50 m to 100 m with local thickness can be 100 m to 300 mm in case of need.

Is of course understood that the deletion of seven screen-printing screen, made possible by the formation of the cavity 20 in the layer C and in the first insulating layer 10, also allows to implant CMS 3 fine pitch on the circuit board 2 and / or to increase the density CMS 3 on the circuit board 2, since the filling process S of the cavities 20 do not require a demolding a screen 7.

Optionally, to increase the depth p of the cavity 20, the process S may further comprise a step of applying an additional layer 19 comprising an electrically insulating material on one and / or the other of layers Ci, C2, before the heat treatment of step S7 and if necessary after the step of etching the layer Ci. In the embodiment illustrated in Figure 5, the additional layer 19 is for example applied on the layer Ci.

The additional layer 19 may cover all or part of the underlying layer (Ci and / or C2). The cavities 20 are then formed partly in said additional layer 19. In other words, the upper portion 25 of the cavities 20 may be performed in the additional layer 19. If necessary, this upper portion 25 may have larger dimensions the rest of the cavity 20 associated.

The additional layer 19 may in particular comprise any electrically insulating material. Where appropriate, the material of the additional layer 19 may be thermally conductive. Moreover, according to the thermal environment and vibration and to further increase the lifetime of the printed circuit 2, the material of the additional layer 19 may be selected so as to have a thermal expansion coefficient greater than Z of the metal alloy.

Typically, the additional layer 19 may comprise at least one of the following materials: glass fiber, epoxy resin, polyimide, polyester, polymer, Teflon.

The additional layer 19 may be applied by any means on the layer C, before or after the formation of the cavities 20 in the layer C and in the first insulating layer 10.

In one embodiment, the additional layer 19 may be attached and fixed on the layer Ci and / or C2, for example by lamination or gluing with an adhesive layer. The adhesive layer may comprise any type of adhesive conventionally used in the field of printed circuit board material to join the layers together, typically an epoxy adhesive. The upper portion 25 of the cavities 20 can then be preformed in the additional layer 19 before it is placed on the layer C and / or C2, or after fixing.

For example, the upper portion 25 of the cavities 20 may be formed by cutting of the additional layer 19. The cutting of the upper portion 25 of the cavities 20 in the additional layer 19 being similar to that of the remaining cavities 20 (eg cutting such mechanical milling or mechanical drilling or laser drilling) in the insulating layers 10, with 1 1, it will not be described again here.

Where appropriate, the additional layer 19 may comprise a printed circuit 2, which may be attached and fixed on the layer C and / or C 2 by soldering or gluing. In one embodiment, the upper portion 25 of the cavities 20 are then made in the printed circuit board 2. The circuit board 2 forming the additional layer 19 can then extend over all or part the layer Ci. Alternatively, it may extend only locally, as CMS 3. This embodiment is particularly advantageous in the case where the CMS 3 includes tabs 8 gull wings, the assembly tends to break.

Note that when the additional layer 19 is placed on the layer C and / or C2 depends on the deposition technique of the additional layer 19 and formation of the cavities 20. For example, in the case where the cavities 20 are made by laser drilling, it is preferable to form the cavities 20 in the additional layer 19 before its deposition on the layer Ci and / or C2, to ensure the stop of the laser.

The addition of the additional layer 19 permits to increase the depth p of the cavities 20, thereby increasing the standoff CMS 3. This additional layer 19 is further advantageous when the thickness of the first insulating layer 10 is low and does not allow to form alone cavities 20 having a depth p sufficient to achieve the desired lifetime.

Where appropriate, the additional layer 19 may only be applied on a portion of the layer C, e.g. in some CMS 3 only, as illustrated in Figure 5. A stepped printing screen can then be used to fill cavities 20 underlying the additional layer 19 together with the other cavities 20.

The heat treatment step S5 may especially comprise remelting ( "reflow soldering" in English) of the metal alloy present in the solder paste 24. For this purpose, in a first substep of said temperature rise ( "ramp up" in English), the temperature is gradually increased. This step rise in temperature may, in known manner, be carried out following a slope between 1 ° C / s and 4 ° C / s to 100 ° C to 150 ° C (maximum 7 ° C / s , maximum temperature slope advocated by SMD components 3 before brazing).

During a second sub-step said preheating ( "preheat" in English) operates the flow drying operation ( "soak" gold "preflow" in English) and cleaning preparation terminations 8 brazing the printed circuit 2 and CMS 3, the temperature is increased gradually to about 170 ° C and maintained for at least one

minute and a half to several minutes (depending on the flow used) to allow the evaporation of the volatile parts of the brazing flux and the temperature homogeneity of all components prior to reflow phase.

During a third sub-step said reflow ( "reflow" in English), the temperature is again increased to reach a critical temperature, generally greater than 20 to 50 ° C above the melting temperature of the alloy of the metal alloy used. When the temperature passes through the melting point of the metal alloy contained in the solder paste 24 (or for example about 180 ° C when the metal alloy comprises a tin / lead 63/37, of the order of 217 ° C in the case of a metal alloy tin / silver / copper 95.6 / 3.0 / 0.5 and of the order of 221 ° C in the case of a metal alloy tin / silver 96.5 / 3.5), the base metal alloy 21. Note that at any time the

Preferably, the increase in temperature during the reflow step is fast and in any case quicker than the rise of temperature step in order to avoid that the CMS 3 does not suffer long elevated temperatures. Printed circuit 2 can also be maintained at critical temperature above the melting temperature of the alloy for a time which may be between twenty and ninety seconds, depending on the thermal mass of the components to be assembled. This time above the alloy melting temperature allows the creation of intermetallic that will maintain the components between the metallic alloy and the mating parts.

In a fourth substep, the printed circuit 2 is quickly cooled to room temperature. When the temperature rises through the melting point and becomes lower than the melting temperature of the metal alloy, it solidifies, thereby forming the solder joint 5. The first insulating layer 10 (extending between the first layer C and the layer C3) then guarantees a minimum standoff between the top face of the

brazing strip 4 and the low point of the terminations 8 of the conductive CMS 3 once brazed, which can not be less than the thickness of the first insulating layer 10. If necessary, when an additional insulating layer 19 is applied to the layer C, the minimum standoff is at least equal to the sum of the thickness of the first insulating layer 10 and the thickness of the additional layer 19.

Note that the brazing flux gradually evaporates during the temperature rise step (and preheating / drying), leaving only the metallic alloy of the brazing range 4. The brazed joint 5 therefore comprises the metal alloy.

The thermal reflow processing is well known in the technical field of soldering SMD 3, so it is not necessary to detail the further here. Moreover, temperatures, slopes and durations of the various stages of heat treatment are given by way of example and obviously depend on the solder paste 24 used. A skilled artisan will thus adapt easily according to the type of metal alloy and solder flux used.

As we can see, the S method of the invention allows the use of any type of solder paste 24, and in particular unleaded solder pastes, allowing comply with current standards and in particular the European RoHS Directive n 2002/95 / EC - banishment of lead, hexavalent chromium, mercury, cadmium, Polybrominatedbiphenyls and decabromodiphenyl ethers. For example, the metal alloy of the cream solder 24 may comprise one of the following compositions, which are most commonly used: tin / lead 63/37 or 10/90 or 90/10 tin / lead / silver 62 / 36/2 for the products exempt from RoHS or tin alloy / silver 96.5 / 3.5., tin / silver / Copper 96.5 / 3.8 / 0.7 or 96.6 / 3.0 / 0.5 or 98.5 / 1 .0 / 0.5. This technique is suitable for all type of alloy (comprising bismuth, antimony, etc.

In a manner known per se, the brazing flux depends on the type of metal alloy in suspension in the solder paste 24 and the process

assembly with or without cleaning. The brazing flux typically includes a resin (typically a natural resin, modified or synthetic), activating agents and additives for optimizing screen printing and reflow. The role of the brazing flux is to ensure the stripping of solder pads 4 (using activators), to protect them during the temperature rise of steps and play a role surfactant to promote wetting of metal alloy. For example, the brazing flux can comprise rosin.

It may be advantageous to solder terminations 8 of the same CMS

3 in the cavities 20 of different depth p, or soldering at least one end surface 8 while the other terminals 8 are brazed into cavities 20. Indeed, in general, efforts applied to terminals 8 are not identical for the same CMS 3: staging and the soldering of the terminations 8 adapts the brazing efforts received by each termination 8.

For example, it is possible to braze a portion of terminations 8 on the surface on the layer C (respectively, the layer C2) and the remaining terminals 8 into cavities 20. Preferably, the terminations 8 undergoing the more constraints are brazed in recesses 20, to increase their lifespan by reducing the angle of shear for the same relative movement of the CMS 3 relative to the printed circuit 2, while the other may be brazed surface.

This embodiment is particularly advantageous in the case of CMS 3 of the BGA-type (acronym for Grid Bail Array for matrix beads): the terminations 8 located in the areas adjacent to corners of the BGA are exposed to more constraints than the terminations 8 located in central part of the BGA or the middle side of the BGA. Terminations 8 located in these zones can therefore be brazed in the cavities 20.

This embodiment may also be advantageous when the CMS 3 comprises tabs: the tabs in the central portion of the CMS 3 may be brazed surface (respectively, in a cavity 20 to a first depth p) while the tabs to end of CMS 3 may be brazed in a cavity 20 (respectively in a cavity 20 to a second depth p, greater than the first depth p).

Examples of one electronic board with 3 different fixed CMS in accordance with the S method of the invention will now be described with reference to Figures 6 to 8.

Figure 6 illustrates a 1 Electronic board comprising two conductive layers of skin Ci and C2 and six internal conductive layers C3, C 4 , C 5, C 6, C 7 and Ce which extend between the layers Ci and C2 and are separated in two by insulating layers 10, with 1 1, 12, 30, 31, 32 and 33.

A first 3 CMS (CMS # 1) is soldered in cavities 20 formed in the layer C and in the first insulating layer 10. As can be seen in this figure, the vertical walls 22 of the cavities 20 are partially metallized (on a half of the periphery of the vertical wall 22 of the cavities 20 at the bottom 21 and on a portion of the output cavity 20 to form half-collars 23).

3 a second CMS (CMS # 2) is soldered in a conventional manner on the layer Ci.

Third and fourth components (CMS # 3 and CMS # 4) mounted therethrough technology unconventionally "surface" are brazed in cavities 20 formed in the layer C and the first (10), the third (12 ), a fourth (30) and a fifth (31) insulating layer. As can be seen in this figure, the vertical walls 22 of the cavities 20 and their outputs are metallized via a collar 23.

A CMS March 5 (CMS # 5), comprising the lugs gullwing, is brazed in cavities 20 formed in the layer C to layer C 4 through the first insulating layer 10, the layer C3 and the third insulating layer 12. As can be seen in this figure, the walls

vertical 22 of the cavities 20 and their outputs are metallized via a collar 23.

A sixth 3 CMS (CMS # 6), comprising the lugs 8 gullwing, is brazed in cavities 20 formed in the C2 layer and the second insulating layer 1 January. As can be seen in this figure, only the bottom 21 of the cavities 20 is metallized.

A seventh 3 CMS (CMS # 7), comprising legs 8 gullwing, is brazed in a conventional manner on the layer C2.

An eighth 3 CMS (CMS # 8) is brazed in cavities 20 formed in the C2 layer and the second insulating layer 1 January. As can be seen in this figure, the vertical walls 22 of the cavities 20 are partially metallized (on one half of the periphery of the vertical wall 22 of the cavities 20, on one half of their bottom 21 and on a portion of the output cavities 20 for forming half-collars 23).

A ninth CMS 3 (CMS # 9), which may correspond to a BGA and includes a plurality of terminals 8, is soldered in part in a conventional manner on the C2 layer and partly in recesses 20 formed in the C2 layer and the second insulating layer 1 January. Terminations 8 brazed into cavities 20 correspond here to the terminals 8 located at the ends of the ninth CMS 3.

Thus, this electronic card 1 comprises nine CMS 3 of various sizes and all exhibit a suitable standoff CMS 3. It is seen in particular that the standoff of the second and seventh CMS (CMS # 2 and # 7 CMS) is low, while the standoff other CMS 3 is high and at least equal to the number of insulating layers 10, January 1, 12 and conductive layers between -C 2 layer on which the CMS 3 is fixed and the solder strip 4 CMS 3.

Figure 7 illustrates a 1 Electronic board comprising two conductive layers of skin Ci and C2 and four inner conductive layers C 3, C 4 , C5 and C6, which extend between the layers Ci and C2 and are separated in twos by layers insulating 10: 1 1, 12, 30, 31.

A first 3 CMS (CMS # 1) is soldered in a conventional manner on the layer Ci.

3 a second CMS (CMS # 2) is soldered in cavities 20 formed in the first insulating layer 10. As can be seen in this figure, the vertical walls 22 and the exit of these cavities 20 are not metallized.

A third 3 CMS (CMS # 3) is brazed into cavities 20 formed in the first insulating layer 10 and the third insulating layer 12. As can be seen in this figure, the vertical walls 22 and the exit of these cavities 20 are not metallic.

A CMS March 4 (CMS # 4) is brazed in a recess 20 formed in the second insulating layer-1 1 and in a fifth insulating layer 31. As seen in this figure, the vertical walls 22 and the bottom 21 of the cavities 20 are metallic, but not their output.

Thus, this electronic card 1 comprises four SMD 3 of different size and all exhibit a suitable standoff CMS 3. It is seen in particular that the first standoff CMS 3 is small, while the standoff of the second, third and fourth CMS 3 is Student. For example, the standoff of the third 3 CMS (CMS # 3) is equal to the thickness of the layer C, of ​​the first insulating layer 10, of the C3 layer, and the third insulating layer 12.

Thus, this electronic card 1 comprises four SMD 3 of different size and have any suitable standoff CMS 3. It is seen in particular that the first standoff of CMS (CMS # 1) is low, while the standoff of the third and fourth (CMS # 3 and # 4 CMS) is high and equal, respectively, to the thickness of the first and the third insulating layer 10, 12 and the thickness of the second and the fifth insulating layer 1 January 31 .

Figure 8 illustrates a 1 Electronic board comprising two conductive layers of skin Ci and C2 and four inner conductive layers C 3, C 4 , C5 and C6, which extend between the layers Ci and C2 and are separated in twos by layers insulating 10: 1 1, 12, 30, 31.

A first SMD 3 (CMS # 1), which can be the type LCC (acronym Leadless Chip Carrier for housing without pin), LGA (acronym English land grid array to array ranges) or QFN (acronym English Quad Fiat no-lead) is brazed in the cavities 20 formed from the layer Ci in the first insulating layer 10. As can be seen in this figure, the walls of these cavities 20 are not metallized.

3 a second CMS (CMS # 2), which includes terminals 8 of the type J legs, is brazed into the cavities 20 formed from the layer Ci in the first and in the third insulating layer 10, 12. As can be seen in this figure, the vertical walls 22 and the output of these cavities 20 are not metallized.

A third CMS 3 (CMS # 3), which can be of the type assembled therethrough technology component "pin in paste" (tab through the solder paste) is brazed in a recess 20 formed from the layer C2 in the second (1 1), the fifth (31), the fourth (30) and third (12) insulating layer. As can be seen in this figure, the vertical walls 22 and the bottom 21 of this cavity 20 are metallized, but not its output (no flange 23).

A CMS March 4 (CMS # 4), which may for example be a BGA, is brazed in a recess 20 formed from the layer C2 in the second and fifth insulating layer 1 January 31. As can be seen in this figure, the vertical walls 22 and the bottom 21 of the cavities 20 are plated, but not their output (no flange 23).

We CLAIMS

1. A method of manufacturing (S) of an electronic card (1), said electronic card (1) comprising a printed circuit (2) multilayer, said printed circuit (2) comprising at least four conductive layers (Ci, C2, C3, C 4 , C 5, C 6, C 7 , Ce) separated in pairs by insulating layers (10: 1 1, 12, 30, 31, 32, 33), including:

- a first and a second skin conductive layer (Ci, C2) attached to a first and a second insulating layer (10: 1 1), respectively, the first skin conductive layer (Ci) substantially planar being and defining a plane ( X; Y) normal to a Z-axis,

- a first and a second internal conductive layer (C3, C 4 ) extending between the first and the second insulating layer (10: 1 1), respectively, and separated by a third insulating layer (12), at least the first inner conductive layer (C3) being processed so as to form at least one solder pad (4),

the manufacturing method (S) being characterized in that it comprises the following steps:

- forming (S1, S4) a first cavity (20) in the first skin conductive layer (Ci) and in the first insulating layer (10), facing the soldering pad (4) of the first inner conductive layer ( C3), so that at least a portion of the solder pad (4) is disclosed,

- filling (S5) the first cavity (20) accompanied with a metal alloy of a brazing flux (24),

- placing (S6) a first component (3) Electronic opposite the first cavity (20),

- applying a heat treatment (S7) to the printed circuit (2) on which is placed the first component (3) in order to transform the alloy accompanied metal of the brazing flux (24) brazed joint (5) so as to fix the first component (3) to the printed circuit (2).

2. A method of manufacturing (S) according to claim 1, wherein the first component (3) comprises at least one terminus and wherein comprises forming (S1, S4) of all the first cavities (20) in the first layer conductive skin that the electronic component comprises terminations.

3. A method of manufacturing (S) according to one of claims 1 or 2, wherein the electronic component is placed on the first conductive layer of skin (C1).

4. A method of manufacturing (S) according to one of claims 1 to 3, wherein the first cavity (20) is formed (S1, S4) by means of at least one of the following techniques: photolithography surface , laser drilling, mechanical drilling, mechanical cutting.

5. A method of manufacturing (S) according to one of claims 1 to 4, further comprising a metallization step (S2) of the first cavity (20) for depositing a metal layer (13) in the first cavity (20 ).

6. A method of manufacturing (S) according to claim 5, further comprising an additional step (S3) wherein a portion of the metal layer (13) of the first cavity (20) is removed prior to the filling step ( S5) of the first cavity (20).

7. A method of manufacturing (S) according to claim 6, wherein removing (S3) part of the metal layer (13) is formed by laser or mechanical cutting or by mechanical drilling.

8. A method of manufacturing (S) according to one of claims 1 to 7, wherein the first inner conductive layer (C3) includes a solder pad (4) and the additional manufacturing process (S) comprises

Furthermore the following additional steps, prior to the heat treatment step:

- forming (S1, S4) a second cavity (20) in the first insulating layer (10), facing the soldering pad (4) further, so that at least a further portion of the soldering pad (4 ) further being revealed,

- filling (S5) the second cavity (20) together with the metal alloy brazing flux (24), and

- placing (S6) a second component (3) Electronic opposite the second cavity (20),

the steps of filling (S5) of the first and second cavities (20) and component placement (3) being performed substantially simultaneously.

9. A method of manufacturing (S) according to one of claims 1 to 8, further comprising a step of etching the first conductive layer of skin (Ci).

10. A method of manufacturing (S) according to one of claims 1 to 9, wherein the first cavity (20) is completed in accordance with at least one of filling techniques (S5) the following: printing with screen (7) screen printing, screen printing without screen (7) of screen printing, inkjet printing, passing through a turbulent wave, by dipping or passing it through a bath of metallic alloy reflow, wave soldering, manual soldering.

January 1. A method of manufacturing (S) according to one of claims 1 to 10, wherein the second inner conductive layer (C 4 ) is treated so as to form at least one solder pad (4), the manufacturing method (S) further comprising the steps, prior to step (S7) of heat treatment:

- forming (S1, S4) a third cavity (20) in the first insulating layer (10) and the third insulating layer (12), facing the soldering pad (4) of the second inner conductive layer (C 4 ), so that at least a portion of the solder pad (4) of the second inner conductive layer (C 4 ) is disclosed,

- filling (S5) the third cavity (20) together with the metal alloy brazing flux (24), and

- placing (S6) a third component (3) additional electronic opposite the third cavity (20).

12. A method of manufacturing (S) according to one of claims 1-1 1, wherein the second inner conductive layer (C 4 ) is treated so as to form at least one solder pad (4), the manufacturing process (S) further comprising the steps, prior to the heat treatment step:

- forming (S1, S4) a fourth cavity (20) in the second skin conductive layer (C2) and the second insulating layer (1 1), facing the soldering pad (4) of the second inner conductive layer (C 4 ), so that at least a portion of the solder pad (4) of the second inner conductive layer (C 4 ) is disclosed,

- filling (S5) the fourth cavity (20) together with the metal alloy brazing flux (24), and

- placing (S6) a fourth component (3) Electronic opposite the fourth cavity (20).

13. A method according to one of claims 1 to 12, further comprising, prior to step (S7) of heat treatment, a step during which an additional layer (19) comprising an electrically insulating material is applied to the first skin conductive layer (Ci), the first cavity (20) being formed partly in said additional layer (19).

14. The method of claim 13, wherein the electrically insulating material of the additional layer (19) has a first coefficient of thermal expansion along the axis Z, the metal alloy has a second coefficient of thermal expansion along the Z axis and wherein the first coefficient of thermal expansion is greater than the second coefficient of thermal expansion.

15. A method according to one of claims 1 to 14, wherein a surface of the first cavity in the plane (X, Y), is at least equal to 0.04 mm 2 .

16. Electronic card (1) comprising a printed circuit (2) multilayer, said printed circuit (2) comprising at least four conductive layers (Ci, C2, C3, C 4 , C 5, C 6, C 7 , Ce) separated in two by insulating layers (10, January 1, 12), including:

- a first and a second skin conductive layer (Ci, C2) attached to a first and a second insulating layer (10: 1 1), respectively, the first conductive layer substantially planar being and defining a plane (X, Y) normal a Z-axis,

- a first and a second internal conductive layers (C 3, C 4 ) extending between the first and the second insulating layer (10: 1 1), respectively, and separated by a third insulating layer (12), at least the first inner conductive layer (C3) being processed so as to form at least one solder pad (4),

- a first cavity (20) formed in the first skin conductive layer (Ci) and the first insulating layer (10), said first cavity (20) revealing at least in part the brazing range (4), and

- a first component (3) mounted electronic surface comprising at least one termination (8), said first component (3) being in contact or at a distance from the first conductive layer skin (Ci), the termination (8) of the first component (3) being secured in the first cavity (20) via a solder joint (5).

17. Electronic card (1) according to claim 16, comprising as many first cavities (20) that the electronic component is terminated.

18. Electronic card (1) according to one of Claims 16 or 17, wherein the first cavity (20) comprises a metal layer (13) of metallization.

19. Electronic card (1) according to claim 18, wherein the first cavity (20) is partially covered with a metal layer

(13) of metallization.

20. Electronic card (1) according to one of claims 17 to 19, further comprising saving a varnish (17) applied on the first conductive layer (Ci) and on top of the insulating layer (10) at least partially unveiled and / or a metallic finish (18) applied on the first conductive layer of skin (Ci) and the areas of the first inner conductive layer (C3) which form the first cavity (20).

21. electronic card (1) according to one of claims 17 to 19, wherein the first component (3) comprises a terminal (8) further, said termination (8) being fixed on the first conductive layer of skin (Ci) by via a solder joint (5).

22. Electronic card (1) according to one of claims 17 to 21, wherein the second inner conductive layer (C 4 ) is treated so as to form at least one solder pad (4), the electronic card (1) further comprising:

- a second cavity (20) formed in the first insulating layer (10) and the third insulating layer (12) opposite the second internal conductive layer (C 4 ), and

- a second component (3) mounted electronic surface comprising at least one termination (8), said second component (3) being in contact or at a distance from the first conductive layer skin (Ci), the termination (8) of the second component (3) being fixed in the second cavity (20) via a solder joint (5).

23. Electronic card (1) according to one of claim 17 to 21, wherein the first component (3) further comprises a termination (8) Further, the second inner conductive layer (C 4 ) is treated so as to form at least one solder pad (4) and the electronic card (1) further comprises a cavity (20) further formed in the first insulating layer (10) and the third insulating layer (12), in front of the beach brazing (4) of the second inner conductive layer (C 4 ), the termination (8) of the additional component (3) being secured to said solder pad (4) into the cavity (20) further through of a solder joint (5).

24. Electronic card (1) according to one of claims 17 to 23, wherein the second inner conductive layer (C 4 ) is treated so as to form at least one solder pad (4), the electronic card (1) further comprising:

- a fourth cavity (20) formed in the second conductive skin layer (C2) and the second insulating layer (1 1), in front of the second inner conductive layer (C 4 ), and

- a fourth component (3) mounted electronic surface comprising at least one termination (8), said fourth component (3) being in contact or at a distance from the second skin conductive layer (C2), the termination (8) of the fourth component (3) being fixed in the fourth cavity (20) via a solder joint (5).

25. Electronic card according to one of claims 17 to 24, wherein a surface of the first cavity in the plane (X, Y), is at least equal to 0.04 mm 2 .