DESCRIPTION ENDLESS CHIPPING BELT [Technical Field] [0001]
The present invention relates to an endless chipping belt for splitting wafers into chips such as a ceramic chip resistor, to a predetermined size. [Background Art] [0002]
The size of ceramic chip resistors and other chips continues to shrink, to sizes of 0.6mm x 0.3mm (0603 size) and even smaller. Therefore, when a wafer is cut by a dicing method using a cutter, chip yield diminishes and the production cost of chips increases. [0003]
Due to this situation, a belt chipping method to split wafers into chips by passing through the wafers between a pair of running belts whose surfaces are covered with woven fabrics, and which are located at up- and downside, is known (refer to Patent Citations 1 to 3). [Disclosure of Invention] [Technical Problem] [0004]
Whan a belt whose surface is covered with woven fabric is used to split wafers into chips, chips which are being

made small may go down to the recess of the woven fabric and chip splitting failure may occur so that chip yield may be lowered. [0005]
Furthermore, due to the small size of the chip, usage of a small-diameter pulley is required when the belt chipping method is adopted. Therefore, the belt does not easily run on the pulley and chip splitting failure may occur so that this may also lower the chip yield. [0006]
Therefore, the objective of the present invention is to provide an endless chipping belt which can prevent the splitting failure of small chips, and thereby improve chip yield.
[Technical Solution] [0007]
An endless chipping belt, according to the present invention, includes a surface layer that comprises a chipping surface and that is formed of rubber or resin. The chipping surface is mat-processed so that the maximum surface roughness Rmax of the chipping surface is less than or equal to 35 urn. [0008]
The endless chipping belt may further include a core material that is formed of woven fabric, and that is laminated

by the surface layer. In the endless chipping belt, the thickness of thread that forms the woven fabric may be less than or equal to 240 dtex, and the weave density of the woven fabric may be more than or equal to 50 threads per inch. [0009]
In the endless chipping belt, the woven fabric may be formed of at least one of a polyamide fiber, a polyester fiber, an aramid fiber, a glass fiber, and a cotton fiber. [0010]
In the endless chipping belt, the surface layer may be
formed of at least one of urethane rubber, nitrile rubber,
chloroprene rubber, polybutadiene rubber,
ethylene-propylene rubber, hydrogenated
acrylonitrile-butadiene rubber, styrene-butadiene rubber, fluoro rubber, silicone rubber, natural rubber, millable urethane, polyurethane, polyamide, polyvinyl chloride, phenol resin, polyimide, polyester, and fluoro resin. [0011]
The hardness of the surface layer may be higher than or equal to A70. [Advantageous Effects] [0012]
According to the present invention, an endless chipping belt which can prevent the splitting failure of small chips, and which can improve yield of the chip, can be provided.

[Patent Citation 1]
Japanese Unexamined Patent Publication No. 2006-61778. [Patent Citation 2]
Japanese Unexamined Patent Publication No. 2006-62008. [Patent Citation 3]
Japanese Unexamined Patent Publication No. 2006-62141.
[Brief Description of Drawings] [0013] [Fig. 1]
Fig. 1 is a conceptual view of splitting wafers into chips by an endless chipping belt. [Fig. 21
Fig. 2 is a view of a chipping device using the endless chipping belts of a first embodiment. [Fig. 3]
Fig. 3 is a section view of the first endless chipping belt of the first embodiment. [Fig. 4]
Fig. 4 is a section view of the second endless chipping belt of the second embodiment. [Explanation of References] [0014]

10 First: endless chipping belt.
10S Chipping surface
14 Woven fabric
14A First thread (thread)
14B Second thread (thread)
16 Surface layer
20 Second endless chipping belt
[Best Mode for Carrying Out the Invention]
[0015]
Hereinafter, the first embodiment of the present invention is explained with reference to the attached figures. Chips are split as explained below, using the endless chipping belt of the first embodiment. First, a wafer 30 is split along a direction so that many strips 32 are obtained. Then, each of the strips 32 is further split along the direction perpendicular to its longitudinal direction, so that chips 34 are obtained.
[0016]
In such processes, that is, splitting a wafer 30 into strips 32, and another process splitting a strips 32 into chips 34, for example, the chipping device 40 represented in Fig. 2 is used. In the chipping device 40, a pair of the first endless chipping belts 10 is used. The first endless chipping belts 10 are trained between pulleys such as the first pulley 42 with small diameter and the second pulley 44 to press the

wafer 30 or the strip 32 with the first pulley 42. [0017]
The wafer 30 or the strip 32 is inserted into the slit S between the pair of the first endless chipping belts 10. The wafer 30 or the strip 32 is pressed in up and down direction at the curved point 12 where the first endless chipping belts 10 are curved by the first and second pulleys 42, and 44, so that the wafer 30 and the strip 32 are split into the strips 32 or the chips 34 (see Fig. 1). [0018]
As shown in Fig. 3, the first endless chipping belt 10 includes a woven fabric 14 as a core material. The woven fabric 14 is coated with a surface layer 16 of urethane rubber. A chipping surface 10S that is a surface of the first endless chipping belt 10, and that contacts the wafer 30 and strip 32 (see Figs. 1 and 2) , is formed by the surface layer 16. [0019]
At least one of the chipping surfaces 10 S is mat-processed so that the maximum surface roughness Rmax of the chipping surface 10S is less than or equal to 35 urn. The chipping surface 10S that is mat-processed has suitable roughness, and the coefficient of friction the chipping surface 10S is lower than that in mirror surface. Therefore, the contact area between the chipping surfaces 10S and the wafer 30, or between the chipping surfaces 10S and the strip

32 is small, so that the friction resistance is restricted and the attaching failure of the chip 34 to the chipping surface 10S is prevented. As a result, the yield of the chip 34 can be improved. Note that if the surface roughness of the chipping surface 10S is too great, the edge of the chip 34 may be broken and shape of the split chip 34 may be unsuitable, so that the yield of the chip 34 may be reduced. Therefore, the maximum surface roughness Rmax of the chipping surface 10S is adjusted to be less than or equal to 35 um. [0020]
The mat-process of the chipping surface 10S is carried out when the first endless chipping belt 10 is manufactured. That is, a sheet material to become the surface layer 16 is put in a metal mold where its surface is previously roughened by a process such as sand blasting. Then, the sheet material is heated so that a slab of the first endless chipping belt 10 is formed. This process results in minute unevenness of the mold surface being transferred to the surface of the slab. As a result, the chipping surfaces 10S is formed with minute unevenness. [0021]
When the mat-process is carried out using the unevenness of the mold surface as explained above, because the adhesion of the formed surface layer 16 to the mold is

weak, the formed slab can be easily detached from the mold. That is, only a small force is required to remove the slab from the mold, making the first endless chipping belt 10 easier to produced, compared to the case of a mold having a smooth surface and the chipping surface 10S having a mirror surface. [0022]
The first thread 14A forming the woven fabric 14 and running the belt width direction, is for example, an aramid fiber. The second thread 14B running in the longitudinal direction, is for example, a polyethylene terephthalate type. The thickness of the first and second threads 14A, 14B are both less than or equal to 240 dtex, such as 210 dtex and 140 dtex, respectively. The weave density of the woven fabric 14 is, in both width and longitudinal directions, more than or equal to 50 threads per inch. For example, they may be 55 threads per inch. [0023]
By setting the thickness of the first and second threads 14A and 14B to be suitably small and increasing the weave density of the woven fabric 14 as explained above, resulting in unevenness on the chipping surfaces 10S caused by the fold of the woven fabric 14, and not caused by the mat-process, is prevented. Therefore, the chip 34 (see Fig. 1) is prevented from entering the recesses of the chipping

surfaces 10S. Furthermore, using thin first and second threads 14A, 14B allows the first endless chipping belt 10 to be thin. It also enables the first endless chipping belt 10 to suitably wind around a pulley with small diameter, such as the first pulley 42. [0024]
Note that as the first and second threads 14A and 14B of the woven fabric 14, one of a polyamide fiber, a polyester fiber, a glass fiber, a cotton fiber, or a combination thereof may be used other than ones mentioned above. [0025]
The hardness of the surface layer 16 laminated on the surface of the woven fabric 14 used as a core material, is adjusted to greater than or equal to A70 (JIS-K6253) . Use of such a relatively hard surface layer 16 can reliably prevent that the chip 34 (see Fig. 1) sinking into the recesses on the chipping surfaces 10S, and the woven fabric 14 can be protected from scratches caused by contacting the edge of a chip 34 and from other damages. [0026]
Mote that rubbers and resins other than urethane rubber
may be used as the surface layer 16. For example, one of
nitrile rubber, chloroprene rubber, polybutadiene rubber,
ethylene-propylene rubber, hydrogenated
acrylonitrile-butadiene rubber, styrene-butadiene rubber,

fluoro rubber, silicone rubber, natural rubber, millable urethane, polyurethane, polyamide, polyvinyl chloride, phenol resin, polyimide, polyester, and fluoro resin, or a combination thereof may be used as the material for the surface layer 16. [0027]
A chip splitting test was carried out by using the chipping device 40 with the first endless chipping belt 10 (see Fig. 2) , and a good result was obtained. That is, when 100 wafers 30 were split into chips 34 with a size of 0.6mm x 0.3mm using the chipping device 40 with the first endless chipping belt 10, the rate of sub-standard chips 34 was less than 1 percent. On the other hand, when the same wafers 30 were split by a conventional chipping device, the rate of sub-standard chips 34 was around 50 percent. [0028]
As explained above, in the first embodiment, the splitting failure of chips 34 is prevented and the yield of the chip 34 is improved, by using the first endless chipping belt 10 that has the chipping surfaces 10S with a suitable surface roughness. [0029]
Note that, using the woven fabric 14 as a core material makes the first endless chipping belt 10 thin, for example about 0.7mm. Therefore, the first endless chipping belt 10

suitably winds around a small-diameter pulley such as the
first pulley 42. Therefore, using the woven fabric 14 as a
core material also contributes to reducing the splitting
failure of chips 34.
[0030]
Next, the second embodiment is explained, mainly
focusing on the difference to the first embodiment.
[0031]
As shown in Fig. 4, the second endless chipping belt 20 has a different core material than that of the first endless chipping belt 10 . That is , in the second endless chipping belt 20, a cord 24 embedded in the rubber layer 22 is used as the core material. A fabric 25 and a surface layer 26 are layered on and below the rubber layer 22, respectively. The material of the surface layer 26 is the same as that of the first embodiment.
[0032]
On the surface layer 26, there is formed a chipping surface 20S that is a surface of the second endless chipping belt 20, and that contacts the wafer 30 and strips 32 (see Figs. 1 and 2) . The chipping surface 20S is mat-processed, just as the first endless chipping belt 10. [0033]
Because the cord 24 is used as a core material, the second endless chipping belt 20 tends to be thicker than the

first endless chipping belt 10 with a core material of the woven fabric 14. However, due to the light roughness of the chipping surface 20S, the contact area between the chipping surface 20S and the wafer 30, or between the chipping surface 20S and the strip 32 (see Fig. 1) , is reduced; and the frictional resistance therebetween is limited. This increases the yield of chips 34. [0034]
As explained above, in the second embodiment, just as in the first embodiment, the yield of the chips 34 is improved using the second endless chipping belt 20 having the chipping surfaces 20S with a suitable surface roughness. [0035]
Note that in the both first and second embodiments, a pairs of chipping surfaces 10S or 20S may be mat-processed. In that case, even when one of two chipping surfaces 10S or 20S is slightly damaged (for example, scratched), it is possible to reverse the first or second endless chipping belt 10, 20 to expose the undamaged chipping surface 10S or 20S. Therefore, the lives of the first and second endless chipping belts 10 and 20 can be extended. [0036]
The materials composing the members of the first and second endless chipping belts 10 and 20, such as the woven fabric 14, or the surface layers 16 and 26, are not limited

to those in the above-explained embodiments. Furthermore, the composition of the chipping device 40 (see Fig. 2) is not limited to that of the embodiments either. For example, the arrangement of the first and second pulleys 42 and 44, and the number of pulleys included in the chipping device 40 may also be adjusted. [0037]
This invention is not limited to that described in the preferred embodiments; namely, various improvements and changes may be made to the present invention without departing from the spirit and scope thereof. [0038]
The present disclosure relates to subject matter contained in Japanese Patent Application No. 2007-100607 (filed on April 6, 2007), which is expressly incorporated herein, by reference, in its entirety.

AMENDED CLAIMS [received by the International Bureau on 29 August 2008 (29.08.08)]
1. An endless chipping belt: comprising;
a surface layer that comprises a chipping surface and that is formed of rubber or resin, said chipping surface being mat-processed so that the maximum surface roughness Umax of said chipping surface being less than or equal to 35 μm, said mat-process being carried out by putting a sheet material to become said surface layer in a mold whose surface has been previously roughened.
2. An endless chipping belt according to claim 1, further comprising a core material that is formed of woven fabric, and that is laminated by said surface layer.
3. An endless chipping belt according to claim 2, wherein the thickness of thread that forms said woven fabric is less than or equal to 240 dtex, and the weave density of said woven fabric is more than or equal to 50 threads per inch.
4. An endless chipping belt according to claim 2, wherein said woven fabric is formed of at least one of a polyamide fiber, a polyester fiber, an aramid fiber, a glass fiber, and a cotton fiber.
5. An endless chipping belt according to claim 1, wherein said surface layer is formed of at least one of urethane rubber, nitrile rubber, chloroprene rubber, polybutadiene rubber, ethylene-propylene rubber, hydrogenated

acrylonitrile-butadiene rubber, styrene-butadiene rubber, fluoro rubber, silicone rubber, natural rubber, millable urethane, polyurethane, polyamide, polyvinyl chloride, phenol resin, polyimide, polyester, and fluoro resin. 6. An endless chipping belt according to claim 1, wherein the hardness of said surface layer is higher than or equal to A70.

An endless chipping belt 10 includes a woven fabric 14 as a core material. The woven fabric 14 is coated with a surface layer 16. At least one of the chipping surfaces 1OS that are formed of the surface layers 16, is mat-processed. Therefore, the chipping surface 1OS has suitable surface roughness, so that the contact area of the chipping surface 1OS with a wafer or a strip that are aggregate chips, is small, thereby limiting the frictional resistance. Furthermore, failure due to unwanted attachment of the chip to the chipping surface 1OS is also prevented, and the yield of the chip is increased.