ENERGY OPTIMIZATION TECHNIQUES IN A COMPUTING SYSTEM BACKGROUND A computing system may include one or more processors, operating system(s), and a plurality of applications and the computing system may consume energy while performing the applications. One of the techniques adopted for energy optimization may include dynamic voltage and frequency scaling (DVFS) in which the voltage and frequency of the processors or parts such as cores thereof may be varied based on occurrence of some condition. In one prior approach, a dynamic optimizer may reduce the frequency of the processor while the application may suffer from Last Level Cache (LLC) misses. As depicted in FIG. 1, the processing element 110,, while processing an application 105 may send a request to retrieve data from a cache 140 as depicted in block 210 of FIG. 2. If the data is present in the cache 140 (cache hit), as determined in block 250, the processing element 110 may fetch data from the cache 140 as depicted in block 280. If the data is not present in the cache 140 (cache miss), the processing element 110 may wait for data to be fetched from the memory 180 as depicted in block 290. The application 105 may comprise several regions and some regions (first regions) may be processor-bound and some others (second regions) may be memory-bound. The processing element 110 may spend most of the time in processing the first regions of the application 105 if the data is already present in the cache 140. On the other hand, if the data is not present in the cache 140, the processing element 110 may spend most of me time waiting for data to be fetched from the memory into the cache 140 to process the second regions. In such a scenario, the second regions may be termed as more memory-bound as compared to the first regions. As the processing element 110 may wait for data to be fetched from memory 180, it may be advantageous to decrease the frequency (F) provided to the processing element 110. As a result of operating the processing element 110 at a lower frequency, the performance loss may be minimal, but the energy savings by operating the processing element 110 at a lower frequency may be substantial. Based on how memory-bound (i.e. how much it suffers from LLC misses) a region of the application is, the frequency may be scaled down by a factor X. Such a prior technique may automatically decide what it considers to be a best trade-off between performance loss and energy savings by choosing a frequency and/or voltage value of X and Y for that program region. However, the frequency value (X) and/or voltage value (Y) so selected may not be the best trade-off from the user's perspective. BRIEF DESCRIPTION OF THE DRAWINGS The invention described herein is illustrated by way of example and not by way of limitation in the accompanying figures. For simplicity and clarity of illustration, elements illustrated in the figures are not necessarily drawn to scale. For example, the dimensions of some elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference labels have been repeated among the figures to indicate corresponding or analogous elements. FIG. 1 illustrates a computing platform 100. FIG. 2 is a flow-chart, which illustrates cache misses incurred by an application performed by the computing platform 100. FIG. 3 illustrates an application 300, which may include a plurality of regions in accordance with one embodiment. FIG. 4 illustrates a table 400, which depicts the time taken for each region to be processed at different frequency values in accordance with one embodiment. FIG. 5 illustrates a flow-chart 500, which depicts a technique to save energy for a known performance loss incurred while operating the processing element at different frequencies to perform different regions within an application based on the a posteriori technique in accordance with one embodiment. FIG. 6 illustrates a table 600, which depicts a technique to save energy for a known performance loss incurred while operating the processing element at four different frequencies to perform four different regions within an application in accordance one with embodiment. FIG. 7 illustrates a graph 700, which may be generated by plotting performance loss (in percentage) on X-axis and energy savings (in percentage) on Y-axis in accordance with one embodiment. FIG. 8 illustrates a computing system 800, which may provide a user the flexibility to select the operating points for operating the computing system 800 to achieve the desired energy savings for a given performance loss in accordance with one embodiment. FIG. 9 illustrates a graphic user interface (GUI) supported by the computing system 700 to allow the user to select the operating points in accordance with one embodiment. FIG. 10 illustrates a graph 1000, which may be generated by plotting frequency on X-axis and memory boundedness on Y-axis in accordance with one embodiment. FIG. 11 is a flowchart that illustrates an operation of the computing system 800, which may provide a user the flexibility to select the operating points for operating the computing system 800 to achieve the best energy savings for a desired performance loss using the a priori technique in accordance with one embodiment. DETAILED DESCRIPTION The following description describes flexible energy optimization techniques on a computing system. In the following description, numerous specific details such as logic implementations, resource partitioning, or sharing, or duplication implementations, types and interrelationships of system components, and logic partitioning or integration choices are set forth in order to provide a more thorough understanding of the present invention. It will be appreciated, however, by one skilled in the art that the invention may be practiced without such specific details. In other instances, control structures, gate level circuits, and full software instruction sequences have not been shown in detail in order not to obscure the invention. Those of ordinary skill in the art, with the included descriptions, will be able to implement appropriate functionality without undue experimentation. References in the specification to "one embodiment", "an embodiment", "an example embodiment", indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described. Embodiments of the invention may be implemented in hardware, firmware, software, or any combination thereof. Embodiments of the invention may also be implemented as instructions stored on a machine-readable medium, which may be read and executed by one or more processors. A machine-readable storage medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing device). For example, a machine-readable storage medium may include read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory devices; electrical, optical forms of signals. Further, firmware, software, routines, and instructions may be described herein as performing certain actions. However, it should be appreciated that such descriptions are merely for convenience and that such actions in fact result from computing devices, processors, controllers, and other devices executing the firmware, software, routines, and instructions. In one embodiment, a user may be provided flexibility to choose from a range of frequencies to derive die best desired trade-off between performance loss and energy savings. In one embodiment, the user may be provided with configuration information and the user may be allowed to select a set of configuration parameters, which may allow the user to derive desired energy savings at a known performance losses. In other embodiments, the user may be provided with an interface to specify a maximum performance loss that may be tolerated (referred to as 'maximum tolerable performance loss') for an application and the techniques discussed below may choose operating points to satisfy the maximum tolerable performance loss while maximizing the energy savings. In one embodiment, the user may select an acceptable performance loss for which the energy savings may be maximized. In one embodiment, the user may use two techniques - (1) the a posteriori technique and (2) the a priori technique to achieve the best trade-off between the energy savings and the performance loss. In one embodiment, the a posteriori technique may be used in scenarios wherein the time spent by the processing element in performing each region within the application at different frequencies may be known. In one embodiment, using the a priori technique, the memory boundedness of the different regions of the application may be determined dynamically as the application is being performed. In one embodiment, the user may determine the frequency to operate the processing element to perform a region of an application that may provide the best energy savings for a selected performance loss. An embodiment of an application comprising regions that have various levels of memory boundedness is illustrated in FIG. 3. In one embodiment, the application 300 may include regions 301-A to 301-M. In one embodiment, the memory boundedness of the regions 301-A to 301-M may equal (Ml, M2,...Mm). In one embodiment, (Ml, M2,...Mm) may represent different values of memory boundedness of the regions 301-A to 301-M. However, it may also be possible that two or more regions within the regions 301-A to 301-M may have same memory boundedness. In one embodiment, the processing element 110 may be operated at a frequency Fl while performing the region 301-A and at a frequency F2 while performing the other region 301-K. Likewise, the processing element 110 may be operated at different frequency values (e.g., Fl, F3, F5, F4, Fn) while performing different regions 301-A to 301-M based on how memory bound the regions 301-A to 301-M are. An embodiment of a table 400 depicting the time consumed by the processing element 110 while performing the regions 301-A to 301-M at frequencies Fl to Fn is illustrated in FIG. 4. In one embodiment, the table 400 may include columns 410 and 411-A to 411-n and rows 440 and 441-A to 441-M. In one embodiment, the column 410 may include labels of the regions 301-A to 301-M in rows 441-A to 441-M, respectively. In one embodiment, the row 440 may include labels of the frequencies Fl to Fn in the columns 411-A to 411-N. Row 441-A may include (TA1, TA2, TA3...TAn) in the columns 411-A to 411-n, respectively. In one embodiment, the processing element 110 may consume a time period of TA1 to perform the region 301-A if the processing element 110 is operated at a frequency F1 as indicated in column 411-A. fn one embodiment, the region 301-A may represent MAIN_ and Fl may be equal to 1600 MHz and TA1 may be equal to 504 seconds. In one embodiment, the processing element 110 may consume a time period of TA2 to perform the region 301-A if the processing element 110 is operated at a frequency F2 as indicated in column 411 -B. In one embodiment, the processing element 110 may consume a time period of 525 seconds while performing the region 301-A (MAINJ if the processing element 110 is operated at a frequency F2 (=1333MHz). In one embodiment, the processing element 110 may consume a time period of TA3 (= 571 seconds) while performing the same region 301-A (MAIN_) if the processing element 110 is operated at a frequency F3 (=1066MHz). Likewise, the time consumed by the processing element 110 while performing the same region 301-A (MAIN_) while operating at a frequency Fn (=800MHz) may be 720 seconds. It may be noted that the performance loss incurred while operating the processing element 110 at a frequency Fn (=800MHz) may be substantial and the energy savings may be significant. However, the user may be provided with the flexibility to choose the frequency that the processing element 110 may be operated at while being aware of the performance loss and the associated energy savings. Likewise, Row 441-B may include (TBI, TB2, TB3...TBn) in the columns 411-A to 411-n, respectively that may indicate the time consumed by the processing element 110 while performing the region 301-B at different frequencies Fl to Fn. In one embodiment, the processing element 110 may consume a time period of TBI (=223 seconds, for example), TB2 (=262 seconds), TB3 (=311 seconds), and TB4 (=407 seconds) while the processing element 110 may be operated at frequencies Fl(= 1600MHz), F2(=1333MHz), F3(=1066MHz), and Fn(=800MHz), respectively, to perform the region 301-B, In one embodiment, the region 301-B may represent a function calcl_. Likewise, Row 441-C may include (TCI, TC2, TC3...TCn) in the columns 411-A to 411-n, respectively that may indicate the time consumed by the processing element 110 while performing the region 301-C at different frequencies Fl to Fn. In one embodiment, the processing element 110 may consume a time period of TCI (=220 seconds, for example), TC2 (=254 seconds), TC3 (=260 seconds), and TC4 (=376 seconds) while the processing element 110 may be operated at frequencies Fl(=1600MHz), F2(=1333MHz), F3(=1066MHz), and Fn(=800MHz), respectively, to perform the region 301-C. In one embodiment, the region 301-M may represent a function calc2_. Likewise, Row 441-M may include (TM1, TM2, TM3...TMn) in the columns 411-A to 411-n, respectively that may indicate the time consumed by the processing element 110 while performing the region 301-M at different frequencies Fl to Fn. In one embodiment, the processing element 110 may consume a time period of TM1 (=205 seconds, for example), TM2 (=235 seconds), TM3 (=260 seconds), and TM4 (=319 seconds) while the processing element 110 may be operated at frequencies Fl(=1600MHz), F2(=1333MHz), F3(=1066MHz), and Fn(=800MHz), respectively, to perform the region 301-M. In one embodiment, the region 301-M may represent a function calc3_. From the above, it may be inferred that the region 301-A (MAIN_) is comparatively more memory bound (i.e., Ml is greater than M2, M3,...Mm) than the regions 301-B, 301-C, and 301-M, as the performance loss in the region 301-A may not be linear with respect to reduction in the frequency of the processing element 110. In one embodiment, the region 301-A, which is comparatively more memory bound, may be run at a frequency lesser than Fl. However, while decreasing the frequency provided to the processing element 110 while performing the region 301-A, the performance loss associated with the decreased frequency may also be considered. In the above example, if the frequency is decreased to F2,the time (TA2) consumed by the processing element 110 to process the region 301-A may equal 523 seconds and if the frequency is decreased to F3, the time (TA3) consumed by the processing element 110 to process the region 301-A may equal 571 seconds. By comparing TA2 and TA3, it may be inferred that the performance loss (TA3-TA2= 571-525 = 46 seconds) may not be significant if the processing element 110 is operated at F3 instead of F2 and the energy savings may be significant. However, operating the processing element 110 at a frequency Fn (800MHz) may substantially increase the performance loss (TA4-TA3 = 720-571 = 149 seconds) while the energy savings may not be proportionate to the performance loss. As the performance loss increases, the percentage increase in the energy savings may decrease. As a result, it may not be a best trade-off between energy savings and performance loss to operate the processing element 110 at a frequency F4 for the region 301-A. In one embodiment, the user may have the flexibility to choose the frequency after knowing the performance loss and the energy savings associated with choosing the frequency. In one embodiment, the user may choose a frequency, which may either equal F2 or F3 to operate the processing element 110 as a best trade-off between performance loss and energy savings. In one embodiment, the a posteriori technique described below may provide flexibility to the user to select an operating point to operate the processing element 110 while processing different regions 301-A to 301-M to provide a best trade-off between the performance loss and the energy savings. An embodiment of a posteriori technique is illustrated in flow-chart of FIG. 5. In one embodiment, the a posteriori technique may be used with the details about the application such as which regions are memory-bound and how much are these regions memory-bound. In one embodiment, the details about the memory-boundedness of the application may be used to determine the frequency at which the processing element 110 may be operated while processing different portions of the application to achieve the "best" energy savings for the "least" performance losses. In one embodiment, in the a posteriori technique the time consumed by the processing element 110 for processing different regions of the application program 300 at different frequencies (Fl to Fn) may be determined. In one embodiment, the time consumed information may be used to determine the energy savings and the performance losses for various combinations of frequencies (Fl to Fn) for the different regions 301-A to 301-M. In one embodiment, a graph of the energy savings versus the performance loss may be plotted for each such combination. In one embodiment, the user may be allowed to choose the "best" combination of frequencies to operate the processing element 110 while processing the different regions 301-A to 301-M. Such an approach may allow the user to achieve the "best" trade-off between energy savings and performance loss. Such an approach is described in further detail in the flow-chart 500. In block 510, an analyzer such as the analyzer 860 of FIG. 8 provided in a computing system such as the computing system 800 depicted in FIG. 8 may determine the time (Tij) consumed by the processing element 110 in processing the different regions 301-A to 301-M while operated at different frequencies (Fl to Fn). In one embodiment, the frequencies Fl to Fn may represent a range of frequency values mat may be separated by a small incremental value to provide a fine grain control of the processing element 810. In other embodiment the frequencies Fl to Fn may be based on the P-states defined for the processing element 810. In one embodiment, the processing element 810 may support 'j' power states and each power state may be defined by a frequency 'Fj' and voltage 'Vj' For example, the processing element 810 may support four P-states (j=4) with operating points of {(Fl, VI), (F2, V2), (F3, V3), and (F4, V4)}. In one embodiment, the analyzer may determine the time consumed Tij', which may represent the time consumed by the processing element 810 operating at a frequency 'Fj' while processing the 'ith' region in the application 300. In block 540, the analyzer 860 may determine the energy consumed by the region "i" running at the "jth" frequency using the formula Eij = k * Vj * fj * tij, where Vj represents the voltage at frequency "fj" and "tij" may represent the time taken by the processing element 810 to process the ith region while operating at a frequency fj, and k is a constant. In block 550, the analyzer 860 may determine the energy consumed by the application 300 for a given combination of regions 301-A to 301-M while the processing element 810 may be operating at given frequencies. In one embodiment, the energy (E) consumed by the application 300 may be determined by summing