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"Fabrication Of Porous Silicon Electrochemical Capacitors"

Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods may include forming an electrochemical capacitor device by forming pores in low purity silicon materials. Various embodiments described herein enable the fabrication of high capacitive devices using low cost techniques.

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Patent Information

Application #
Filing Date
05 May 2014
Publication Number
27/2015
Publication Type
INA
Invention Field
ELECTRICAL
Status
Email
Parent Application
Patent Number
Legal Status
Grant Date
2020-01-03
Renewal Date

Applicants

INTEL CORPORATION
2200 Mission College Boulevard MS: RNB 4 150 Santa Clara California 95052

Inventors

1. GARDNER Donald S.
180 Larsens Landing Los Altos California 94022
2. PINT Cary L.
804 Hancock Street Apt. 620 Hayward California 94544
3. HOLZWARTH Charles W.
305 Elan Village Lane Apt. #222 San Jose California 95134
4. JIN Wei
414 Hogarth Terrace Sunnyvale California 94087
5. CHEN Zhaohui
1589 Treviso Avenue San Jose California 95118
6. LIU Yang
425 Waupelani Drive Apt. 225 State College Pennsylvania 16801
7. HANNAH Eric C.
3046 Strawberry Hill Pebble Beach California 93953
8. GUSTAFSON John L.
964 Piemonte Drive Pleasanton California 94566

Specification

1. A method of making a charge storage structure, the method comprising:
forming pores (104) in a low-purity silicon substrate (100) to form a low purity
porous silicon structure (102) wherein the low purity silicon substrate has a purity of 99.9999 percent or less purity of silicon; and
forming an electrochemical capacitor (124) comprising one of (1) a first low purity porous silicon structure (110) and a second low purity porous silicon structure (120) separated by an electrical insulator (130) comprising a dielectric material or (2) a first low purity porous silicon section and a second low purity porous silicon section separated by an electrical insulator comprising a dielectric material (113).
2. The method as claimed in claim 1 comprising wherein the pores comprise a depth of up to about 300 microns.
3. The method as claimed in claim 1 comprising forming an electrically conductive material within the pores, wherein the electrically conductive material lines the pores.
4. The method as claimed in claim 3 comprising wherein the electrically conductive material is formed by an atomic layer deposition process.
5. The method as claimed in claim 4 wherein the electrically conductive material is formed using one of a roll to roll process and a batch process.
6. The method as claimed in claim 4 wherein the atomic layer deposition process flows through the low purity porous silicon structure.
7. The method as claimed in claim 3 comprising forming a dielectric material on the electrically conductive material.
8. The method as claimed in claim 3 comprising wherein the electrically conductive material comprises at least one of tungsten, aluminum, copper, nickel, iron, cobalt, carbon, palladium, ruthenium, tin, aluminum titanium nitride, titanium nitride,

tungsten nitride, tantalum nitride, tungsten titanium nitride, titanium silicon nitride, tungsten silicon nitride, titanium boron nitride, and molybdenum nitride.
9. The method as claimed in claim 1 comprising forming a dielectric material
within the pores.
10. The method as claimed in claim 9 comprising forming an electrically
conductive material on the dielectric material.
11. The method as claimed in claim 9 comprising wherein the dielectric material comprises a high k dielectric material.
12. The method as claimed in claim 1 comprising wherein the charge storage structure comprises a portion of an electrochemical capacitor structure.
13. The method as claimed in claim 1 comprising using an electrolyte to form an electrical double layer within a pore, and wherein the pore comprises a channel of the electrical double layer.
14. The method as claimed in claim 1 comprising wherein the low purity substrate comprises one of metallurgical grade silicon and polysilicon, wherein the electrochemical capacitor structure comprises a microelectronic electrochemical capacitor.
15. The method as claimed in claim 1 comprising wherein the low purity porous silicon structure includes one of a p-type dopant and n-type dopant.
16. The method as claimed in claim 1 wherein the pore comprises a tapered structure.
17. The method as claimed in claim 1 wherein the pores are formed by one of electrochemical etching, anodization and stain etching.

18. The method as claimed in claim 17 wherein the electrochemical etching comprises a batch electrochemical etching process.
19. A method comprising:
forming pores (104) in a low-purity silicon substrate (100) to form a low purity porous silicon structure (102), wherein the charge storage structure comprises a portion of an electrochemical capacitor (4030) structure, wherein the low purity silicon substrate has a purity of 99.9999 percent or less purity of silicon and the electrochemical capacitor structure comprises a first low purity porous silicon structure and a second low purity porous silicon structure separated by an electrical insulator comprising a dielectric material (113) .
20. The method as claimed in claim 19 comprising forming the electrochemical capacitor structure by forming the first low purity porous silicon structure and second low purity porous silicon structure separated by the electrical insulator.
21. The method as claimed in claim 19 wherein the electrical insulator is capable of ionic conduction.
22. The method as claimed in claim 21 comprising forming at least one of a refractory metal oxide, a refractory metal nitride, and a refractory metal carbide on one of the first low purity porous silicon structure and the second low purity porous silicon structure
23. The method as claimed in claim 22 wherein the electrochemical capacitor comprises a pseudo capacitor.
24. A method of making charge storage structure, the method comprising:
forming pores (104) in the low purity silicon particles to form low purity porous
silicon structure (110) wherein the low purity silicon substrate has a purity of 99.9999 percent or less purity; and

25. The method as claimed in claim 24 wherein the low purity substrate comprises
one of metallurgical grade silicon and polysilicon, and wherein the electrochemical
capacitor comprises a microelectronic electrochemical capacitor.
26. A method of making a charge storage structure, the method comprising,
forming pores (104) in a low purity silicon substrate to form a low purity porous
silicon structure, wherein the charge storage structure comprises a portion of an electrochemical capacitor structure (124), wherein the low purity silicon substrate has a purity of 99.9999 percent or less purity;
forming an electrochemical capacitor comprising a low purity porous silicon structure and an electrical insulator comprising a dielectric material (113), and
forming at least one of a refractory metal oxide, a refractory metal nitride and a refractory metal carbide on one of the low purity porous silicon structure.
27. The method as claimed in claim 26 wherein the low purity substrate comprises one of metallurgical grade silicon and polysilicon, and wherein the electrochemical capacitor comprises a microelectronic electrochemical capacitor.

Documents

Application Documents

# Name Date
1 IPO drawing INTL-433-IN.pdf 2014-05-06
2 FORM 2 for efiling INTL-433-IN.pdf 2014-05-06
3 3385-CHENP-2014.pdf 2014-05-09
4 abstract3385-CHENP-2014.jpg 2015-01-27
5 3385-CHENP-2014-FER.pdf 2018-05-31
6 3385-CHENP-2014-Information under section 8(2) (MANDATORY) [21-06-2018(online)].pdf 2018-06-21
7 3385-CHENP-2014-FORM 3 [22-06-2018(online)].pdf 2018-06-22
8 3385-CHENP-2014-FORM-26 [17-09-2018(online)].pdf 2018-09-17
9 3385-CHENP-2014-OTHERS [19-09-2018(online)].pdf 2018-09-19
10 3385-CHENP-2014-FER_SER_REPLY [19-09-2018(online)].pdf 2018-09-19
11 3385-CHENP-2014-DRAWING [19-09-2018(online)].pdf 2018-09-19
12 3385-CHENP-2014-CLAIMS [19-09-2018(online)].pdf 2018-09-19
13 3385-CHENP-2014-ABSTRACT [19-09-2018(online)].pdf 2018-09-19
14 Correspondence by Agent_Power of Attorney_24-09-2018.pdf 2018-09-24
15 Correspondence by Agent_Form 5_01-10-2018.pdf 2018-10-01
16 3385-CHENP-2014-Proof of Right (MANDATORY) [26-11-2018(online)].pdf 2018-11-26
17 3385-CHENP-2014-PETITION UNDER RULE 137 [26-11-2018(online)].pdf 2018-11-26
18 Correspondence by Agent_Proof of Right_29-11-2018.pdf 2018-11-29
19 3385-CHENP-2014-HearingNoticeLetter-(DateOfHearing-27-11-2019).pdf 2019-10-30
20 3385-CHENP-2014-Written submissions and relevant documents (MANDATORY) [12-12-2019(online)].pdf 2019-12-12
21 3385-CHENP-2014-FORM 13 [12-12-2019(online)].pdf 2019-12-12
22 3385-CHENP-2014_Marked up Claims_Granted 328893_03-01-2020.pdf 2020-01-03
23 3385-CHENP-2014_Drawing_Granted 328893_03-01-2020.pdf 2020-01-03
24 3385-CHENP-2014_Description_Granted 328893_03-01-2020.pdf 2020-01-03
25 3385-CHENP-2014_Claims_Granted 328893_03-01-2020.pdf 2020-01-03
26 3385-CHENP-2014_Abstract_Granted 328893_03-01-2020.pdf 2020-01-03
27 3385-CHENP-2014-PatentCertificate03-01-2020.pdf 2020-01-03
28 3385-CHENP-2014-IntimationOfGrant03-01-2020.pdf 2020-01-03
29 3385-CHENP-2014-RELEVANT DOCUMENTS [25-09-2021(online)].pdf 2021-09-25
30 3385-CHENP-2014-RELEVANT DOCUMENTS [24-09-2022(online)].pdf 2022-09-24
31 3385-CHENP-2014-POWER OF AUTHORITY [07-01-2023(online)].pdf 2023-01-07
32 3385-CHENP-2014-FORM-16 [07-01-2023(online)].pdf 2023-01-07
33 3385-CHENP-2014-ASSIGNMENT WITH VERIFIED COPY [07-01-2023(online)].pdf 2023-01-07
34 3385-CHENP-2014-RELEVANT DOCUMENTS [28-09-2023(online)].pdf 2023-09-28

Search Strategy

1 search_3385chenp2014_24-05-2018.pdf

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