Claims:1. A system for indication of fault in an electrical switching unit, said system comprising:
at least one electronic trip unit;
at least one trip record controller unit;
at least one trip status indicator circuit module, communicably coupled to said electronic trip unit at one end and said trip record controller unit at other end;
wherein, said trip status indicator circuit module comprising:
at least three data communication lines, to provide fault indication information from said electronic trip unit to said trip record controller unit;
at least one trip intimation communication line, to enable said trip record controller unit to sense fault condition in an electrical circuit;
at least one CLEAR communication line, to carry input command related to Clear data related to said fault indication information pre- stored in said trip record controller unit; and
at least one supply line, multiplexed with at least one auxiliary power supply and said trip record controller unit;
at least one query switch means and at least one clear switch means, wherein said query switch means actuated to enable said trip record controller unit to detect fault indication and read said pre-store fault indication information, and said clear switch means actuated to provide said input command related to Clear said data pre-stored in said trip record controller unit.
2. The system as claimed in claim 1, wherein said supply line adapted to power ON said auxiliary power supply and said trip record controller unit, to enable said trip record controller unit to sense fault condition and store data, after said electronic trip unit switches OFF due to said fault condition in said electrical circuit.

3. The system as claimed in claim 1, wherein said trip record controller unit adapted to read said fault indication information provided on said data lines and thereby adapted to store said fault indication information in a memory in said trip record controller unit.

4. The system as claimed in claim 3, wherein said trip record controller unit adapted to read said fault indication information stored in a memory after said Query switch means is actuated, and thereby display said fault indicator information by means of at least one display.

5. The system as claimed in claim 1, wherein said data lines adapted to carry a 3 bit pattern of said fault indication information to said trip record controller unit.

6. The system as claimed in claim 1, wherein said trip record controller unit operates in a low power mode during idle condition so as to lower the overall power consumption of said mechanism.

7. The system as claimed in claim 1, enables indication of fault selected from earth Fault, Overload, Short-Circuit and Instantaneous tripping or any combination thereof.

8. The system as claimed in claim 1, wherein said trip intimation communication line is a Query communication line activated by said query switch means, to enable said trip record controller unit to sense fault condition.

9. A method for operating a fault indicator mechanism in an electrical switching unit according to claims 1 to 8, said method comprising:

charging, by a supply line in a trip status indicator circuit module, at least one auxiliary power supply and at least one trip record controller unit so as to enable said trip record controller to operate after an electronic trip unit switches off due to a fault condition;

monitoring, by means of said trip record controller unit, at least one transition of a clear communication line with respect to at least clear switch means, and thereby monitoring state of query communication line with respect to at least one query switch means, wherein if said clear communication line transit from high to low and state of said query communication line is low, then said trip record controller unit configured to store, by means of memory, fault indication information provided on at least three data communication line; and
if said state of query communication line is high, said trip record controller unit configured to read said fault indication information from said memory;

actuating said clear switch means, for enabling said trip record controller unit to clear pre-store fault indication information from said memory.
, Description:TECHNICAL FIELD

[001] The present subject matter described herein, in general, relates to trip status indicator mechanism, and more particularly, to a method of indicating the Fault in which the microprocessor based circuit breaker has tripped after the circuit breaker has opened.

BACKGROUND

[002] A Circuit Breaker is a manually or automatically operated electrical switch designed to protect an electrical circuit from damage caused by overload or short circuit. One variant of Circuit breakers are microprocessor based circuit breakers. These Circuit Breakers make use of an Electronic Trip unit as the nucleus of sensing the fault condition. An electronic trip unit is an intelligent device that is used in conjunction with an electro-mechanical circuit breaker to measure system parameters that may include but not limited to voltage, current, power, and protect an electrical system against faults such as overload, short circuit, earth fault, and the like and control the electro mechanical device in cases of occurrences of faults.

[003] On arrival of a fault condition, the electronic trip unit, which is the heart of the microprocessor based circuit breaker, senses the fault and issues a trip command to an electromechanical device, which in-turn opens the mechanical assembly of the circuit breaker, thus protecting the system from damage caused by the fault condition.

[004] In order to take further action, it is often observed that operators on site, want to know that specific fault condition under which the breaker has tripped. Hence, there is a need for installing a mechanism to indicate the fault under which the breaker has tripped.

[005] Conventionally, the manufactures of circuit Breaker provide trip indication feature to their high end products. These High end products capture a very small section of the consumers and thus, the larger number of consumers who wish to go for low cost circuit breakers are devoid of this feature. A very obvious reason for incorporating the trip indication feature for products that are “feature based”, that is to say that products that have a wide variety of features apart from the basic protections (high end products) would be the intricacy of the circuit used and power consumption, which in turn is directly related to the amount of cost involved in the circuit creation.

[006] Reference is made to prior art document US6894478B1, that discloses a fault indicator for indicating the occurrence of a fault in an electrical conductor has a housing, a high capacity battery, a display for indicating the occurrence of a fault, a current sensor for sensing the load current in a monitored conductor a microcontroller for determining the load current, for selecting one of a plurality of trip settings, such as in several steps between 50 A and 1200 A, based upon the determined load current and for determining that a fault condition occurred when the load current exceeds the trip setting. The selected trip setting is stored in memory. The load current is periodically sampled and the trip setting is changed if the load current falls in a different range.

[007] Reference is made to prior art document US5089928, discloses a fault-powered, processor-based circuit breaker tripping system employs a reliable low power trip indicator circuit that is normally powered from the tripping system. A liquid crystal display is used to indicate the status of the system, and a battery is used as a secondary power source after a trip terminates the power to the system. The battery is enabled by a manual switch or by a latch which responds to one of a plurality of trip signals from the processor. The latch also provides signals to a driver circuit to drive the LCD. Once enabled, the battery provides power to the latch and the LCD so that the cause of the trip may be displayed during a power fault. The manual switch can be used to select status signals to be displayed on the LCD, and to indicate the condition of the battery.

[008] Reference is made to prior art document US5136458 A, discloses processor-based tripping system uses a precise three phase current detection circuit using a minimal number of components. A set of current sensors is situated adjacent the current path to sense respective phases of current therein. The current sensors provide respective current signals therefrom which are fed to a ground fault transformer. The ground fault transformer includes input inductors connected to respective ones of the current sensors such that current flowing through each respective current sensor also flows through one of the input inductors. An output inductor in the ground fault transformer is coupled with the input inductors for adding the current signals from the current sensors and for producing an output current signal in the presence of a ground fault. The output current signal is then rectified to provide a rectified signal corresponding to the output current. The processor receives the rectified signal to detect the ground fault in the three phase current path and provides a trip signal to a solenoid to break the current path. The ground fault transformer also includes a test input inductor for receiving an external AC signal to simulate a ground fault.

[009] Thus, in view of the existing tripping mechanism, there is a necessity of a trip circuit mechanism that features the fault condition under which the breaker has tripped in, which is simple, consumes low power and is highly cost effective. There is also a need for solution which is compact and very well incorporated in the ultra-low cost designs of Microprocessor based Circuit Breakers.

SUMMARY OF THE INVENTION

[0010] The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the present invention. It is not intended to identify the key/critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concept of the invention in a simplified form as a prelude to a more detailed description of the invention presented later.

[0011] An object of the present invention is to provide a fault indication mechanism for microprocessor based circuit breaker which incorporates low power consuming units and which is cost effect and highly reliable.

[0012] According to one aspect, the present invention provides a system for indication of fault in an electrical switching unit, said system comprising: at least one electronic trip unit; at least one trip record controller unit; at least one trip status indicator circuit module, communicably coupled to said electronic trip unit at one end and said trip record controller unit at other end;
wherein, said trip status indicator circuit module comprising:
at least three data communication lines, to provide fault indication information from said electronic trip unit to said trip record controller unit;
at least one trip intimation communication line, to enable said trip record controller unit to sense fault condition in an electrical circuit;
at least one CLEAR communication line, to carry input command related to Clear data related to said fault indication information pre- stored in said trip record controller unit; and
at least one supply line, multiplexed with at least one auxiliary power supply and said trip record controller unit;
at least one query switch means and at least one clear switch means, wherein said query switch means actuated to enable said trip record controller unit to detect fault indication and read said pre-store fault indication information, and said clear switch means actuated to provide said input command related to Clear said data pre-stored in said trip record controller unit.
[0013] In second aspect, the present invention provides a method for operating a fault indicator mechanism in an electrical switching unit as mentioned above, said method comprising:
• charging, by a supply line in a trip status indicator circuit module, at least one auxiliary power supply and at least one trip record controller unit so as to enable said trip record controller to operate after an electronic trip unit switches off due to a fault condition;
• monitoring, by means of said trip record controller unit, at least one transition of a clear communication line with respect to at least clear switch means, and thereby monitoring state of query communication line with respect to at least one query switch means, wherein if said clear communication line transit from high to low and state of said query communication line is low, then said trip record controller unit configured to store, by means of memory, fault indication information provided on at least three data communication line; and if, said state of query communication line is high, said trip record controller unit configured to read said fault indication information from said memory;
• actuating said clear switch means, for enabling said trip record controller unit to clear pre-store fault indication information from said memory.

[0014] Other aspects, advantages, and salient features of the invention will become apparent to those skilled in the art from the following detailed description, which, taken in conjunction with the annexed drawings, discloses exemplary embodiments of the invention.

BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS

[0015] The above and other aspects, features, and advantages of certain exemplary embodiments of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings in which:

[0016] Figure 1 depicts a block diagram of the electronic trip unit interfaced with the Trip status indicator circuit, specifically the interface between the Main controller and the Trip record Controller, according to one embodiment of the present invention.
[0017] Figure 2 depicts the circuit used to provide an auxiliary supply to the Trip record Controller under Trip Condition, according to one embodiment of the present invention.
[0018] Figure 3 illustrates a flowchart describing the activities undertaken by the Trip Record Controller at the time of Power up, according to one embodiment of the present invention.
[0019] Figure 4 is a flowchart describing the Run-Time operation of Trip Record Controller, according to one embodiment of the present invention.
[0020] Figure 5 is a flowchart describing the overall operation of the Trip Record Controller, according to one embodiment of the present invention
[0021] Figure 6 is a flowchart which depicts the operation of the Electronic Trip Unit for the fault indication, according to one embodiment of the present invention.
[0022] Figure7 is a timing diagram depicting status of output pins for fault indication of the Electronic Trip Unit, according to one embodiment of the present invention.

[0023] Persons skilled in the art will appreciate that elements in the figures are illustrated for simplicity and clarity and may have not been drawn to scale. For example, the dimensions of some of the elements in the figure may be exaggerated relative to other elements to help to improve understanding of various exemplary embodiments of the present disclosure. Throughout the drawings, it should be noted that like reference numbers are used to depict the same or similar elements, features, and structures.

DETAILED DESCRIPTION OF THE PRESENT INVENTION

[0024] The following description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of exemplary embodiments of the invention. It includes various specific details to assist in that understanding but these are to be regarded as merely exemplary.

[0025] Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope of the invention. In addition, descriptions of well-known functions and constructions are omitted for clarity and conciseness.

[0026] The terms and words used in the following description and claims are not limited to the bibliographical meanings, but, are merely used by the inventor to enable a clear and consistent understanding of the invention. Accordingly, it should be apparent to those skilled in the art that the following description of exemplary embodiments of the present invention are provided for illustration purpose only and not for the purpose of limiting the invention as defined by the appended claims and their equivalents.

[0027] It is to be understood that the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise.

[0028] By the term “substantially” it is meant that the recited characteristic, parameter, or value need not be achieved exactly, but that deviations or variations, including for example, tolerances, measurement error, measurement accuracy limitations and other factors known to those of skill in the art, may occur in amounts that do not preclude the effect the characteristic was intended to provide.

[0029] Features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments and/or in combination with or instead of the features of the other embodiments.

[0030] It should be emphasized that the term “comprises/comprising” when used in this specification is taken to specify the presence of stated features, integers, steps or components but does not preclude the presence or addition of one or more other features, integers, steps, components or groups thereof.

[0031] It is also to be understood that the term “module” is used in the specification to indicate an apparatus, unit, component and the like. The term “means” when used in the specification is taken to specify the mode by which desired result is achieved.

[0032] The present invention can be implemented with an electrical switching system that may include but not limited to, circuit breakers or thermo-magnetic breaker, molded case circuit breaker (MCCB) residual circuit breaker (RCB), earth leakage circuit breaker (ELCB) and the like.

[0033] This invention relates generally to a method and system of indicating the Fault in which the microprocessor based circuit breaker has tripped after the circuit breaker has opened. In one embodiment, the Fault indication is carried out with the help of an auxiliary microprocessor, powered using a super capacitor circuit logic, which works in low power mode. The fault is indicated by means of display which includes but not limited to LED display.

[0034] In one embodiment, reference is made to figure 1, which depicts a block diagram of the electronic trip unit (8) interfaced with the Trip status indicator circuit module, specifically the interface between the Main controller (1) and the Trip record Controller (6). It can be clearly identified that Trip status indicator circuit module has six signal lines leaving the Electronic Trip unit (8). These lines are Three Data lines, namely A0, A1, A2, denoted by (2),(3),(4) respectively, one Trip intimation Line, CLEAR (5) and Supply lines (Vcc) (10) and GND (9). The Supply lines will be multiplexed with the Auxiliary power Supply section (7) and Trip Record Controller unit (6).

[0035] In one embodiment, under normal working condition, when the Electronic Trip Unit (8) in the Circuit Breaker is not sensed any fault, the 3.3V Vcc (10) generated from the Electronic trip unit performs two major functions. Firstly, Vcc, (10), generated from the Electronic trip Unit, (8), charges the Capacitor which can be placed in the Auxiliary Power Supply Section (7) , which behaves as the auxiliary supply once the circuit breaker has tripped. This section of the Auxiliary Power Supply (7) is explained in detail in figure 2. Simultaneously, while the Auxiliary Power Supply is being built up, Vcc, (10) will also Power up the Trip Record Controller (6), keeping it ready to sense the fault condition and store the data before the Main Controller (1) Powers Down,

[0036] Reference is made to figure 2, which depicts the Auxiliary Power Supply unit (7) in detail. The Vcc (10) will be fed to this section by the Electronic Trip unit (8). Under Normal Working condition, when the Circuit Breaker is not sensed any Fault condition and thus has not tripped, Vcc (10) takes a dual path strategy. Firstly, it Powers up the Trip Record Controller unit (6) by passing through Diode D2 and entering the Trip Record Controller (6) under the denotation of “Vcc_Trip Record Controller”. Simultaneously, Vcc, (10) from the Electronic Trip Unit, (8) charges Capacitor C1 through the Charging Circuit via Resistor R1.

[0037] In one embodiment, once the Circuit Breaker senses a Fault Condition and trips, the primary line of VCC, (10) via Diode D2 is disabled and thus the Trip Record Controller unit, (6) will be Powered OFF. In order to find out the Fault Condition under which the Circuit Breaker has tripped, the operator will press the “QUERY” button as shown in figure 2. When The “QUERY” button will be pressed, the Capacitor C1, which was initially charged to a value equivalent to VCC (10) will begin to discharge through schottky diode D3 which acts as an “OR” gate for the Clear and Query buttons. The discharge signal from the capacitor then acts as “VCC_Trip Record Controller”, powering ON the Trip Record Controller unit (6). It also gives a logic ”High” signal at the Query line, which then will be read by the Trip Record Controller unit (6) to display the data stored in the Memory.

[0038] In one embodiment, to clear out the Fault Condition under which the Circuit Breaker has tripped, the operator will press the “CLEAR” button as shown in figure 2. When The “CLEAR” button will be pressed, the Capacitor C1, which was initially charged to a value equivalent to VCC (10) will begin to discharge through schottky diode D3. It will then act as “VCC_Trip Record Controller”, powering ON the Trip Record Controller unit (6). It also gives a logic ”High” signal at the Clear line, which then is read by the Trip Record Controller unit (6) to Clear the data stored in the Memory.

[0039] In one embodiment, the figure 3 depicts the series of activities carried out by the TRIP Record Controller unit (6) on Power up. Immediately after powering on, the Trip Record Controller unit (6) performs a status check on its input lines. The Trip Record Controller unit (6) will first check the status of CLEAR pin (11). If it will be logic “HIGH”, it will clear the last saved fault indication data from its memory unit (12). If CLEAR (11) will be logic “LOW”, it will move ahead to check the status of QUERY pin (13). A logic “HIGH” signal on this pin will indicate the QUERY is being pressed by the operator. In this case the Trip Record Controller unit (6) can display the last saved Fault Indication data on its LEDs (14). No action will be performed by the Trip Record Controller (6) in the case of QUERY pin (13) is logic “LOW”.

[0040] In one embodiment, the flowchart of figure 4 explains the sequence of operations that can be performed continuously by the Trip Record Controller unit (6) after the completion of power-up activities. The Trip Record Controller (6) continuously monitors the CLEAR pin (11) for a transition (16). On detecting a logic “HIGH” to logic “LOW” transition (16), it checks the status of QUERY pin (13). If the state of the QUERY pin (13) is logic “LOW”, the Trip Record Controller unit (6) stores the type of fault that has occurred depending on the fault indication data received on its input lines A0, A1, A2, denoted by (2), (3), (4) respectively from the Electronic Trip Unit (8). The fault indication data can be a 3-bit pattern which is unique to the fault which has occurred, that may include, Earth Fault, Overload, Short-Circuit and Instantaneous tripping or any combination thereof. Any other pattern is simply discarded by the Trip Record Controller unit (6). On the other hand, if a logic “HIGH” signal will be detected on the QUERY pin (13) the Trip Record Controller (6) will display the last saved fault indication data on its LEDs (14).

[0041] In one embodiment, on detecting a logic “LOW” to logic “HIGH” transition on the CLEAR pin (11) the Trip Record Controller (6) clears the last saved fault indication data from the memory (12). The flowchart depicted in figure 5 shows the operation of the Trip Record Controller unit (6). It goes through the following stages of operation- After powering ON (17), Trip Record Controller (6) performs the activities at power up (18). After this it goes into the Low Power mode (19) during idle condition. On waking up, it performs the run time activities (20) and again goes into the Low Power mode (19). The actions of run time (20) and Low Power mode (19) will be continuously performed by the Trip Record Controller unit (6).

[0042] In one embodiment, as shown in figure 6, the flowchart depicts the activities to be performed by the Electronic Trip Unit (8) for the fault indication. The Electronic Trip Unit (8) will continuously checks for a tripping condition to occur (21). Once any one of the above mentioned trip condition occurs, the Electronic Trip Unit (8) will send the unique pattern indicating the type of fault on its output pins A0,A1,A2 and will enable the CLEAR pin (11) logic “LOW” (22). This can be done just before the Electronic Trip Unit (2) issues the trip command to the breaker. At power up, the CLEAR pin, (11) will be made logic “HIGH” by the Electronic Trip Unit (2).

[0043] In one embodiment, as shown in figure 7 is a timing diagram for the Electronic Trip Unit indicating the status of output lines for fault indication, i.e, A0, A1, A2, denoted by (2), (3), (4) respectively and CLEAR (5). As shown in the timing diagram, the Electronic Trip Unit senses a fault at time t1 and issues the trip command. The breaker finally trips at time instant t2. Under normal running conditions of the Electronic Trip Unit (8) the Power line (22) is logic “HIGH”. It goes to logic “LOW” once the breaker trips. The CLEAR line (11) will be made high by the Electronic Trip Unit, (8) at power up and continues to stay high till a fault condition will be sensed by the Electronic Trip Unit (8). At this point CLEAR pin (11) will be made logic “LOW” and it will continue to stay logic “LOW” till the next power up of the Electronic Trip Unit (8) or it is externally made logic “HIGH” by pressing the CLEAR button. The output lines A0, A1, A2, denoted by (2), (3), (4) respectively are initialized as logic “LOW” on power up by the Electronic Trip Unit (8) and remain at logic “LOW” till a fault occurs. After a fault is sensed, the unique pattern of fault indication will be forced on these lines and they will be made high or low accordingly. The lines A0, A1, A2, will be denoted by (2), (3), (4) respectively retain their states till the breaker trips.

[0044] In one embodiment, the operation of the Trip Record Controller,6 can be summarized by considering the following scenarios. If the CLEAR pin, (11) is logic “LOW” and the user has not pressed the QUERY, (13), the Trip Record Controller unit (6) remains idle and does not do anything. In the case of QUERY (13) being pressed while the CLEAR (11) is still logic “LOW”, the Trip Record Controller unit (6) reads the fault indication data stored and displays on its LEDs (14). If the CLEAR pin, (11) is logic “HIGH” the Trip Record Controller unit (6) clears the last saved fault indication data, irrespective of the status of the QUERY pin, (13). In the event of a fault being sensed by the Trip Record Controller unit (6), CLEAR pin, (11) undergoes a transition from logic “HIGH” to logic “LOW” which will be caused by the Electronic Trip Unit (8). Under this condition, if the user presses the QUERY, (13) button the Trip Record Controller (6) will read the fault indication data stored and displays the fault type on its LEDs (14). Otherwise, as the QUERY pin, (13) will be logic “LOW”, the Trip Record Controller unit (6) will read the pattern of fault indication present on its input pins A0, A1, A2, denoted by (2), (3), (4) respectively and stores the type of fault in its memory. A transition from logic “LOW” to logic “HIGH” on the CLEAR pin (11) will enable the Trip Record Controller unit (6) to erase the last saved fault indication data from its memory, irrespective of whether QUERY (13) is pressed or not.

[0045] In one embodiment, the Trip Record Controller unit (6) operates at “Low Power mode”. In the Low Power mode (19), the high-speed system clock oscillator and high-speed on-chip oscillator stop, stopping the whole system, thereby considerably reducing the CPU operating current, hence lowering the overall power consumption of the microcontroller. The Trip Record Controller unit (6) will remain in the Low Power mode (19) when it is not performing any activity. It wakes up intermittently from this mode on occurrence of an interrupt request, performs the necessary operations and goes back into the Low Power mode (19).

[0046] The scope of this invention is not limited to a particular method but on the contrary, the intention is to cover all the modifications, equivalents and alternatives to the invention disclosed here within.

[0047] Some of the advantages of the present invention, are as follows:
• The incorporation of the feature of Fault indication involves interface with the main Micro controller. This interface has been made very simple and easy to implement.
• The Fault indication Circuit is made compact. The minimalistic usage of components to provide the solution caters to two major benefits. Firstly, the cost of the circuit is greatly reduced and secondly, the dependency of the functioning of the circuit on different components is reduced, hence increasing reliability and repeatability of the circuit.
• The Fault indication functionality incorporates Low Power consuming devices/design, which has a ripple effect eventually reducing the cost. The Low Power consumption design also reduces the bulkiness of the components that would be required to sustain higher power requirements. This feature also extends the functionality of fault indication.
• Ease of use. Fault indication is available by single button press.

[0048] It is to be understood, that the system of the present invention can be implemented as an “add on” feature and can be incorporated in variants of circuit breakers as well like Air circuit Breakers etc. However, it would be worth noting that since this solution is a low cost solution, the design provides an indication of fault for a limited amount of time and does not provide distinct parameters like the fault current and the like. Thus this design can very well be incorporated in high end products however, high end products may require features like fault current and availability of the fault indication for a larger duration. In such a scenario, the above design can be modified for the specific functionality.

[0049] Although a fault indicator system in circuit breaker and a method thereof have been described in language specific to structural features and/or methods, it is to be understood that the embodiments disclosed in the above section are not necessarily limited to the specific features or methods or devices described. Rather, the specific features are disclosed as examples of implementations of the fault indicator system in circuit breaker and a method thereof.