THE PATENTS ACT, 1970
(39 of 1970)
&
THE PATENTS RULES, 2003
COMPLETE SPECIFICATION
(See section 10 and rule 13)
TITLE: “FILTERING DISCRETE TIME SIGNALS USING A NOTCH FILTER”
NAME OF THE APPLICANT AND ADDRESS:
INDIAN INSTITUTE OF SCIENCE, Bangalore 560012, Karnataka, India.
NATIONALITY: Indian
The following specification particularly describes the nature of this invention and the manner in
which it is to be performed.
2
BACKGROUND
[0001] Digital signal processing (DSP) is a technical field concerned with the
representation of continuous analog signals by a sequence of discrete numbers or symbols and
the processing of such discrete sequences. DSP algorithms may be performed by standard
computers, computing devices or microprocessors, by specialized processors called digital
signal processors (DSPs), or on specialized hardware such as application-specific integrated
circuit (ASICs). In addition, digital signal processing may be performed on more powerful
general purpose microprocessors, field-programmable gate arrays (FPGAs), digital signal
controllers (mostly for industrial application such as motor control), and stream processors,
among others.
[0002] Oftentimes, a DSP system incorporates one or more digital filters. A digital
filter is a system that performs mathematical operations on a sampled, discrete time signal (e.g.
sequence of digital samples) to reduce or enhance certain aspects of that signal. For example, a
high pass digital filter may be used to suppress or reduce low frequency components of a signal
and enhance or amplify high frequency components. Conversely, a low pass digital filter may
be used to suppress or reduce high frequency components of a signal and enhance or amplify
low frequency components. A further example may be a notch digital filter that suppresses or
reduces a specific frequency component or a small range of frequency components of a digital
signal. An application for such a notch filter may be reducing the 60 Hz frequency component
that is introduced as noise due to electrical power lines.
3
SUMMARY
[0003] The LSF-Model of a sequence translates a causal finite length sequence into sets
of AH-sequences and a few complex constants based on a set of model parameters and a
spectral decomposition principle. From the spectral decomposition principles used for LSF
Models, a Canonic Filter Module (CFM) is identified, which can be configured to realize a
finite impulse response which is an AH/MP/NP/SM/LP-sequence. A single CFM block may be
configured to implement all types of discrete time filters. Further, the CFM can also be
configured to realize any stable discrete time filter with a rational transfer function defined with
finite number of zeros and poles.
[0004] The basic building block of a CFM is a notch filter with transfer function (i) (1-
ej2παz-1), (ii) (1-2cos(2πα)z-1+z-2) defined by a single notch frequency at 2α [radians]. As these
two notch filter blocks are also lattice stages ((i) LU, (ii) LV), they are also robust to quantization
noise. Hence the CFM structure is not only modular but also robust to quantization noise. As the
CFM is a basic module of any discrete time filter, its optimal realization effectively results in an
optimal realization of any discrete time filter. As the notch filter LU utilizes a Rotate-and-
Accumulate (RAC) operation (α≠{½, 0}), one can also use CORDIC algorithms for realizing
LU. The notch filter LV requires a real Multiply-And-Accumulate (RMAC) operation. As Notch
filters serve as basic building blocks in time domain filtering operations, we believe the Notch
filters are as fundamental to filtering as NAND gates are to logic circuits. That is, as a NAND
gate is a building block of any combinatorial logic circuit, a Notch filter defined by an LSF also
serves as a basic building block of any discrete time filter (FIR/IIR).
[0005] Within embodiments described herein, a method for determining a digital filter
structure is disclosed. The structure comprises a lattice filter structure derived from an LSF4
Model of a causal finite length sequence. The structure can be implemented by a Canonic Filter
Module (CFM) which uses two types of basic lattice stages that are notch filters defined by a
single notch frequency. The filter structure, apart from its modularity, is also robust to coefficient
quantization noise, which is desirable in many practical signal processing systems. Further, the
notch filter lattice structures are each configured with a single input node and single output
node.
[0006] One method described herein includes obtaining a transfer function for a digital
filter in the form of one or more filter components. The filter components include an
annihilating component, a minimum phase component, a non-minimum phase component, and a
symmetric component, although not every component may be present for a given desired filter.
Each filter component is implemented as a set of interconnected notch filters. In addition, each
set of notch filters may include at least one of a first notch filter having a half-lattice structure
and a second notch filter having a full lattice structure.
[0007] The method may further include implementing each filter component as a series
and/or parallel combination of one or more first notch filters and one or more second notch
filters. For example, the annihilating component may be a series combination of one or more
first notch filters and one or more second notch filters. As another example, the minimum
phase component, the non-minimum phase component, and the symmetric component may be a
parallel or series-parallel combination of one or more first notch filters and one or more second
notch filters. Additionally, the method may include decomposing a filter component, such as
the minimum phase component, the non-minimum phase component, and the symmetric
component, into annihilating subcomponents such that the annihilating subcomponents include
one or more first notch filters and one or more second notch filters.
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[0008] Also, the method may include using a canonic filter module structure to define or
implement at least one of the annihilating component, the minimum phase component, the nonminimum
phase component, and the symmetric component. Further, the method may determine
lattice coefficients of the first notch filter and the second notch filter for each set of notch filters.
In addition, the method may generate a data structure defining the digital filter structure.
[0009] Another embodiment of the present disclosure includes a device for filtering
digital signals. The device may include a processor having one or more function modules. The
function modules may include an annihilating function module, a minimum phase function
module, a non-minimum phase function module, and a symmetric function module. Further,
each function module may include a set of interconnected notch filters such that each set of
notch filters includes at least one of a first notch filter having a half-lattice structure and a
second notch filter having a full lattice structure. In addition, the device may include a memory
coupled to the processor and storing sets of half-lattice and full-lattice coefficients respectively
corresponding to each set of interconnected notch filters.
[0010] The function modules may include series and/or parallel or series-parallel
combination of one or more first notch filters and one or more second notch filters. For
example, the annihilating function module may include a series combination of one or more
first notch filters and one or more second notch filters. As another example, the minimum
phase function module, the non-minimum phase function module, and the symmetric function
module may include a series, parallel, or a series-parallel combination of one or more first notch
filters and one or more second notch filters. Further, the device may include a canonic filter
function module configured to be a function module such as an annihilating function module, a
minimum phase function module, a non-minimum phase function module, and a symmetric
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function module.
[0011] Additionally, the first notch filter having a half-lattice structure may include a
first delay circuit, a first multiplier circuit, and a first adder circuit. Alternatively, the second
notch filter having a full-lattice structure may include a second delay circuit and a third delay
circuit, a second multiplier circuit and a third multiplier circuit, and a second adder circuit, a
third adder circuit, and a fourth adder circuit.
[0012] Another embodiment includes an article of manufacture including a computer
readable medium having instructions stored thereon that, in response to execution by a
computing device, cause the computing device to perform operations comprising: obtaining a
transfer function for a digital filter in the form of one or more filter components including an
annihilating component, a minimum phase component, a non-minimum phase component, and a
symmetric component; and for each of the one or more filter components, representing each of
the filter component as a set of interconnected notch filters, wherein each set of notch filters
includes at least one of a first notch filter having a half-lattice structure, and/or a second notch
filter having a full lattice structure. Further, the operations may further comprise decomposing
the annihilating component as a series combination of one or more first notch filters and one or
more second notch filters; and the minimum phase component, non-minimum phase
component, and the symmetric component as a series-parallel combination of one or more first
notch filters and one or more second notch filters. The operations may further comprise
decomposing each of the minimum phase component, the non-minimum phase component, and
the symmetric component into annihilating subcomponents wherein each of the annihilating
subcomponents include one or more first notch filters and one or more second notch filters. The
operations may further comprise deriving parameters to program a canonic filter module to
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implement at least one of the annihilating component, the minimum phase component, the nonminimum
phase component, and/or the symmetric component. The operations may further
comprise determining lattice coefficients of the first notch filter and the second notch filter for
each set of notch filters, and/or defining the digital filter structure.
[0013] The foregoing summary is illustrative only and is not intended to be in any way
limiting. In addition to the illustrative aspects, embodiments, and features described above,
further aspects, embodiments, and features will become apparent by reference to the drawings
and the following detailed description.
8
BRIEF DESCRIPTION OF THE DRAWINGS
[0014] Figure 1 is a functional block diagram of a digital signal processing system for
use with filters described herein;
[0015] Figure 2A is a functional block diagram of an implementation of a rational
transfer function for use with filters described herein;
[0016] Figure 3A is a functional block diagram of an example digital filter;
[0017] Figure 3B is a functional block diagram of a canonical form of a digital filter
module;
[0018] Figure 3C is a circuit block diagram of one implementation of a digital filter;
[0019] Figure 3D is a circuit block diagram of another implementation of a digital filter;
[0020] Figures 4 and 5 are functional block diagrams of example single port notch
filters;
[0021] Figure 6 is a functional block diagram of an example digital filter;
[0022] Figure 7 is an example hardware implementation of a digital filter;
[0023] Figure 8 is a flow chart for an example method for determining an example
digital filter structure;
[0024] Figure 9 a functional block diagram illustrating an example computing device
used in a digital signal processing system;
[0025] Figures 10A and 10B are examples of AH sequence synthesis; and,
[0026] Figure 11 depicts complex filtering structures; and,
[0027] Figures 12A and 12B depict canonic filter module configurations, all arranged in
accordance with at least some embodiments described herein.
9
DETAILED DESCRIPTION
[0028] In the following detailed description, reference is made to the accompanying
drawings, which form a part hereof. In the drawings, similar symbols typically identify similar
components, unless context dictates otherwise. The illustrative embodiments described in the
detailed description, drawings, and claims are not meant to be limiting. Other embodiments
may be utilized, and other changes may be made, without departing from the spirit or scope of
the subject matter presented herein. It will be readily understood that the aspects of the present
disclosure, as generally described herein, and illustrated in the Figures, can be arranged,
substituted, combined, separated, and designed in a wide variety of different configurations, all
of which are explicitly contemplated herein.
[0029] Figure 1 is a functional block diagram of an example digital signal processing
(DSP) system that utilizes the filter structures described herein. The DSP system 100 is
configured to receive a continuous time analog signal xo(t). Examples of continuous time
analog signals may be voice or audio, sonar or radar, images, biomedical, or seismic signals.
An Analog-to-Digital Converter (ADC) 110 may be configured to receive and convert the
continuous analog signal xo(t) into a discrete time signal xo[n] which may also be described as a
sequence of digital samples. The ADC 110 can be configured to sample the analog signal xo(t)
at a sampling rate of 1/T1 samples per second. Further, the discrete time or digital signal xo[n]
can be received by an Input Interpolator 120. Interpolation can be utilized to effectively
increase the sampling rate of captured data by determining or estimating a sample value that
occurs at a time between two of the original discrete time samples. An input up-sampling factor
for the Input Interpolator 120 may be L1. Additionally, the output of the Input Interpolator 120
may be a signal xL[n], which may be provided to the Input Sampling Filter 130. The Input
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Sampling Filter 130 may be configured as an anti-aliasing or anti-imaging filter. Such aliasing
and imaging effects may be introduced during one or more processes such as the digital
conversion, interpolation, or decimation processes. The impulse response of the Input Sampling
Filter 130 may be a1[n], where such that the Input Sampling Filter 130 is configured to provide
a digital signal xS[n] in response to signal xL[n] in accordance with the impulse response a1[n].
Further, an Input Decimator 140 can be configured to receive the digital signal xS[n].
Decimation is the process of reducing a sampling rate of a discrete-time signal. In practice,
Decimation may also include filtering (e.g. low-pass) a signal, then discarding a subset of
samples of a discrete sequence. Decimation may reduce the computation and memory resources
needed for digital signal processing. An input down-sampling factor for the Input Decimator
140 may be M1.
[0030] The output of the Input Decimator 140 is configured to generate an output signal
xM[n] in response to digitial signal xS[n]. Signal xM[n] can be provided to a Digital Filter 150
having an impulse response h[n], which may be configured to responsively generate an output
digital signal yo[n]. The transfer function for the Digital Filter 150 may be given as H(z), which
is the z-transform of the impulse response h[n]. The Digital Filter 150 may be any appropriate
variety of filter functions such as a low-pass filter, a high-pass filter, a band-passfilter, a notch
filter, for example, or any other filter that may be used to reduce or enhance certain aspects of
the digital signal xM[n] in the digital signal processing system 100. Further, the output digital
signal, yo[n] of the Digital Filter 150 may be provided to an Output Interpolator 160, which may
have an up-sampling factor L2. Output Interpolator 160 may be configured to output digital
signal yL[n] in response to digital signal yO[n], where digital signal yL[n] may be provided to an
Output Sampling Filter 170. As with the Input Sampling Filter 130, the Output Sampling Filter
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170 may be used to reduce aliasing and imaging effects introduced during the digital
conversion, decimation, or interpolation process. An impulse response for the Output Sampling
Filter 170 may correspond to a2[n]. Output Sampling Filter 170 may be configured to output
digital signal yS[n] in response to digital signal yL[n] in accordance with the impulse response
a2[n]. Digital signal yS[n] can be provided to an Output Decimator 180, with a down-sampling
factor of M2 which responsively outputs signal yM[n]. The output signal of the Output
Interpolator, yM[n], may be provided to a Digital-to-Analog Converter (DAC) 190, which may
responsively convert the digital or discrete time signal yM[n] to a continuous time analog signal
yo(t). One or more of the filtering operations performed by filter modules 130, 150, and 170
may be adapted to use the filter structures described herein.
[0031] Further details of the methods and systems described herein may be found later
in the specification section entitled “Properties and Further Examples of the Canonic Lattice
Filter Structures Based on Notch Filters.” Furthermore, in the following description, much of
the mathematical justification for the filter derivation may be found in “The Line Spectral
Frequency Model of a Finite-Length Sequence” by Yedlapalli, S. S.; Hari, K. V. S.; IEEE
Journal of Selected Topics in Signal Processing, Volume 4, Issue 3, pp 646-658 (2010), the
contents of which are hereby incorporated herein by reference for all purposes, and are referred
to herein as “the LSF Model publication”. This publication is also referenced herein by way of
the following notation: “/[1]”, wherein, for example, a reference to “property 8/[1]” refers to
property 8 as described in the LSF Model publication.
[0032] In the LSF model publication, a spectral decomposition of finite length
sequences is described. The filter structures described herein make use of the LSF spectral
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decomposition techniques by applying them to the impulse response sequence of a desired FIR
filter.
[0033] Annihilating sequences, or AH sequences, are basic sequences. The AH
sequences {χAH, χU, χV } can be synthesized by cumulative convolution operation of basic
sequences defined by the LSFs {θ AH, u, v} as in Fig. 10A. Specifically, from Property-8/[1], the
AH-sequence χAH can be obtained directly by a cumulative convolution operation using LAH
factors of the type ΛAH (θ AH[l], z). The sequence can also be obtained as the convolution of χU
and χV with {χU, χV} obtained independently with the cumulative convolution of ΛU (u[l], z)
and ΛV (v[l], z)
[0034] Alternately, from linear system theory one can also use a non-recursive discrete
time system which can use difference equations to generate AH-sequences. The non-recursive
discrete time filter in Fig. 10B with transfer function H AB (z) between node A and node B can
be used to generate the sequence h AB as a response to an impulse input. In scalar synthesis, the
AH-sequences can be synthesized as the impulse response of an FIR filter, where the filter is a
cascade (i.e., series coupling) of the basic AH-factors defined by the corresponding LSFs,
where iδ:(LAB+1)] is an impulse sequence with iδ[0]=1, iδ[n]=0 for 1≤n≤ LAB.
[0035] An LTI system with transfer function as ΛAH(α, z) can be recognized as a Notch
filter with spectral null at f=α. Figures 4 and 5, as discussed below, show that the two basic AHfactors
(Notch filters) are also the transfer functions of lattice blocks LU and LV, which are
robust to quantization noise.
[0036] In addition, the LSF decomposition and generation of digital filters may be
extended to any rational transfer function. Figure 2 depicts an implementation of a rational
transfer function between node 0 and node 5 with a transfer function H05(z)=HNUM(z)/HDEN(z),
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which is adapted in accordance with at least some embodiments described herein. This can be
written as hNUM[0]H12(z)/HDEN(z) such that h12[0]=1. Further, it can be seen that the transfer
function between nodes 2 and 5 of Fig. 2 is H25(z)=1/HDEN(z), with the denominator rewritten in
the form HDEN(z)=1+hDEN[1]z-1H34(z) with hDEN[1]≠0. In this way, any rational transfer
function HNUM(z)/HDEN(z) may be rewritten in terms of H12(z) and H34(z), which are in turn and
implemented using the filter structures described herein.
[0037] Figure 3A is a functional block diagram 300 of an example digital filter that is
arranged in accordance with at least some embodiments described herein. Digital filter 310 has
a transfer function H(z)=X(z). Further, the digital filter 310 comprises up to four digital filter
components including an annihilating component, minimum phase component, non-minimum
component, and symmetric component with transfer functions, XAH(z) 320, XMP(z) 330, XNP(z)
340, and XSM(z) 350, respectively. The transfer function for the digital filter 310, H(z)=X(z) is
a polynomial with respect to the variable z and may be decomposed into four components such
that X(z)= XAH(z) XMP(z)XNP(z)XSM(z) using LSF modeling of a sequence corresponding to the
filter impulse response.
[0038] As set forth in more detail in the LSF Model Publication, identifying the various
polynomial components may be achieved by factoring and finding the roots for the polynomial
X(z). This may be done using a root-finding software utility program running on a
microprocessor. Numerous utilities exist including the function “roots()” in the Matlab ®
software from The Mathworks, Inc. Software is then used to group the roots into the various
filter function modules, or components, as described in the LSF model publication with respect
to a polynomial corresponding to a finite sequence. The roots of a polynomial, which in this
case correspond to the transfer function X(z), may lie within the unit circle of the z-domain, on
14
the unit circle of the z-domain, or outside the unit circle in the z-domain. Roots of X(z) that lie
on the unit circle may be grouped together to be the annihilating filter component XAH(z) 320.
A root, or zero, on the unit circle corresponds to suppressing or reducing a frequency
component that corresponds to that frequency in the frequency response of the annihilating filter
component XAH(z) 320. Thus, the annihilating filter component may be characterized as one or
more notch filters. Hence, the name "annihilating" filter component for such a digital filter.
[0039] Alternatively, roots of X(z) that are complex conjugates of each other such that
one root lies within the unit circle and one root lies outside the unit circle are grouped together
to be the symmetric filter component XSM(z) 350. Further, roots of X(z) that are within the unit
circle (with no corresponding complex conjugate) may be grouped together to be the minimum
phase filter component XMP(z) 330. In addition, roots of X(z) that are outside the unit circle
(with no corresponding complex conjugate) may be grouped together to be the non-minimum
phase filter component XNP(z) 340. Details of the annihilating, minimum phase, non-minimum
phase, and symmetric filter components will be discussed when describing Figure 3B and table
1, below. While the annihilating, minimum phase, non-minimum phase, and symmetric filter
components may be cascaded to implement the digital filter 310, each filter component may be
used individually as a filter or with a subset of the other filter components to implement any
type of digital filter.
[0040] The principle of scalar synthesis can be used to translate the vector synthesis
structures of the LSF-models {χMP, χNP, χSM} in [1] to LTI systems with impulse responses as
{χMP, χNP, χSM}. These LSF-models (Fig. 4/[1], Fig. 5/[1], Fig. 6/[1]) require the knowledge of
their roots {ρMP, ρNP, ρSM,} and a choice of the model parameters {μ, λ} [1].
[0041] Figure 3B is a functional block diagram for an example canonic filter module
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(CFM) 390, in accordance with at least some examples described herein. The CFM 390 can
implement each of the annihilating filter component, the minimum phase filter component, the
non-minimum phase filter component, and the symmetric filter component, individually. The
CFM 390 has several filter components and filter subcomponents, delay circuits, adder circuits,
and amplifier or multiplier circuits. Further, the CFM 390 may be implemented by a digital
signal processor ASIC, FPGA, or any other specialized processor that may be used to
implement each filter component, delay circuit, adder circuit, and amplifier or multiplier circuit
shown in Figure 3B. Note that as used herein, the transfer function between node-i and nodej
is denoted as Hij(z)=Xj(z)/Xi(z) with impulse response as hij.
[0042] The CFM 390 of Figure 3B includes the following: a transfer function HAB(z)
360 with finite length impulse response as [hAB: (LAB+1)](or simply hAB); a transfer function
HB0(z) 362 with finite length impulse response as [hB0: (LB0+1)](or h B0); a transfer function
HB1(z) 364 with finite length impulse response as [hB1: (LB1+1)](or h B1); complex gains G0 366
and G1 368; and, delays D0 378 and D1 382. Each of the transfer functions are derived as
described herein so as to be annihilating transfer functions, and hence are implemented as
cascaded single-node notch filter structures. That is, each of the filter components 360, 362,
and 364 described above may be decomposed into various interconnected combinations of two
types of notch filters. One type of notch filter may have a half-lattice digital filter structure and
another type of notch filter may have a full-lattice digital filter structure. Details of the types of
notch filters will be discussed when describing Figures 4 and 5, and are summarized in Table A.
16
0 ([�� → ΛUu0],z)→��A→L→��B→ ΛU(u[LU −1],z)→��1
The transfer function, ( ) ( ) 01 H z X z U = (Table-II/[1]) is realized as a cascade of
u L blocks of type U L , each with transfer function (u[l], z) U Λ defined by lattice
coefficient [ ] j 2 u[l ]
U k l − e π Δ . Here the LSFs [ : ] U u L map to a sequence of
reflection coefficients [ : ] U U k L . Here U h = x 01 .
a: Lattice Structure for X (z) U
1 V([0], ) V([v 1], ) 2 �� → Λ v z→��P →L→��Q → Λ vL− z→��
The transfer function, ( ) ( ) 12 H z X z v = (Table-II/[1]) is realized as a cascade of
v L blocks of type V L each with transfer function (v[l], z) v Λ defined by lattice
coefficient k [l] cos(2 v[l]) v − π Δ . Here the LSFs [ : ] v v L map to a sequence of
reflection coefficients [ : ]. v v k L Here v h = x 12 .
b: Lattice Structure for X (z) V
[ : ] [ : ]
0 ( ) 1 ( )2
U U v v
U v
k L k L
��→X z →�� →X z→��
The transfer function, ( ) ( ) 02 H z H z AH = is realized as a cascade of
( ) ( ) 01 H z X z v = . Here AH h = x 02 . The Example-2 illustrates this lattice
structure.
c: Lattice Structure for X (z) AH
TABLE A
[0043] The annihilating filter component may be a series combination of one or more
half-lattice notch filters and one or more full-lattice notch filters. Further, the minimum phase
component 330, the non-minimum phase component 340, and the symmetric component 350
may be a series and a parallel combination of one or more half-lattice notch filters and one or
more full-lattice notch filters. A series combination of filters is one in which the filters are
configured such that an output of a first filter is provided as an input to a second filter. A
parallel combination of filters is one in which one or more filters are configured to each receive
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the same input and wherein the respective outputs are coupled and/or combined. A seriesparallel
configuration is one in which at least one branch of a parallel filter may itself be one or
more series combinations of filters, or may be one in which one or more filters are coupled in
series together with one or more parallel combinations of filters. Let NU and NV denote the
number of lattice blocks of type LU and LV used in a CFM block.
[0044] The operation and implementation of the example CFM shown in Figure 3B may
be described as follows. The filter component 360 may be configured to receive an input signal
and couple a resulting processed signal to both filter 362 and filter 364. The output of filter 362
and 364 are coupled to gain units 366 and 368 respectively. The gain coefficient values are
(1+G0)/2 and (1-G0)/2 as shown. The resulting output signals from gain circuits (or software
modules) 366 and 368 are coupled to adder circuit 376 and a difference is calculated. The
resulting signal is coupled to an adder circuit 380. In addition, the resulting output signals from
amplifier circuits 365 and 368 are coupled to adder circuit 374 and added to each other. The
resulting signal is coupled to delay circuit 378. Adder circuit 380 is configured to receive
signals from delay circuit 378 and adder circuit 376 and adds the signals together. The resulting
signal is delayed a D1 interval by delay circuit 382 and coupled to amplifier or multiplier circuit
384. The received signal is amplified by a gain or coefficient of G1. The resulting signal from
amplifier circuit 384 is the output signal for the CFM 390. The parameter G0 and G1 may be
related to the coefficients of the transfer function of the CFM 390.
[0045] The CFM 390 of Figure 3B may be used to implement any one of an annihilating
filter component, a minimum phase filter component, a non-minimum phase filter component,
or a symmetric filter component. Figure 3C is a functional block diagram 1100 for an example
digital filter using canonic filter modules. The transfer function for the digital filter 1100 may
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be X(z). As discussed in describing Figure 3A, the transfer function X(z) may be decomposed
into an annihilating filter component XAH(z), a minimum phase filter component XMP(z), a nonminimum
phase filter component XNP(z), and a symmetric component XSM(z). Moreover, each
filter components may be implemented by a CFM as discussed when describing Figure 3B.
Thus, the digital filter 1100 with transfer function X(z) may be realized by cascading (i.e., a
series coupling) a CFM 1120 implementing an annihilating filter component, a CFM 1130
implementing a minimum phase filter component, a CFM 1140 implementing a non-minimum
phase filter component, and a CFM 1150 implementing a symmetric filter component. In an
alternative embodiment, the CFM structures may be configured so that the annihilating filter
component XAH(z) and the symmetric component XSM(z) are combined in a single CFM,
represented as XLP(z). Table B below summarizes the various configurations of the CFM filter
device according to the filter component being implemented.
Transfer Functions
2 0 0 3 1 0
( ) 1 ( )(1 ), ( ) 1 ( )(1 )
B 2 2 H z H z G H z H z G Β Β Β
=⎛⎜ ⎞⎟ + = ⎛⎜ ⎞⎟ −
⎝ ⎠ ⎝ ⎠
( ) ( ) ( ) 2 3 H z H z H z ΒC Β Β = + , ( ) ( ) () 2 3 H z H z H z ΒD Β Β = −
H (z) [z 0H (z) H (z)] C D
D
E Β Β
−
Β = + , 1
1 ( ) D
EG H z =Gz−
H (z) H (z)H (z)H (z) AG AΒ ΒE EG =
AH C : Configuration of block C F M for χ AH (in Fig. 3/[1])
H (z) X (z) AB AH = with only two nodes {��A, ��B }.
The Example-3 illustrates this lattice structure.
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CMP : Configuration of block C F M for χ MP (in Fig. 4/[1])
with un-used nodes {��A ,��E,��F,��G}.
From Fig. 4/[1]. MP x is mapped to two AH-sequences +
MP x (LSF-MP-1
for simplicity) with LSFs as θ MP + .
Here 0 1 0 ( ) ( ); ( ) ( ); B MP B MP MP H z =X+ z H z =X− z G =G ;
( ) ( ); ( ) BC MP BD H z =X z H z =Ω(MP MP,) MP() μ λ z X z
��
;
The Example-4 illustrates this lattice structure.
NP C : Configuration of block C F M for χ NP (in Fig. 5/[1])
with un-used nodes as; A C
⎧ ⎫
⎨ ⎬
⎩ ⎭ �� ��
From Fig. 5/[1], MP α is mapped to two AH-sequences MP α ± (LSF-NP-1
for simplicity) with LSFs as θ NP ± .
Here 0 0 1 ( ) ( ); ( ) ( ); ; ; B MP Bl MP MP NP H z =A+ z H z =A− z G =G G=K
( ) BG H z = Ω 1 ( ,) ( ) MP MP NP μ λ +D z X z . 0 D = ∞ i.e. node ��D connects
directly to��E or addition is bypassed.
1 D ≥ 0 is an additional delay other than MP λ of MP χ .
The Example-5 illustrates this lattice structure.
SM C : Configuration of block C F M for SM χ (in Fig. 6/[1]) with un-used
node A �� .
From Fig. 6/[1]. ( MP SM α of χ Theorem-1/[1]) is mapped to two AHsequences
MP α ± (LSF-SM-1 for simplicity) with LSFs as θ SM ± .
Here
1
0 1 0 1 0 ( ) ( ); ( ) ( ); ; ; ( B MP B MP MP SM SM SM H z =A+ z H z =A− z G =G G=K D =L = L +
( ) BG H z = Ω 1 (0, , ) ( ) MP SM λ +D z X z
1 D ≥ 0 is an additional delay other than the MP λ of χ MP .
The Example-6 illustrates this lattice structure.
LP C : Configuration of block C F M for χ LP
As in AH C and SM C with ( ) AG H z = Ω 1 (0, , ) ( ) MP LP λ +D z X z
Example-7 to Example-9 illustrate this lattice structure.
TABLE B
20
[0046] An annihilating filter component may be implemented through the use of block
360 where HAB(z) = XAH(z), which corresponds to the portion of the CFM structure from node
A to node B. The transfer function of the annihilating filter component may be XAH(z) and may
be referred to an annihilating transfer function. The impulse response for such a transfer
function may be referred to an annihilating sequence xAH[n]. The digital filter may be
implemented by cascading (i.e., a series coupling) a digital filter having a transfer function
XU(z), and a digital filter having a transfer function XV(z). The digital filter with transfer
function XU(z) may be a combination of the half-lattice notch filters as shown in Figure 4 while
the digital filter with transfer function XV(z) may be a combination of full-lattice notch filters as
shown in Figure 5.
[0047] An annihilating transfer function has roots on the unit circle in the z-domain.
Thus, an annihilating sequence or annihilating transfer function may be characterized by [θAH,
LAH] where LAH is the number of roots for the annihilating transfer function and θAH is the roots
of the annihilating transfer function such that the root is given by ej2πθAH[l] which implies
XAH(f)=0 for f= θAH.
[0048] For example, an annihilating sequence, xAH1[n] may be given as [θAH, 6]={0.07,
0.18. 0.2, -0.2, 0.36, -0.36]. The annihilating transfer function XAH1(z) that corresponds to the
annihilating sequence xAH1[n] has six roots that includes two single roots (0.07 and 0.18) and
two conjugate pairs (0.2, -0.2, 0.36, and -0.36). Each single root (0.07 and 0.18) can be
characterized as transfer function for a half-lattice notch filter. Further, each conjugate pair may
be characterized as transfer function for full-lattice notch filter. The two half-lattice notch
filters may be cascaded together to form a digital filter 620 with transfer function XU(z)=(zej2π(
0.07))(z-ej2π(0.18)) where the transfer function for one half-lattice notch filter is (z-ej2π(0.07)) and
21
the transfer function for the other half-lattice notch filter is (z-ej2π(0.18)). One half-lattice notch
filter is configured to suppress or reduce the frequency component at f=0.07 and the other halflattice
notch filter is configured to suppress or reduce the frequency component at f=0.18. The
half-lattice coefficients may be calculated as KU1= -ej2π(0.07)=1<(-0.43) and KU2= -ej2π(0.18)=1<(-
0.32).
[0049] Alternatively, the two full-lattice notch filters may be cascaded together to form
a digital filter with transfer function XU(z)=(z-ej2π(0.2))(z-ej2π(-0.2))(z-ej2π(0.36))(z-ej2π(-0.36)) where
one transfer function for one full-lattice transfer function is (z-ej2π(0.2)) (z-ej2π(-0.2)) and the
transfer function for the other full-lattice transfer function is (z-ej2π(0.36))(z-ej2π(-0.36)). One fulllattice
notch filter is configured to suppress or reduce frequency components at f=-0.2 and f=0.2
and the other full-lattice notch filter is configured to suppress or reduce frequency components
at f=-0.36 and f=0.36. The full-lattice coefficients may be calculated as KV1= -cos(2π(0.2))=-
0.30902 and KV2= -cos(2π(0.36))=0.63742.
[0050] This example may therefore be summarized as follows:
[0051] The AH-sequence with LSFs as [θAH
: 6] ={0.07, 0.18, 0.2, -0.2, 0.36, -0.36}.
[0052] Here [u:2] = {0.07, 0.18} and [v:2] = {0.2, 0.36} and the corresponding AHsequences
are as follows:
[xAH.: 7]={1, 1.49148∠(-0.3246), 0.36087∠(0.05678), 1.35201∠(-0.375), 0.36087∠(0.19322),
1.49148∠ (-0.4254), 1∠ (0.25) }; LAH=6;
[xU: 3]={ 1, 1.88176∠(-0.375), 1∠(0.25) }; LU=2;
[xV,: 5]={1, 0.65681, 1.2121, 0.6568 1, 1}; LV,=2;
For the AH-sequences the reflection coefficients are:
[kU: 2]={ 1∠(-0.43), 1∠(-0.32) };
[kV: 2]={-0.30902, 0.63742};
[0053] The example filter module implemented on CFM may be a minimum phase filter
component, which has a minimum phase transfer function XMP(z)=1+a1z-1+a2z-2 where a1 and a2
22
are complex coefficients, for example. X~
MP(z)=a2
*+a1
*z-1+z-2 where a1
* and a2
* are complex
conjugates of complex coefficients a1 and a2. Generally, XMP(z) may be a transfer function of
arbitrary length and the complex coefficients for X~
MP(z) may be found by reversing and
conjugating the coefficients of XMP(z). Further, X+
MP(z)=XMP(z)+X~
MP(z) such that X+
MP(z) is
an annihilating transfer function. In addition, XMP(
z)= XMP(z)- X~
MP(z) such that XMP(
z) is an
annihilating transfer function. Thus, the minimum phase transfer function can be characterized
as XMP(z)= X+
MP(z)+ XMP(
z).
[0054] The configuration of CFM 390 for a minimum phase filter module does not use
nodes A, E, F, or G. xMP is mapped to two AH sequences ±
MP x (LSF-MP-1 for simplicity) with
LSFs as MP
± θ . Here HB0(z)=X+
MP(z); HB1(z)= XMP(
z); G0=GMP; HBC(z)=XMP(z);
HBD(z)=W(μMP, λMP, z) MP X~ (z).
[0055] An example may be summarized as:
[xMP.:4]={1, 0.72759∠(-0.02583), 0.90237∠(-0.01154), 0.162∠(-0.1)};
ρM,[0] = 0.2∠(0.4); ρA[0] = 0.9∠(0.3).
[0056] The lattice structure for XMP(z) can be realized with one CFM block as follows.
The Lattice structure for +
MP x :
[ +
MP x : 5]= {1, 0.84939∠(-0.00419), 1.8, 0.84939∠(0.00419), 1};
[u: 4]={-0.33994, -0.23189, 0.23766, 0.33417}; LV= 0;
[kU:4]={ 1∠(0.16006), 1∠(0.26811), 1∠(-0.26234), 1∠(-0.16583)};
The Lattice structure for −
MP x :
[ −
MP x : 5]={ 1, 0.62435∠(-0.05535), 0.13078∠(-0.25), 0.62435∠(-0.44465), 1∠(-0.5) };
[u: 4]={-0.29764, 0.01715, 0.29712, 0.48337}; LV=0;
[kU:4]={ 1∠(0.20236), 1∠(-0.48285), 1∠(-0.20288), 1∠(-0.01663)}
G0 = GMP = 0; NU = 8; NV = 0; where NU , NV denote the number of lattice blocks of type
LU and LV used in a CFM block.
23
[0057] The example filter module implemented on a CFM may be a non-minimum
phase filter component, which has a non-minimum phase transfer function XNP(z)=1+b1z-1+b2z-2
where b1 and b2 are complex coefficients, for example. Further, X~
NP(z) = b2
*+b1
*z-1+z-2 =
b2
*[1+(b1
*/b2
*)z-1+z-2] where b1
* and b2
* are complex conjugates of complex coefficients b1 and
b2. Generally, XNP(z) may be a transfer function of arbitrary length and the coefficients of
X~
NP(z) may be found by reversing and conjugating the coefficients of XNP(z) and factoring
X~
NP(z) such that X~
NP(z)=s*[L]AMP(z). Further, s*[L] may be a sequence of complex
coefficients and AMP(z) is a minimum phase transfer function. Thus, AMP(z) can be
characterized as AMP(z)= A+
MP(z)+ AMP(
z) where A+
MP(z) and AMP(
z) are annihilating
subcomponents of AMP(z).
[0058] The configuration of CFM 390 for a non-minimum phase filter module does not
use nodes A or C. The function MP a is mapped to two AH sequences
±
MP a (LSF-NP-1 for
simplicity) with LSFs as
NP
± θ . Here, HB0(z)=A+
MP(z); HB1(z)= AMP(
z); G0=GMP; G1=KNP ;
HBG(z)= W(μMP, λMP+D1, z) NP X (z); D0=∞, i.e., node D connects directly to node E, or addition
is bypassed.
[0059] An example may be summarized as follows:
[xNP:4]={ 1, 1.4588∠(0.25547), 2.2312∠(-0.18898), 5.55556∠(0.13)};
ρN[0] =2∠(-0.37); ρB[0] =0.6∠(0.18);
[0060] The lattice structure for XNP(z) can be realized with one CFM block as follows:
The Lattice structure for +
MP a
[ +
MP a :5]={1, 0.23766∠(0.28062), 0.37024, 0.23766∠(-0.28062), 1};
[u: 4]={-0.34178, -0.15354, 0.12411, 0.37121}; LV=0;
[kU:4]={ 1∠(0.15822), 1∠(0.34646), 1∠(-0.37589), 1∠(-0.12879)};
The Lattice structure for −
MP a
24
[ −
MP a :5]={1, 0.57525∠(0.3347), 0.37246∠(-0.25), 0.57525∠(0.1653), 1∠(-0.5)};
[u: 4]={-0.45157, -0.23885, -0.02879, 0.21921};LV= 0;
[kU:4]={ 1∠(0.04843), 1∠(0.26115), 1∠(0.47121), 1∠(-0.28079)};
G0 = GMP = 0; G1=KNP=5.55556∠(0.13); NU = 8; NV = 0; where NU , NV denote the number of
lattice blocks of type LU and LV used in a CFM block.
[0061] The example digital filter implemented on a CFM may be a symmetric filter
component. Further, the symmetric filter component 800 may have a symmetric transfer
function XSM(z)=c0+c1z-1+c2z-2+c1z-3+c0z-4 where c0, c1, c2 are complex coefficients, for
example. Further,
XSM(z) = (c0/2) [2d0+2d1z-1+2z-2+2d1z-3+2d0z-4]
XSM(z) = (c0/2) [{2d0+2d1z-1+z-2} + z-2{1+2d1z-1+2d0z-2}]
XSM(z) = (c0/2)[A~
MP(z)+ z-2AMP(z)]
where AMP(z) is a minimum phase filter component. Generally, XSM(z) may be a
transfer function of arbitrary length. The configuration of CFM 390 for a symmetric filter
module does not use node A. The function MP a is mapped to two AH sequences
±
MP a (LSF-SM-1
for simplicity) with LSFs as SM
± θ . Here, HB0(z)=A+
MP(z); HB1(z)= AMP(
z); G0=GMP; G1=KSM ;
HBG(z)= W(0MP, λMP+D1, z)XSM(z); D0=LSM+ λMP; D1≥1 is an additional delay.
[0062] An example may be summarized as follows:
[xSM: :7]={ 1, 1.2746∠(0.30285), 0.86793∠(0.10843), 2.96328∠(0.4), 0.86793∠(-0.30843),
1.2746∠(0.49715), 1∠(-0.2)};
ρC[0] =0.8∠(-0.1); ρD[0] =0.9∠ (-0.3);
[aMP:4]={ 1, 0.58579∠(0.29157), 0.86026∠(0.09715), 0.67493∠(0.4)}
[0063] The lattice structure for XSM(z) can be realized with one CFM block in as
follows:
[ +
MP a :5]={1, 0.71752∠(0.46211), 1.40985, 0.71752∠(-0.46211), 1};
[u: 4]={-0.27113, -0.1671, 0.13415, 0.304081; L,=0;
25
[kU:4]={ 1∠(0.22887), 1∠(0.3329), 1∠(-0.36585),
[ −
MP a :5]={ 1, 1.04044∠(0.18806), 0.98617∠(0.25), 1.04044∠(0.31194), 1∠(-0.5) };
[u: 4]={-0.45443, -0.23446, -0.11011, 0.299}; LV=0;
[kU:4]={ 1∠(0.04557), 1∠(0.26554), 1∠(0.38989), 1∠(-0.201)
G0 = GMP = 0; G1=KSM=1.48164∠(0.4); NU = 8; NV = 0; where NU , NV denote the number of
lattice blocks of type LU and LV used in a CFM block.
[0064] Following, in Table C, is a summary of LSF-A and LSF-B (Figure 7/[1]) that
have the same LSF set χx
. The transfer function X(z) can be realized by cascading three
independent CFM blocks as shown in Figure 12A and as summarized below in Table C:
Principle: (Table-II/[1] and Fig. 7/[1] for LSF-A/LSF-B)
As X(z)= XLP(z)XMP(z)XNP(z)from the LSF-Model X x in Table-III/[1], X(z)can be
realized with three CFM blocks, C F M1, C F M2 and C F M3 as follows.
(a) C F M1 in 01 : ( ) LP C H z = Ω (0, [0], ) ( ) VEC LP λ z X z ;
(b) C F M2 in 12 : ( ) ( ) MP MP C H z =X z ;
(c) C F M3 in 23 : ( ) NP C H z = Ω( [1], [2], ) () VEC VEC NP μ λ z X z ;
The above configuration ((a) to (c)) effectively gives,
03H (z) = Ω( [1], [0] [2], ) () VEC VEC VEC μ λ +λ z X z ;
The Example-10 illustrates this FIR lattice structure.
TABLE C
[0065] As shown in Figure 12B, and as summarized below in Table D, two
configurations CC and CD which are based on χx in LSF-C and LSF-D (Fig. 8/[1]) to realize {χ ,
χW }[1]. Note that table D refers to further details set forth in Tables 1-3, below.
26
Principle: (Property-15/[1] and Fig. 8/[1] for LSF-C/LSF-D)
Here X(z) =X1(z)X2(z)and the LSF-Model of 1
χ in Table-III[1] is
used to configure
C F M4 block which internally uses three CFM blocks (Fig. 3B, and
Table B), C F M1, C F M2 and
C F M3 given as follows.
(a) The C F M1 block realizes 2 ( ) ( ) AB H z =X z ;
(b) The C F M2 block realizes 0 1 ( ) DPQ ( )
B H z z X z = − + ;
(c) The C F M3 block realizes 1 1 ( ) DPQ ( )
B H z z X z = − − ;
1 X +(z)are obtained with model parameters 1 [0] VEC μ Δμ and 1 [1] VEC λ Δλ (Table-
III/[1]). The Table-I and Table-II summarize the configuration of C F M2 and
C F M3 blocks.
: c C Configuration of C F M4 with χ x in LSF-C (in Fig. 8/[1])
Here 1( ) ( ) NA X z =X z and 2( ) ( ) AH X z =X z ;
(4.1) C F M1 in : ( ) ( ) AH AB AH C H z =X z ;
(4.2) C F M2 in : () DPQ ()
LP BO NA C H z z X z = − + ; (Table-I)
(4.3) C F M3 in 1 : () DPQ ()
LP B NA C H z z X z = − − ; (Table-II)
The above configuration ((4.1) to 4.3)) effectively gives,
( ) AC H z = Ω , (0, ) ( ) PQ D z X z
( ) AD H z = ٠��
1 , 1 , ( )( ) AH PQ μ −α λ +D z X z
27
The Example-11 to Example-14 illustrate this FIR structure.
CD : Configuration of C F M4 with X x in LSF-D (in Fig. 8/[1])
Here 1( ) ( ) NLP X z =X z and 2( ) ( ) LP X z =X z ;
(4.1) C F M1 in : ( ) LP AB C H z = Ω , (0, E ) ( )
MP LP λ z X z with E [0]
MP VEC λ λ Δ (Table-
III/[1]). The Table-III summarizes this configuration.
(4.2) C F M2 in 0 : () DPQ ()
LP B NLP C H z z X z = − + ; (Table-I)
(4.3) C F M3 in 1 : ( ) DPQ ( )
LP B NLP C H z z X z = − − ; (Table-II)
The above configuration ((4.1) to 4.3)) effectively gives,
( ) AC H z = Ω (0, E , ) ( )
PQ MP D +λ zX z
( ) AD H z = ٠��
1 , 1 , ( E)( )
LP PQ MP μ −α λ +D +λ zXz
The Example-15 to Example-18 illustrate this FIR structure.
TABLE D
28
This CFM block is configured in LP C (Fig. 3B) to realize the linear-phase transfer function
_
DPQ 1 ( ) z X+z
From Property-15/[1], 1 X +(z)has an A-H factor AH ( )
P X z and SM ( )
P X z .
From Fig. 6/[1]. MP α (of SM
P X Theorem-1/[1]) is mapped to two AH-sequences MP α + (LSF-SM-1
for simplicity) with LSFs as P :
P θ L ± ⎡⎣ ⎤⎦.
(2.1) ( ) AH ( )
AB P H z =X z ; (2.2) 0( ) ( ) B MP H z =A+ z ; (2.3) 1( ) ( ) B MP H z =A− z ;
(2.4) 0
SM
P G =G ; (2.5) 0 P D =L ; (2.6) 1 P D=D ; (2.7) 1
SM
P G=K .
The above configuration ((2.1) to (2.7)) effectively gives, ( ) _ DP SM( )
BG P H z =z X z and
_
1 ( ) DPQ ( )
AG H z =z X+ z .
TABLE I: Configuration of C F M2 Block
This CFM block is configured in LP C to realize the linear-phase transfer function
_
1 DPQ ( ) z X−z
From Property-15/[1], 1 X −(z)has an AH-factor AH( )
Q X z and SM( )
Q X z .
From Fig. 6/[1], MP α (of SM
Q X Theorem-1/[1]) is mapped to two AH-sequences
MP α ± (LSF-SM-1 for simplicity) with LSFs as Q :
Q θ L ± ⎡⎣ ⎤⎦ .
(3.1) ( ) AH( )
AB Q H z =X z ; (3.2) 0( ) ( ) B MP H z =A+ z ; (3.3) 1( ) ( ) B MP H z =A− z ;
(3.4) 0
SM
Q G =G ; (3.5) 0 Q D =L (3.6) 1 Q D=D ; (3.7) 1
SM
Q G=K .
The above configuration ((3.1) to (3.7)) effectively gives
( ) DQ SM( )
BG Q H z z X z − = and 1 ( ) DPQ ( )
AG H z z X z = − − .
TABLE II: Configuration of C F M3 Block
29
This CFM Block is configured in LP C (Fig. 3B, and Table B) to realize the linear-phase
transfer function Ω (0, E , ) ( )
MP LP λ z X z
From Table-II/[1], ( ) LP X z has an AH-factor ( ) AH X z and ( ) SM X z . From Fig. 6/[1],
MP α (of SM x Theorem-1/[1]) is mapped to two AH-sequences MP α ± (LSF-SM-1 for simplicity)
with LSFs as SM :
SM θ L ± ⎡⎣ ⎤⎦.
(1.1) ( ) ( ) AB AH H z =X z ; (1.2) 0( ) ( ) B MP H z =A+ z ; (1.3) 1( ) ( ) B MP H z =A− z ;
(1.4) 0 SM G =G ; (1.5) 0 ( E)
SM MP D= L +λ ; (1.6) 1 D = 0 ; (1.7) 1 SM G=K .
The above configuration ((1.1) to (1.7)) effectively gives,
( ) BG H z = Ω , (0, E ) ( )
MP SM λ z X z and ( ) AG H z = Ω (0, E , ) ( )
MP LP λ z X z .
TABLE III: Configuration of C F M1 Block in D C
[0066] Figure 4 is a functional block diagram of an example half-lattice notch filter 400
arranged in accordance with at least some embodiments of the present disclosure. Note that it is
a single port device in that it has a single input node and a single output node. The half-lattice
notch filter 400 has a transfer function XU(z)=(1-ej2παz-1). A notch filter has a frequency
response such that the notch filer suppresses or reduces a frequency component or a small range
of frequencies. The half-lattice notch filter 400 suppresses or reduces the frequency component
corresponding to α. The transfer function XU(z) for the notch filter 400 can be realized with a
half-lattice structure shown in Figure 4. The half-lattice notch filter 400 can be implemented
using a delay circuit 410, a multiplier circuit 420, and an adder circuit 430. The delay circuit
410 is configured to receive an input signal from an input node and configured to delay the
input signal for one time interval. Further, as mentioned previously, the half-lattice notch filter
may be realized in a digital signal processor, ASIC, FPGA, or any other specialized processor
30
having memory. The multiplier circuit 420 may access a half-lattice coefficient from such a
memory and multiply the half-lattice coefficient to the signal from the delay circuit 410. A
value for the half-lattice coefficient may be kU=ej2πα. The resulting signal can be provided to
adder circuit 430 which adds the signal from the multiplier circuit to the input signal received
from the input node. The resulting signal from the adder circuit 430 can be provided to an
output node of the half-lattice notch filter 400.
[0067] Figure 5 is a functional block diagram of an example full-lattice notch filter 500
arranged in accordance with at least some embodiments described herein. Note that it is a
single port device in that it has a single input node and a single output node. The full-lattice
notch filter 500 has a transfer function XV(z)=XU(z)XU(z)=(1-2cos(2πα)z-1+z-2). The full-lattice
notch filter 500 is configured to suppress or reduce the frequency component corresponding to
α. The transfer function XV(z) for the notch filter 500 can be realized with a full-lattice
structure shown in Figure 5. The full-lattice notch filter 500 can be implemented using two
delay circuits (510, 560), two multiplier circuits (520, 540), and three adder circuits (530, 550,
570).
[0068] The delay circuit 510 is configured to receive an input signal from an input node
and to delay the input signal for one time interval. Further, as mentioned previously, the fulllattice
notch filter may be realized in a digital signal processor ASIC, FPGA, or any other
specialized processor having memory. The multiplier circuit 520 may be configured to access a
full-lattice coefficient kV=-cos(2πα) from such a memory and to multiply the full-lattice
coefficient by the signal from the delay circuit 510. The resulting signal can be provided to
adder circuit 530 which can be configured to add the signal from the multiplier circuit to the
input signal received from the input node. Further, multiplier circuit 540 can be configured to
31
receive the input signal from the input node, accesses the full-lattice coefficient kV from
memory, and multiply kV by the input signal. The resulting signal can be coupled to adder
circuit 550 which can be configured to add the signal from the multiplier circuit to the delayed
input signal received from delay circuit 510. The resulting signal from adder circuit 550 can be
coupled to delay circuit 560. The resulting delayed signal from delay circuit 560 can be
coupled to adder circuit 570. The adder circuit 570 can be configured to add the signal received
from adder circuit 530 to the signal received from delay circuit 560 and to couple the resulting
signal to an output node. The resulting signal from adder circuit 570 is the output signal for the
full-lattice notch filter shown in Figure 5.
[0069] Figure 6 is a functional block diagram 600 of an annihilating filter component
610 that is similar to the annihilating filter component 320 shown in Figure 3A arranged in
accordance with at least some embodiments described herein. The transfer function of the
annihilating filter component may be XAH(z) and may be referred to an annihilating transfer
function. The impulse response for such a transfer function may be referred to an annihilating
sequence xAH[n]. The example digital filter 610 may be implemented by cascading a digital
filter 620 having a transfer function, XU(z), and a digital filter 630 having a transfer function
XV(z). The digital filter 620 with transfer function XU(z) may be a combination of the halflattice
notch filters as shown in Figure 4 while the digital filter 630 with transfer function XV(z)
may be a combination of full-lattice notch filters as shown in Figure 5.
[0070] An annihilating transfer function has roots on the unit circle in the z-domain.
Thus, an annihilating sequence or annihilating transfer function may be characterized by [θAH,
LAH] where LAH is the number of roots for the annihilating transfer function and θAH is the roots
of the annihilating transfer function such that the root is given by ej2πθAH[l] which implies
32
XAH(f)=0 for f= θAH[l].
[0071] For example, an annihilating sequence, xAH1[n] may be given as [θAH, 6]={0.07,
0.18. 0.2, -0.2, 0.36, -0.36]. The annihilating transfer function XAH1(z) that corresponds to the
annihilating sequence xAH1[n] has six roots that includes two single roots (0.07 and 0.18) and
two conjugate pairs (0.2, -0.2, 0.36, and -0.36). Each single root (0.07 and 0.18) can be
characterized as transfer function for a half-lattice notch filter. Further, each conjugate pair may
be characterized as transfer function for full-lattice notch filter. The two half-lattice notch
filters may be cascaded together to form a digital filter 620 with transfer function XU(z)=(zej2π(
0.07))(z-ej2π(0.18)) where the transfer function for one half-lattice notch filter is (z-ej2π(0.07)) and
the transfer function for the other half-lattice notch filter is (z-ej2π(0.18)). One half-lattice notch
filter is configured to suppress or reduce the frequency component at f=0.07 and the other halflattice
notch filter is configured to suppress or reduce the frequency component at f=0.18. The
half-lattice coefficients may be calculated as KU1= -ej2π(0.07)=1<(-0.43) and KU2= -ej2π(0.18)=1<(-
0.32).
[0072] Alternatively, the two full-lattice notch filters may be cascaded together to form
a digital filter 630 with transfer function XU(z)=(z-ej2π(0.2))(z-ej2π(-0.2))(z-ej2π(0.36))(z-ej2π(-0.36))
where one transfer function for one full-lattice transfer function is (z-ej2π(0.2)) (z-ej2π(-0.2)) and the
transfer function for the other full-lattice transfer function is (z-ej2π(0.36))(z-ej2π(-0.36)). One fulllattice
notch filter is configured to suppress or reduce frequency components at f=-0.2 and f=0.2
and the other full-lattice notch filter is configured to suppress or reduce frequency components
at f=-0.36 and f=0.36. The full-lattice coefficients may be calculated as KV1= -cos(2π(0.2))=-
0.30902 and KV2= -cos(2π(0.36))=0.63742.
[0073] Figure 7 is a functional block diagram of a digital filter 700 arranged in
33
accordance with at least some embodiments described herein. A digital signal processor (DSP),
ASIC, FPGA, or any other specialized processor may be used to implement the digital filter
700. The digital filter may include several components including a microprocessor 702 that
may be a computing device that is configured to control the operations of the digital filter 700.
Further, the digital filter may include four function modules including an annihilating function
module 706, a minimum phase function module 708, a non-minimum phase function module
710, and a symmetric function module 712. In one embodiment, the depicted function modules
are each implemented in software instructions that are stored in program memory and executed
on the processor. In this embodiment, each of the modules are instructions stored in memory,
which may be the same as memory 704. Each function module may comprise a set of
interconnected notch filters. One set of notch filters may be half-lattice notch filters and another
set of notch filters may be full-lattice notch filters. Further, the digital filter 700 may be
configured to use memory 704 that is coupled to the processor 702 and configured to store CFM
configuration data which includes sets of half-lattice and full-lattice coefficients corresponding
respectively to the half-lattice sets and full-lattice sets of interconnected notch filters.
[0074] In an alternative embodiment, the modules 706-712 may take the form of a logic
circuit that may be realized as part of an FPGA. Each component may be designed separately,
or they may all be combined within a single logic circuit. Still further, as described herein, each
notch filter lattice structure that makes up the various components 706-712 may be
programmable and reused during different portions of the overall filtering operation. The filter
input/output sequences may be buffered to allow for reuse of the filter hardware components.
This may be desirable when the overall sampling rate of the digital signal is some fraction of the
internal processing rate of the filter 700. Thus, in this alternative embodiment, the
34
microprocessor 702, memory 704 as well as the function modules (706, 708, 710, and 712) may
be separate hardware modules coupled to each other by an internal bus 714. Other suitable
interconnections may be used between the microprocessor, memory and the function modules to
communicate with each other.
[0075] The structures described herein may be used for FIR filtering of real and
complex sequences. For stable filters, hDEN is an MP-sequence [2]. In most of the practical
digital filters, the corresponding sequence h34 also turns out to be an MP-sequence. In many
practical systems, typically filtering is performed in one of the two cases (i) real input sequence
with real impulse response (ii) complex input sequence with complex impulse response. In the
former case, it is easy to see that the LSF-Model of a real sequence is required for the CFM
based lattice structure. Further, the Multiplication operation may not be required (Table-IV,
below) in the lattice block LU and LV whenever α∈{-(½), 0}. This motivates us to bifurcate a
sequence x into two sequences xREAL and xCMPX as in the following Property-1. From Property-
1, an FIR filter with impulse response x can be realized as a cascade of two FIR filters with
impulse responses as xREAL and xCMPX as in Fig. 11. An LSF-Model of xREAL can be obtained by
setting the μVEC to zeros so that the spectral polynomials are always real. These two FIR filters
can be realized independently with CFM blocks.
35
Block Reflection Coefficient Input- x0[n] Add Mul Rot
ΛA κ(complex) complex 8 8 0
ΛA κ(real) real 2 2 0
ΛU
U κ (phasor), α ≠ 0 or 1
2
α ≠ − ⎛⎜ ⎞⎟
⎝ ⎠
complex 2 0 1
ΛU
U κ (phasor), α = 0 or 1
2
α = − ⎛⎜ ⎞⎟
⎝ ⎠
real 1 0 0
ΛV
V κ (real), α ≠ 0 or 1
2
α ≠ − ⎛⎜ ⎞⎟
⎝ ⎠
real 2 1 0
ΛV 1 V κ = ± , α = 0 or 1
2
α = − ⎛⎜ ⎞⎟
⎝ ⎠
real 4 0 0
TABLE 4: Arithmetic Complexity of Lattice Stages
[0076] Regarding the arithmetic complexity of the CFM, the notch filter LU in Fig. 4 can
be implemented with a Rotate-And-Accumulate (RAC) operation and the notch filter LV can be
implemented with a real Multiply-And-Accumulate (MAC) operation. The rotation part of RAC
may be realized with CORDIC algorithms (see reference [7] and [8]). Arithmetic complexity of
a complex multiplication as four real multiplications (Mul) and two real additions (Add) and the
operation of ej2πθw as a complex rotation operation (Rot) of w, the arithmetic complexity of
lattice stages is summarized in Table IV.
[0077] In some of the signal processing applications, it may be necessary to shape the
spectrum of a sequence, with a spectral function which is the auto-correlation of a reference
sequence. In communication systems, the Raised-Cosine or Root-Raised-Cosine spectral
36
functions are typically used to minimize Inter-Symbol-Interference(ISI) at a marginal increase
in the bandwidth. If [x:Lx+1)] is a reference sequence with desired spectrum, then this spectral
shaping requires an FIR filter with LP-impulse response as x† (Property-2/[1]). From the root
structure of x(Table-II/[1]), we obtain two alternate spectral decompositions of x† as
summarized in Property-2. The Table E gives the canonic FIR lattice structure based on
Property-2.
For a sequence [ ] 2
x : (Lx+1) , H04( f ) = X ( f ) and 04( ) x ∠H f = npmod(-L f)(Property-
2/[1]).
Principle: From Property-2, an FIR filter with transfer function †
04H (z) =X (z)and
†
4 0 x [n]=x[n]⊗x[n]can be realized as follows.
0 ( )1 ( ) 2 ( ) 3 4 SM �� →A z →�� → A z →�� → R z →�� →G →��
A(z) B(z) ( ) SM R z x G=K
( ) AH X z ( ) NA X z † ( )/ † [0] NA NA X z x † [0] j 2 AH
NA x e πα
( ) LP X z ( ) NLP X z † ( )/ † [0] NLP NLP X z x † [0] j 2 LP
NLP x eπα
As ( ) { ( ), ( ) } AH LP A z ∈ X z X z , A(z) requires one CFM block in AH C or LP C configuration (Fig.
3B, and Table B).
( ) SM R z requires one CFM block in SM C configuration (Fig. 3B, and Table B).
01 ( ) ( ): ( ) AH A z = X z H z requires one CFM block and 13H (z)requires another CFM block.
Hence 04H (z)requires two CFM blocks.
01 12 ( ) ( ): ( ), ( ) LP A z = X z H z H z and 23H (z)each require one CFM block. Hence 04H (z)requires
three CFM blocks.
The Example-20 to Example-22 illustrate this lattice structure.
TABLE E
[0078] Figure 8 is a flow chart 800 for an example method for determining an
example digital filter structure, arranged in accordance with at least some examples described
herein. The method may be implemented in the form of software instructions stored on a non37
transitory, tangible, computer readable medium, for execution on a microprocessor. The
method comprises obtaining a transfer function for a digital filter, as shown in block 802. The
transfer function may be provided by reading a data structure in memory, or by otherwise
receiving data from another software component such as a filter design program or via a user
interface. The transfer function may be provided in terms of z-transform coefficients, or it may
be derived from other components such as a desired finite impulse response. Once obtained, the
transfer function can be operated upon by a decomposition module in the form of a software
module, which decomposes the transfer function into one or more filter components, as shown
in block 804. The filter components may be an annihilating component, a minimum phase
component, a non-minimum phase component, and a symmetric component. The
decomposition module may incorporate a root-finding utility, or may call available software
library utilities to perform root finding. The described method may include representing each
filter component as a set of interconnected notch filters, as shown in block 806. As described
above, each set of notch filters may include at least one half-lattice notch filter and/or at least
one a full-lattice notch filter.
[0079] In order to decompose the filter components into the notch filter structures as
described herein, each filter component can be further decomposed. Specifically, the
annihilating component can be decomposed into a series combination of one or more half-lattice
notch filters and one or more full-lattice notch filters. The decomposition module implements
the coefficient manipulation described above to decompose the minimum phase component, the
non-minimum phase component, and the symmetric component into annihilating
subcomponents, and then represents them as a series and parallel combination of one or more
half-lattice notch filters and one or more full-lattice notch filters.
38
[0080] In embodiments of the methods described herein, a canonic filter module
structure can be used to implement a filter component such as an annihilating component, a
minimum phase component, a non-minimum phase component, and a symmetric component.
Such a canonic filter module may be implemented within a digital signal processor (DSP),
ASIC, FPGA, or any other specialized processor. Lattice coefficients of the half-lattice notch
filter and the full-lattice notch filter for each set of notch filters used in an annihilating
component, a minimum phase component, a non-minimum phase component, and a symmetric
component, and may be stored in a data structure defining the digital filter structure. Such a
data structure may be implemented in hardware and software in a digital signal processor
(DSP), ASIC, FPGA, or any other specialized processor. The data structure may set forth the
values of each of the filter variables shown in Figure 3B, including the roots of filter modules
1010, 1015, 1025, 1030, 1085, and gains for modules 1035, 1040, 1080 and delay values for
1065 and 1070.
[0081] Figure 9 is a functional block diagram illustrating an example computing
device 1300 used in a digital signal processing system, arranged in accordance with at least
some examples described herein. In a very basic configuration 1301, computing device 1300
typically includes one or more processors 1310 and system memory 1320. A memory bus 1330
can be used for communicating between the processor 1310 and the system memory 1320.
Depending on the desired configuration, processor 1310 can be of any type including but not
limited to a microprocessor (μP), a microcontroller (μC), a digital signal processor (DSP), or
any combination thereof. Processor 1310 can include one more levels of caching, such as a
level one cache 1311 and a level two cache 1312, a processor core 1313, and registers 1314.
The processor core 1313 can include an arithmetic logic unit (ALU), a floating point unit
39
(FPU), a digital signal processing core (DSP Core), or any combination thereof. A memory
controller 1315 can also be used with the processor 1310, or in some implementations the
memory controller 1315 can be an internal part of the processor 1310.
[0082] Depending on the desired configuration, the system memory 1320 can be of
any type including but not limited to volatile memory (such as RAM), non-volatile memory
(such as ROM, flash memory, etc.) or any combination thereof. System memory 1320 typically
includes an operating system 1321, one or more applications 1322, and program data 1324.
Application 1322 includes one or more canonical filter module routines 1323. Program Data
1324 includes CFM configuration data 1325.
[0083] Computing device 1300 can have additional features or functionality, and
additional interfaces to facilitate communications between the basic configuration 1301 and any
required devices and interfaces. For example, a bus/interface controller 1340 can be used to
facilitate communications between the basic configuration 1301 and one or more data storage
devices 1350 via a storage interface bus 1341. The data storage devices 1350 can be removable
storage devices 1351, non-removable storage devices 1352, or a combination thereof.
Examples of removable storage and non-removable storage devices include magnetic disk
devices such as flexible disk drives and hard-disk drives (HDD), optical disk drives such as
compact disk (CD) drives or digital versatile disk (DVD) drives, solid state drives (SSD), and
tape drives to name a few. Exemplary computer storage media can include volatile and
nonvolatile, removable and non-removable media implemented in any method or technology for
storage of information, such as computer readable instructions, data structures, program
modules, or other data.
[0084] System memory 1320, removable storage 1351 and non-removable storage
40
1352 are all examples of computer storage media. Computer storage media includes, but is not
limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM,
digital versatile disks (DVD) or other optical storage, magnetic cassettes, magnetic tape,
magnetic disk storage or other magnetic storage devices, or any other medium which can be
used to store the desired information and which can be accessed by computing device 1300.
Any such computer storage media can be part of device 1300.
[0085] Computing device 1300 can also include an interface bus 1342 for
facilitating communication from various interface devices (e.g., output interfaces, peripheral
interfaces, and communication interfaces) to the basic configuration 1301 via the bus/interface
controller 1340. Exemplary output interfaces 1360 include a graphics processing unit 1361 and
an audio processing unit 1362, which can be configured to communicate to various external
devices such as a display or speakers via one or more A/V ports 1363. Exemplary peripheral
interfaces 1360 include a serial interface controller 1371 or a parallel interface controller 1372,
which can be configured to communicate with external devices such as input devices (e.g.,
keyboard, mouse, pen, voice input device, touch input device, etc.) or other peripheral devices
(e.g., printer, scanner, etc.) via one or more I/O ports 1373. An exemplary communication
interface 1380 includes a network controller 1381, which can be arranged to facilitate
communications with one or more other computing devices 1390 over a network
communication via one or more communication ports 1382. The Communication connection is
one example of a communication media. Communication media may typically be embodied by
computer readable instructions, data structures, program modules, or other data in a modulated
data signal, such as a carrier wave or other transport mechanism, and includes any information
delivery media. A “modulated data signal” can be a signal that has one or more of its
41
characteristics set or changed in such a manner as to encode information in the signal. By way
of example, and not limitation, communication media can include wired media such as a wired
network or direct-wired connection, and wireless media such as acoustic, radio frequency (RF),
infrared (IR) and other wireless media. The term computer readable media as used herein can
include both storage media and communication media.
[0086] Computing device 1300 can be implemented as a portion of a small-form
factor portable (or mobile) electronic device such as a cell phone, a personal data assistant
(PDA), a personal media player device, a wireless web-watch device, a personal headset device,
an application specific device, or a hybrid device that include any of the above functions.
Computing device 1300 can also be implemented as a personal computer including both laptop
computer and non-laptop computer configurations.
[0087] In general, it should be understood that the circuits described herein may be
implemented in hardware using integrated circuit development technologies, or yet via some
other methods, or the combination of hardware and software objects that could be ordered,
parameterized, and connected in a software environment to implement different functions
described herein. For example, the present application may be implemented using a general
purpose or dedicated processor running a software application through volatile or non-volatile
memory. Also, the hardware objects could communicate using electrical signals, with states of
the signals representing different data.
[0088] It should be further understood that this and other arrangements described
herein are for purposes of example only. As such, those skilled in the art will appreciate that
other arrangements and other elements (e.g. machines, interfaces, functions, orders, and
groupings of functions, etc.) can be used instead, and some elements may be omitted altogether
42
according to the desired results. Further, many of the elements that are described are functional
entities that may be implemented as discrete or distributed components or in conjunction with
other components, in any suitable combination and location.
[0089] It should be further understood that this and other arrangements described
herein are for purposes of example only. As such, those skilled in the art will appreciate that
other arrangements and other elements (e.g. machines, interfaces, functions, orders, and
groupings of functions, etc.) can be used instead, and some elements may be omitted altogether
according to the desired results. Further, many of the elements that are described are functional
entities that may be implemented as discrete or distributed components or in conjunction with
other components, in any suitable combination and location.
[0090] The present disclosure is not to be limited in terms of the particular
embodiments described in this application, which are intended as illustrations of various
aspects. Many modifications and variations can be made without departing from its spirit and
scope, as will be apparent to those skilled in the art. Functionally equivalent methods and
apparatuses within the scope of the disclosure, in addition to those enumerated herein, will be
apparent to those skilled in the art from the foregoing descriptions. Such modifications and
variations are intended to fall within the scope of the appended claims. The present disclosure
is to be limited only by the terms of the appended claims, along with the full scope of
equivalents to which such claims are entitled. It is to be understood that this disclosure is not
limited to particular methods, reagents, compounds compositions, or biological systems, which
can, of course, vary. It is also to be understood that the terminology used herein is for the
purpose of describing particular embodiments only, and is not intended to be limiting.
[0091] With respect to the use of substantially any plural and/or singular terms
43
herein, those having skill in the art can translate from the plural to the singular and/or from the
singular to the plural as is appropriate to the context and/or application. The various
singular/plural permutations may be expressly set forth herein for sake of clarity.
[0092] It will be understood by those within the art that, in general, terms used
herein, and especially in the appended claims (e.g., bodies of the appended claims) are generally
intended as “open” terms (e.g., the term “including” should be interpreted as “including but not
limited to,” the term “having” should be interpreted as “having at least,” the term “includes”
should be interpreted as “includes but is not limited to,” etc.). It will be further understood by
those within the art that if a specific number of an introduced claim recitation is intended, such
an intent will be explicitly recited in the claim, and in the absence of such recitation no such
intent is present. For example, as an aid to understanding, the following appended claims may
contain usage of the introductory phrases "at least one" and "one or more" to introduce claim
recitations. However, the use of such phrases should not be construed to imply that the
introduction of a claim recitation by the indefinite articles "a" or "an" limits any particular claim
containing such introduced claim recitation to embodiments containing only one such recitation,
even when the same claim includes the introductory phrases "one or more" or "at least one" and
indefinite articles such as "a" or "an" (e.g., “a” and/or “an” should be interpreted to mean “at
least one” or “one or more”); the same holds true for the use of definite articles used to
introduce claim recitations. In addition, even if a specific number of an introduced claim
recitation is explicitly recited, those skilled in the art will recognize that such recitation should
be interpreted to mean at least the recited number (e.g., the bare recitation of "two recitations,"
without other modifiers, means at least two recitations, or two or more recitations).
Furthermore, in those instances where a convention analogous to “at least one of A, B, and C,
44
etc.” is used, in general such a construction is intended in the sense one having skill in the art
would understand the convention (e.g., “ a system having at least one of A, B, and C” would
include but not be limited to systems that have A alone, B alone, C alone, A and B together, A
and C together, B and C together, and/or A, B, and C together, etc.). In those instances where a
convention analogous to “at least one of A, B, or C, etc.” is used, in general such a construction
is intended in the sense one having skill in the art would understand the convention (e.g., “ a
system having at least one of A, B, or C” would include but not be limited to systems that have
A alone, B alone, C alone, A and B together, A and C together, B and C together, and/or A, B,
and C together, etc.). It will be further understood by those within the art that virtually any
disjunctive word and/or phrase presenting two or more alternative terms, whether in the
description, claims, or drawings, should be understood to contemplate the possibilities of
including one of the terms, either of the terms, or both terms. For example, the phrase “A or B”
will be understood to include the possibilities of “A” or “B” or “A and B.”
[0093] In addition, where features or aspects of the disclosure are described in terms
of Markush groups, those skilled in the art will recognize that the disclosure is also thereby
described in terms of any individual member or subgroup of members of the Markush group.
[0094] As will be understood by one skilled in the art, for any and all purposes, such
as in terms of providing a written description, all ranges disclosed herein also encompass any
and all possible subranges and combinations of subranges thereof. Any listed range can be
easily recognized as sufficiently describing and enabling the same range being broken down
into at least equal halves, thirds, quarters, fifths, tenths, etc. As a non-limiting example, each
range discussed herein can be readily broken down into a lower third, middle third and upper
third, etc. As will also be understood by one skilled in the art all language such as “up to,” “at
45
least,” “greater than,” “less than,” and the like include the number recited and refer to ranges
which can be subsequently broken down into subranges as discussed above. Finally, as will be
understood by one skilled in the art, a range includes each individual member. Thus, for
example, a group having 1-3 cells refers to groups having 1, 2, or 3 cells. Similarly, a group
having 1-5 cells refers to groups having 1, 2, 3, 4, or 5 cells, and so forth.
[0095] While various aspects and embodiments have been disclosed herein, other
aspects and embodiments will be apparent to those skilled in the art. The various aspects and
embodiments disclosed herein are for purposes of illustration and are not intended to be
limiting, with the true scope and spirit being indicated by the following claims.
[0096] Properties and Further Examples of the Canonic Lattice Filter Structures
Based on Notch Filters:
[0097] Property- 1
For a sequence [ :( +1)] x x L with factors as in Table-IV[1];
( ) ( ) ( ) ( );
; U U1 U 2 U U1 U 2 X z = X z X z L = L + L
X (z) U1 has LSFs [ ]1 1: U u L with [ ] ,0 .
2
1 1
⎭ ⎬ ⎫
⎩ ⎨ ⎧
u i ∈ −
X (z) U 2 has LSFs [ ] 2 2 : U u L with [ ] ,0 .
2
2 1
⎭ ⎬ ⎫
⎩ ⎨ ⎧
u i ≠ −
( ) ( ) ( ) ( );
; M M1 M 2 M M1 M 2 X z = X z X z L = L + L
X (z) M1 has roots [ ]1 1 : M M ρ L with [ ] ,0 .
2
1
1 ⎭
⎬
⎫
⎩ ⎨ ⎧
∠ i ∈ − M ρ
X (z) M 2 has roots [ ] 2 2 : M M ρ L with [ ] ,0 .
2
1
2 ⎭
⎬
⎫
⎩ ⎨ ⎧
∠ i ≠ − M ρ
( ) ( ) ( ) ( );
; N N1 N 2 N N1 N 2 X z = X z X z L = L + L
X (z) N1 has roots [ ]1 1 : N N ρ L with [ ] ,0 .
2
1
1 ⎭
⎬
⎫
⎩ ⎨ ⎧
∠ i ∈ − N ρ
X (z) N 2 has roots [ ]2 2 : N N ρ L with [ ] ,0 .
2
1
2 ⎭
⎬
⎫
⎩ ⎨ ⎧
∠ i ≠ − N ρ
( ) ( ) ( ) ( );
; C C1 C2 C C1 C2 X z = X z X z L = L + L
X (z) C1 has roots [ ]1 1 : C C ρ L with [ ] ,0 .
2
1
1 ⎭
⎬
⎫
⎩ ⎨ ⎧
∠ i ∈ − C ρ
46
X (z) C2 has roots [ ]2 2 : C C ρ L with [ ] ,0 .
2
1
2 ⎭
⎬
⎫
⎩ ⎨ ⎧
∠ i ≠ − C ρ
( ) ( ) ( ) ( ) ( ); 1 1 1 1 A z X z X z X z X z REAL U M N C
Δ
B (z) X (z)X (z)X (z)X (z); REAL V A B D
Δ
X (z) A (z)B (z); REAL REAL REAL
Δ
( ) ( ) ( ) ( ) ( ); 2 2 2 2 X z X z X z X z X z CMPX U M N C
Δ
X (z) X (z)X (z). REAL CMPX =
[0098] Property- 2
For a monic sequence [ :( +1)] x x L (Table-II/[1]);
X(z)=A(z)B(z) with A(z) and B(z) as follows.
A(z) B(z) A†(z)=ej2παA2(z) Remarks
XAH(z) XNA(z) j2 AH 2 ( )
AH eπα X z * [ ] j2 AH
AH AH x L =e πα
XLP(z) XNLP(z) j2 LP 2 ( )
LP eπα X z * [ ] j2 LP
LP LP x L =e πα
X†(z)= A†(z)B†(z)=ej2παA2(z)B†(z);
B†(z)=b†[0]RSM(z) with RSM(z) a monic SM-polynomial with coefficients rSM as follows.
B(z) B†(z) rSM
XNA(z) x [ ]R (z) NA SM † 0 [ : (2 +1)] SM NA r L
XNLP(z) x [ ]R (z) NLP SM † 0 [ : (2 +1)] SM NLP r L
X†(z)=KxA2(z)RSM(z) with Kx given as follows.
A(z) B(z) Kx
XAH(z) XNA(z) † [0] j2 AH
NA x eπα
XLP(z) XNLP(z) † [0] j2 LP
NLP x eπα
†[0]j2AH † [0]j2LP .
NA NLP x eπα =x eπα
EXAMPLES
47
[0099] Example- 1
Consider an AH-sequence with LSFs as [θAH:6]={0.07, 0.18, 0.2, -0.2, 0.36, -0.36}. Here
[u:2]={0.07, 0.18} and [v:2]={0.2, 0.36} and the corresponding AH-sequences are as follows.
[xAH:7]={1, 1.49148∠(-0.3246), 0.36087∠(0.05678), 1.35201∠(-0.375), 0.36087∠(0.19322),
1.49148∠(-0.4254), 1∠(0.25)}; LAH=6;
[xU:3]={1, 1.88176∠(-0.375), 1∠(0.25)}; LU=2;
[xV:5]={1, 0.65681, 1.2121, 0.65681, 1}; LV=2;
The Fig. 10 gives the frequency response of the above-AH-factors.
[00100] Example- 2
For the AH-sequences in Example-1;
[kU:2]={1∠(-0.43), 1∠(-0.32)};
[kV:2]={-0.30902, 0.63742};
[00101] Example- 3
Consider the AH-sequence xAH of x used in Example-1/[1]. The lattice structure of XAH(z) can
be realized with one CFM block in CAH (FIG. 3B, AND TABLE B).
The Lattice structure for hAB=xAH with CAH:
[xAH:4]={1, 1.44475∠(-0.43953), 1.44475∠(0.02953), 1∠(-0.41)}; u[0]=0.09; v[0]=0.21;
kU[0]=1∠(-0.41); kV[0]=-0.24869; NU=1; NV=1;
[00102] Example- 4
Consider the MP-sequence xMP of x in Example-1/[1].
The MP-sequence xMP(Table-II/[1]):
[xMP:4]={1, 0.72759∠(-0.02583), 0.90237∠(-0.01154), 0.162∠(-0.1)};
ρM[0]=0.2∠(0.4); ρA[0]=0.9∠(0.3);
The LSF-Model of xMP(Fig. 4/[1]) is obtained for μMP=0 and λMP=1 Example-1/[1]. The lattice
structure for XMP(z) can be realized with one CFM block in CMP(Fig. 3B, and Table B) as
follows.
The Lattice structure for = +B MP h x 0 in Fig. 3B, and Table B:
[ + : 5]
MP x ={1, 0.84939∠(-0.00419), 1.8, 0.84939∠(0.00419), 1};
48
[u:4]={-0.33994, -0.23189, 0.23766, 0.33417}; LV=0; [kU:4]={1∠(0.16006), 1∠ (0.26811),
1∠(-0.26234), 1∠(-0.16583};
The Lattice structure for = −B MP h x 1 in Fig. 3B, and Table B:
[ − : 5]
MP x ={1, 0.62435∠(-0.05535), 0.13078∠(-0.25), 0.62435∠(-0.44465), 1∠(-0.5)};
[u:4]={-0.29764, 0.01715, 0.29712, 0.48337}; LV=0;
[kU:4]={1∠(0.20236), 1∠(-0.48285), 1∠(-0.20288), 1∠(-0.01663};
The Lattice structure of MP x as in Fig. 3B, and Table B:
hB0 and hB1 as above; G0=GMP=0; NU=8; NV=0
[00103] Example- 5
Consider the NP-sequence xNP of x in Example-1/[1].
The NP-sequence xNP(Table-II/[1]):
[xNP:4]={1, 1.4588∠(0.25547), 2.2312∠(-0.18898), 5.55556∠(0.13)};
ρN[0]=2∠(-0.37); ρB[0]=0.6∠(0.18);
The LSF-Model of αMP (FIG. 5/[1]) is obtained for μMP=0 and λMP=1 Example-1/[1]. The
lattice structure for XNP(z) can be realized with one CFM block in CNP (Fig. 3B, and Table B)
as follows.
The Lattice structure for = +B MP h α 0 in Fig. 3B, and Table B:
[ + : 5]
MP a ={1, 0.23766}∠(0.28062), 0.37024, 0.23766∠(-0.28062), 1};
[u:4]={-0.34178, -0.15354, 0.12411, 0.37121}; LV=0;
[kU:4]={1∠(0.15822), 1∠(0.34646), 1∠(-0.37589), 1∠(-0.12879)};
The Lattice structure for = −B MP h α 1 in Fig. 3B, and Table B:
[ − : 5]
MP a ={1, 0.57525∠(0.3347), 0.37246∠(-0.25), 0.57525∠(0.1653), 1∠(-0.5)};
[u:4]={-0.45157, -0.23885, -0.02879, 0.21921}; Lv=0;
[kU:4]={1∠(0.04843), 1∠(0.26115), 1∠(0.47121), 1∠(-0.28079)};
The Lattice structure of NP x as in Fig. 3B, and Table B:
49
B0 h and B1 h as above; NU=8; NV=0;
G0=GMP=0; G1=KNP=5.55556∠(0.13);
[00104] Example- 6
Consider the SM-sequence xSM of x in Example-1/[1]
The SM-sequence xSM(Table-II)/[1]), Fig. 5/[1]):
[xSM:7]={1, 1.2746}∠(0.30285), 0.86793∠(0.10843), 2.96328∠(0.4), 0.86793∠(-0.30843),
1.2743), 1.2746∠(0.49715), 1∠(-0.2)};
ρC[0]=0.8∠(-0.1); ρD[0]=0.9∠(-0.3);
[αMP:4]={1, 0.58579∠(0.29157), 0.86026∠(0.09715), 0.67493∠(0.4)}; (Theorem-1/[1])
The LSF-Model of αMP(Fig. 3B, and Table B/[1]) is obtained for μMP=0 and λMP=1
Example-1/[1]. The lattice structure for XSM(z) can be realized with one CFM block in CSM
(Fig. 3B, and Table B) as follows.
The Lattice structure for = +B MP h α 0 in Fig. 3B, and Table B:
[ + :5]
MP α ={1, 0.71752∠(0.46211), 1.40985, 0.71752∠(-0.46211), 1}
[u:4]={-0.27113, -0.1671, 0.13415, 0.30408}; LV=0;
[kU:4]={1∠(0.22887), 1∠(0.3329), 1∠(-0.36585), 1∠(-0.19592)};
The Lattice structure for = −B MP h α 1 in Fig. 3B, and Table B:
[ − : 5]
MP α ={1, 1.04044∠(0.18806), 0.98617∠(0.25), 1.04044∠(0.31194), 1∠(-0.5)};
[u:4]={-0.45443, -0.23446, -0.11011, 0.299}; LV=0;
[kU:4]={1∠(0.04557), 1∠(0.26554, 1∠(0.38989), 1∠(-0.201)};
The Lattice structure of SM x in Fig. 3B, and Table B:
B0 h and B1 h as above; NU=8; NV=0;
G0=GMP=0; G1=KSM=1.48164∠(0.4);
[00105] Example-7
Consider the LP-sequence xLP of x used in Example-1/[1]. The lattice structure for
XLP(z)=XAH(z)XSM(z) can be realized with one CFM block as given in CLP. This structure uses
be CAH (Example-3) and CSM (Example-6).
50
[00106] Example-8
Consider the LP-sequence hLP (Table-V in Nguyen and Vaidyanathan [10]) presented in
Example-1/[3].
Characteristics of hLP(Table-II/[1]):
hLP[0]=2-7(0.75841): XLP(z) Δ HLP(z)/hLP[0];
[xLP:23]={1, -2.64691, 0.76951, 6.08388, -3.76609, -7.16357, 6.91654, 10.75691, -14.69693, -
10.90959, 52.85078, 96.05306, 52.85078, -10.90959, -14.69693, 10.75691, 6.91654, -7.16357, -
3.76609, 6.08388, 0.76951, -2.64691, 1};
[xAH:9]={1, 5.35888, 14.41278, 24.73732, 29.41694, 24.73732, 14.41278, 5.35888, 1};
[xSM:15]={1, -8.00578, 29.25875, -60.06195, 65.02339, -2.97119, -105.63161, 164.2252, -
105.63161, -2.97119, 65.02339, -60.06195, 29.25875, -8.00578, 1};
LLP=22, LU=0, LV=4, LC=1, LD=3
[v:4]={0.31328, 0.34636, 0.3914, 0.44797}:
[ρD:3]={0.51497∠(0.11084), 0.54854∠(0.04904), 0.64943∠(0.18523)}: ρC[0]=-0.87938;
Characteristics of xSM(Theorem-1/[1]):
[αMP:8]={1, -1.28642, -0.03618, 0.79188, -0.73146, 0.35632, -0.0975, 0.01218}; KSM=82.1126;
The LSF-Model of αMP with μ=0, γ=1 (Property-16/[1]) is used to obtain the lattice
structure of hLP as follows.
The Lattice structure for = +B MP h α 0 in Fig. 3B, and Table B:
[ + :9]
MP α ={1, -1.27425, -0.13368, 1.14821 -1.46292, 1.14821, -0.13368, -1.27425, 1};
[v:4]={0.00936, 0.12635, 0.026156, 0.47009}; LU=0;
[kV:4]={-0.99827, -0.70109, 0.07259, 0.98966};
The Lattice structure for = −B MP h α 1 in Fig. 3B, and Table B:
[ − : 9]
MP α = {1, -1.2986, 0.06131, 0.43556, 0, -0.43556, -0.06131, 1.2986, -1};
[u:2]={-0.5, 0}; [kU:2]={1, 1∠(-0.5)};
51
[v:3]={0.06409, 0.18992, 0.36038};
[kV:3]={-0.92001, -0.36857, 0.63928};
The Lattice structure for AB AH h = x with CAH:
[kV:4]={0.3872, 0.56911, 0.7761, 0.94703};
The Lattice structure for hLP in Fig. 3B, and Table B:
hAB, hB0 and hB1 as above; NU=2; NV=11;
G0=GMP=0; G1=KSMhLP[0];
[00107] Example- 9
Consider the Hilbert Transformer defined by the following Matlab function (Chapter-15, page-
223 [11]).
b=firmpm (30, [0.1 0.9], [1.0 1.0], ‘Hilbert’)
Consider a sequence hLP with coefficients as the Matlab output vector b.
Characteristics of hLP(Table-II/[1]):
hLP[0]= -0.0042; XLP(z) Δ HLP(z)/ hLP[0]:
[xLP:31] = {1, 0, 2.21232, 0, 4.48938, 0, 8.19924, 0, 14.19369, 0, 24.55829, 0, 46.9134, 0,
150.47865, 0, 150.47865, 0, -46.9134, 0, -24.55829, 0, -14.19369, 0, -8.19924, 0, -4.48938, 0, -
2.21232, 0, -1};
[xAH:3]={1, 0, -1};
[xSM:29]={1, 0, 3.21232, 0, 7.7017, 0, 15.90094, 0, 30.09463, 0, 54.65292, 0, 101.56632, 0,
252.04497, 0, 101.56632, 0, 54.65292, 0, 30.09463, 0, 15.90094, 0, 7.7017, 0, 3.21232, 0, 1};
LLP=30, LU=2, LV=0, LC=0, LD=7; [u:2]={-0.5, 0};
[ρD:7]={0.66304∠(0.25), 0.66579∠(0.31248), 0.66579∠(0.18752), 0.6772∠(0.37422),
0.6772∠(0.12578), 0.71537∠(0.06508), 0.71537∠(0.43492)};
Characteristics of xSM (Theorem-1/[1]):
KSM=126.02249;
52
[αMP:15]={1, 0, 0.80594, 0, 0.43368, 0, 0.2388. 0, 0.12618, 0, 0.061.11, 0, 0.02549, 0,
0.00794};
The LSF-Model of αMP with μ=0, λ=1 (Property-16/[1]) is used to obtain the lattice structure of
xSM as follows.
The Lattice structure for = +B MP h α 0 in Fig. 3B, and Table B:
[ + :16]
MP α ={1, 0.00794, 0.80594, 0.02549, 0.43368, 0.06111, 0.2388, 0.12618, 0.12618, 0.2388,
0.06111, 0.43368, 0.02549, 0.80594, 0.00794, 1};
u[0] = -0.5; kU[0]=1;
[v:7]={0.04658, 0.11621, 0.17849, 0.2361, 0.2923, 0.35212, 0.41697}
[kV:7]={-0.95748, -0.74508, -0.43437, -0.08723, 0.26264, 0.59852, 0.86697};
The Lattice structure for = −B MP h α 1 in Fig. 3B, and Table B:
[ − :16]
MP α ={1, -0.00794, 0.80594, -0.02549, 0.43368, -0.06111, 0.2388, -0.12618, 0.12618, -
0.2388, 0.06111, -0.43368, 0.02549, -0.80594, 0.00794, -1}:
u[0]=0; kU[0]=-1;
[v:7]={0.08303, 0.14788, 0.2077, 0.2639, 0.32151, 0.38379; 0.45342};
[KV:7]={-0.86697, -0.59852, -0.26264, 0.08723, 0.43437, 0.74508, 0.95748};
The Lattice structure for AB AH h = x with AH C :
[ : 2]={− 0.5,0};[ : 2]={1,1∠(− 0.5)} υ u k
The Lattice structure of LP h in Fig. 3B, and Table B:
0 , AB B h h and B1 h as above; = 4 U N ; =14 V N
0 0 = = MP G G ; [0] 1 SM LP G = K h
[00108] Example- 10
Consider the sequence x used in Example -1/[1]. The lattice structure for X(z) can be realized
with three CFM blocks based on the LSF-A model of x as in Fig. 5. The lattice structures of the
transfer functions XLP(z), XMP(z), XNP(z) are given by Example -3 to Example-7.
[00109] Example 11
53
The LSF-C Model of x (Table III/[1]) uses the LP-sequences NA x + of the NA-sequence xNA with
two model parameters μVEC[0] and λVEC[1]. These sequences corresponding to x in Example-
1/[1] can be summarized as follows.
μVEC[0] = 0; λVEC[1]=1;
[xNA:13] = {1, 2.55782 ∠ (0.23427), 0.71216 ∠ (−0.06613), 9.6506 ∠ (0.21362), 5.0452
∠ (0.43954), 17.30626 ∠ (0.25938), 20.89266 ∠ (0.49388), 6.69387 ∠ (−0.28057), 8.59387
∠ (−0.3042), 3.93104 ∠ (−0.11924), 0.9 ∠ (−0.17)};
[ +
NA x :14] = {1, 3.40384 ∠ (0.21771), 4.26286 ∠ (0.09472), 17.5132 ∠ (0.25621, 10.33535
∠ (0.34788), 34.97506 ∠ (0.35336), 31.25423 ∠ (-0.46996), 31.25423 ∠ (0.46996), 34.97506
∠ (−0.35336), 10.33535 ∠ (−0.34788), 17.5132 ∠ (−0.25621), 4.26286 ∠ (−0.09472), 3.40384
∠ (−0.21771), 1};
[ −
NA x :14] = {1, 1.76599 ∠ (0.26636), 3.70791 ∠ (−0.35253, 5.22162 ∠ (0.04002), 5.80555
∠ (−0.34985), 20.25041 ∠ (0.05364), 13.34237 ∠ (0.40543), 13.34237 ∠ (0.09457), 20.25041
∠ (0.44636), 5.80555 ∠ (−0.15015), 5.22161 ∠ (0.45998), 3.70791 ∠ (−0.14747), 1.76599
∠ (0.23364), 1 ∠ (−0.5) };
From Property -15/[1] when X1(z) = XNA(z), 1
+ X = NA X + (z) are LP-sequences with the
following characteristics.
The LP-sequence 1
+ X = NA X + (Table –I)
[ AH : 2]
Px = {1, 1 ∠ (-0.16352)}; + θ [0] = 0.33648;
[ SM :13]
P x = {1, 4.19339 ∠ (0.24359), 0.39525 ∠ (0.30931), 17.21118 ∠ (0.25855), 20.23433
∠ (−0.49028), 14.78917 ∠ (0.36315), 40.53399 ∠ (−0.41824), 14.78917 ∠ (−0.19963),
20.23433 ∠ (−0.3462), 17.21118 ∠ (−0.09503), 0.39525 ∠ (−0.14579), 4.19339 ∠ (0.08007,
1 ∠ (0.16352)};
SM
P K = 20.26699 ∠ (−0.41824);
[ : 7] MP a = {1, 0.72972 ∠ (0.21861), 0.99839 ∠ (0.07204), 0.84922 ∠ (0.32321),
0.20691 ∠ (0.33817), 0.04934 ∠ (−0.41824};
The LP-sequence 1 x− = −
NA x (Table-II):
[ AH : 4]
Q x = {1, 0.65985 ∠ (0.29338), 0.65985 ∠ (0.08789), 1 ∠ (0.38126)};
[ : 3] − θ = {-0.30051, -0.11212, 0.29389};
54
[ SM :11]
Q x {1, 1.12118 ∠ (0.25052), 3.73919 ∠ (−0.34372), 3.91145 ∠ (0.03109), 3.96567
∠ (−0.30722), 11.78647 ∠ (0.05937), 3.96567 ∠ (0.42595), 39.1145 ∠ (0.08764), 3.73919
∠ (0.46245), 1.12118 ∠ (−0.13178), 1 ∠ (0.11874) };
SM
Q K = 5.89323 ∠ (0.05937);
[ : 6] MP a = {1, 0.67292 ∠ (0.36659), 0.66372 ∠ (0.02827), 0.63449 ∠ (0.40308), 0.19025
∠ (−0.19115), 0.16969 ∠ (0.05937)};
[00110] Example – 12
Consider the LP-sequence +
NA x in Example 11. The lattice structure for the transfer function
z X (z) NA
−DPQ + can be obtained with one CFM block in CLP (Fig. 3B, and Table B) as in Table-I.
Structure for AH
AB P h = x :
Lu = 1; Lv = 0; ku[0] = 1 ∠ (−0.16352)
Structure for = +B MP h a 0
[ + : 8]
MP a = {1, 0.74655 ∠ (0.22861), 0.83094 ∠ (0.05079), 0.83321 ∠ (0.32532), 0.83321
∠ (−0.32532), 0.83094 ∠ (−0.05079), 0.74655 ∠ (−0.22861), 1}
[u : 7] = {−0.45843, −0.28614, −0.25115, −0.1379, 0.05259, 0.27522, 0.30522}; Lv=0
[ : 7] u k = {1 ∠ (0.04157), 1 ∠ (0.21386), 1 ∠ (0.24885), 1 ∠ (0.3627), 1 ∠ (−0.44741),
1 ∠ (−0.22478), 1 ∠ (−0.19478) };
Structure for = −B MP h a 1
[ − : 8]
MP a = {1, 0.7159 ∠ (0.20818), 1.17844 ∠ (0.087), 0.86538 ∠ (0.32118), 0.86538
∠ (0.17882), 1.17844 ∠ (0.413), 0.7159 ∠ (0.29182), 1 ∠ (−0.5) };
[u : 7] = {−0.36011, −0.25475, −0.20589, −0.06398, 0.1817, 0.2996, 0.40343} Lv=0;
[ : 7] u k = {1 ∠ (0.13989), 1 ∠ (0.24525), 1 ∠ (0.29411), 1 ∠ (0.43602), 1 ∠ (−0.3183),
1 ∠ (−0.2004), 1 ∠ (0.09657) };
Structure for +
NA x :
0 , AB B h h and B1 h as above; Nu = 15; Nv = 0;
G0 = GMP = 0; G1 = SM
P K ; D1 = DP = 0;
55
[00111] Example – 13
Consider the LP-sequence −
NA x in Example -11. The lattice structure for the transfer function
z X (z) NA
−DPQ − can be obtained with one DFM block in CLP (Fig. 3B, and Table B) as in Table-I.
Structure for AH
AB Q h = x
[ : 3] u k = {1 ∠ (0.19949), 1 ∠ (0.38788), 1 ∠ (−0.20611)}; Lu = 3; Lv = 0
Structure for = +B MP h a 0 :
[ + : 7]
MP a = {1, 0.5268 ∠ (0.34351), 0.77985 ∠ (0.06167), 1.04089 ∠ (-0.5), 0.77985
∠ (−0.06167), 0.5268 ∠ (−034351), 1};
[u : 6] = {−0.34452, −0.24261, −0.11914, 0.05795, 0.27851, 0.36985}; LV = 0;
[ : 6] u k = {1 ∠ (0.15548), 1 ∠ (0.25739), 1 ∠ (0.38086), 1 ∠ (−0.44205), 1 ∠ (−0.22149, 1
∠ (−0.13018)};
Structure for = −B MP h a 1 :
[ − : 7]
MP a = { 1, 0.82808 ∠ (0.38124), 0.5876 ∠ (−0.01631), 0.72585 ∠ (0.25), 0.5876
∠ (−0.48369), 0.82808 ∠ (0.11876), 1 ∠ (−0.5)};
[u : 6] = {-0.46741, -0.27206, - 0.15692, -0.06125, 0.16833, 0.28931}; LV = 0;
[ : 6] u k = {1 ∠ (0.03259), 1 ∠ (0.22794), 1 ∠ (0.34308), 1 ∠ (0.43875, 1 ∠ (−0.33167),
1 ∠ (−0.21069)};
Structure for −
NA x :
0 , AB B h h and B1 h as above; Nu = 15; Nv = 0;
G0 = GMP = 0; G1 = SM
Q K ; D1 = DQ = 0;
[00112] Example – 14
Consider the sequence x used in Example -1/[1]. The lattice structure for X(z) can be realized
with the LSF-C model of x using the configuration Cc(Fig. 6).
CFM1 in configuration (4.1) as in Example – 3.
CFM2 in configuration (4.2) as in Example – 12.
CFM3 in configuration (4.3) as in Example – 13.
[00113] Example 15
56
The LSF-D Model of x (Table-III/[1]) uses the LP-sequences +
NLP x of the NLP-sequence xNLP
with two model parameters μVEC[0] and λVEC[1]. These sequences corresponding to x in
Example-1/[1] can be summarized as follows.
μVEC[0] = 0; λVEC[1] = 1;
[ : 7] NLP x = {1, 1.49755 ∠ (0.17643), 2.16042 ∠ (−0.08347), 5.69442 ∠ (0.11206), 4.02355
∠ (0.02943), 4.71534 ∠ (0.11175), 0.9 ∠ (0.03)};
[ + : 8]
NLP x = {1, 1.94459 ∠ (0.10293), 6.85239 ∠ (−0.10288), 8.803 ∠ (0.05432), 8.803
∠ (−0.05432), 6.85239 ∠ (0.10288), 1.94459 ∠ (−0.10293), 1};
[ − : 8]
NLP x = {1, 1.52443 ∠ (0.27265), 2.61695 ∠ (0.36494), 4.44274 ∠ (0.23618), 4.44274
∠ (0.26382), 2.61695 ∠ (0.13506), 1.52443 ∠ (0.22735), 1 ∠ (−0.5) };
From Property -15/[1] when ( ) ( ), ( ) ( ) 1 1 X z X z X z X z NLP NLP
= + = + are LP-sequences with the
following characteristics.
The LP-sequence + = +NLP x x 1 (Table-I):
[ AH : 4]
P x = {1, 1.13644 ∠ (0.19318), 1.13644 ∠ (0.11361), 1 ∠ (0.30679)};
[ ;3] + θ = {−0.26528, −0.23866, 0.31074};
[ SM : 5]
P x {1, 1.15973 ∠(0.0147), 7.47951 ∠(−0.1534), 1.15973 ∠(−0.32149),
1 ∠(−0.30679)};
SM
P K = 3.73976 ∠(−0.1534);
[ : 3] MP a = {1, 0.31011 ∠ (−0.16809), 0.2674 ∠(−0.1534)};
The LP-sequence − = −NLP x x 1 (Table-II):
[ AH : 4]
Q x = {1, 0.96522 ∠(-0.2331), 0.96522 ∠(-0.13248), 1 ∠(-0.36558)};
[ : 3] − θ = {-0.3155, 0.17436, 0.27556};
[ SM : 5]
Q x = {1, 2.48927 ∠(0.27042), 5.17073 ∠(0.43279), 2.48927 ∠(−0.40484),
1 ∠(−0.13442)};
SM
Q K = 2.58536 ∠(0.43279);
[ : 3] MP a = {1, 0.96283 ∠(0.16237), 0.38679 ∠(0.43279)};
57
[00114] Example-16
Consider the LP-sequence +
NLP x in Example-15. The lattice structure for the transfer function
z X (z) NLP
−DPQ + can be obtained with one DFM block in CLP (Fig. 3B, and Table B) as in Table-I.
Structure for AH
AB P h = x :
LU = 3; LV = 0
[ : 3] u k = {1 ∠ (0.23472), 1 ∠(0.26134), 1 ∠(−0.18926)};
Structure for = +B MP h a 0 :
[ + : 4]
MP a = {1, 0.30928 ∠(−0.026), 0.30928 ∠(0.026), 1};
[u : 3] = {−0.19061, 0.19655, 0.49406}; LV=0;
[ : 3] u k = {1 ∠ (0.30939), 1 ∠(−0.30345), 1 ∠(−0.00594)};
Structure for = −B MP h a 1 :
[ − : 4]
MP a = {1, 0.48958 ∠(−0.24996), 0.48958 ∠(−0.25004), 1 ∠(−0.5)};
[u : 3] = {-0.3562, 0.05344, 0.30275}; LV=0
[ : 3] u k = {1 ∠(0.1438), 1 ∠(−0.44656), 1 ∠(−0.19725);
Structure for +
NLP x :
0 , AB B h h and B1 h as above; Nu = 9; Nv = 0;
G0 = GMP = 0; G1 = SM
P K ; D1 = DP = 0;
[00115] Example-17
Consider the LP-sequence −
NLP x in Example-15. The lattice structure for the transfer functions
z X (z) NLP
−DPQ − can be obtained with one CFM block CLP (Fig. 3B, and Table B) as in Table-I.
Structure for AH
AB Q h = x :
LU = 3; LV=0;
[ : 3] U k = {1 ∠(0.1845), 1 ∠(−032564), 1 ∠(−0.22444)};
Structure for = +B MP h a 0 :
[ + : 4]
MP a = {1, 0.679}; ∠(0.21432), 0.679 ∠(−0.21432), 1};
[u : 3] = -0.42083, −0.22832, 0.14915}; LV=0;
58
[ : 3] u k = {1 ∠ (0.07917), 1 ∠(0.27168), 1 ∠(−0.35085)};
Structure for = −B MP h a 1
[ − : 4]
MP a = {1, 1.30087 ∠(0.13561, 1.30087 ∠(0.36439) 1 ∠(−0.5)};
[u : 3] = {−0.3822, −0.08502, 0.46722}; LV=0
[ : 3] u k = {1 ∠(0.1178), 1 ∠(0.41498), 1 ∠(−0.03278};
Structure for −
NLP x :
0 , AB B h h and B1 h as above; Nu = 9; Nv = 0;
G0 = GMP = 0; G1 = SM
Q K ; D1 = DQ = 0;
[00116] Example – 18
Consider the sequence x used in Example -1/[1]. The lattice structure for X(z) can be realized
with the LSF-D model of x using the configuration CD(Fig. 6).
CFM1 in configuration (4.1) as in Example – 7.
CFM2 in configuration (4.2) as in Example – 16.
CFM3 in configuration (4.3) as in Example – 17.
[00117] Example – 19
Consider a rational transfer function defined by the following Matlab function (Chapter-4, page
65[11]);
[b, a] = ellip(4, 1, 60, 0.01);
Consider two sequences hNUM and hDEN with coefficients as the Matlab output vectors b and a
respectively
Characteristics of hNUM :
hNUM [0] = 0.001; ( ) ( ) / [0] 12 NUM NUM H z H z h Δ ;
[ : 5] 12 h = {1, 3.95562, 5.9115, −3.95562, 1};
LV=0, LV=2; [v:2] = [0.01323, 0.03086};
The Lattice structure for 12 h h AB = with CAH:
[ : 2] v k = {-0.99655, -0.98126};
Characteristics of hDEN (MP-sequence):
[ : 5] DEN h = {1, −3.96921, 5.9091, −3.91054, 0.97065};
[ : 4] 34 h = {1, −1.48873, 0.98522, −0.24455};
59
The LSF-Model of h = aMP 34 (MP-sequence) with μ = 0, λ = 1 (Property-16/[1]) is used to
obtain its lattice structure as follows.
The Lattice structure for = +B MP h a 0 in Fig. 3B, and Table B:
[ + : 4]
MP a = {1, −0.66651, −0.66651, 1};
u[0] = −0.5; ku[0] = 1;
v[0] = 0.09324; kv[0] −0.83325;
The Lattice structure for = −B MP h a 1 in Fig. 3B, and Table B:
[ − : 4]
MP a = {1, −1.98784, −1.98784, 1};
u[0] = -0; ku[0] = −1;
v[0] = 0.16778; kv[0] −0.49392;
The Lattice structure of 34 h in Fig. 3B, and Table B:
B0 h and B1 h as above; 0 0.24455 MP G =G =− ;
The Lattice structure for 05H (z)in Fig. 7:
A C F M1 block with AB h as above with 0; 2 U v N= N= ;
A C F M2 block for 34 h as above with 2; 2 U v N= N= ;
[00118] Example-20
Consider the following sequence x .
Characteristics of x (Table-II/[1]):
[ ]
1, 3.90954 (0.44862), 17.99403 ( 0.07946),
36.37737 (0.28518), 52.18123 ( 0.30352),
:11 62.45664 (0.20104), 62.00177 ( 0.27873),
48.11173 (0.18008), 19.93911 ( 0.42051),
3.6278 (0.03468), 0.64 (0.49)
x
⎧ ∠ ∠− ⎫
⎪ ∠ ∠− ⎪⎪
= ∠ ∠ − ⎨⎪
⎪ ∠ ∠−
∠ ∠ ⎪⎩
⎪⎪⎪⎬⎪⎪⎪⎭
[ : 2 ] { 0.09, 0.3 } ; 0.39; 0.21 AH LP u = α =− α = ;
[ : 3 ] { 1, 1.58031 ( 0.305), 1 (0.39) } v x = ∠− ∠ ;
60
[ : 2 ] { 0.4 ( 0.27), 0.2 (0.16) } M ρ = ∠ − ∠
[ : 3 ] { 1, 0.23501 (0.28901), 0.08 ( 0.11) } m x = ∠ ∠ − ;
[ : 2 ] { 0.5 ( 0.37), 0.25 (0.18) } N ρ = ∠ − ∠ ;
[ : 3 ] { 1, 2.18703 ( 0.2744), 8 ( 0.19) } N x = ∠− ∠ − ;
[ : 2 ] { 0.3 ( 0.2), 0.8 ( 0.1) } c
ρ = ∠ − ∠− ;
[ ] 1, 5.42727 (0.33563), 9.06637 ( 0.3),
:5
c 5.42727 (0.06437), 1 (0.4) x
⎧ ∠ ∠− ⎫
=⎨⎩ ∠ ∠ ⎬⎭
;
[ ]
1, 4.59033 (0.37851), 7.98373 ( 0.14618),
: 7 9.0607 (03.95), 7.98373 ( 0.06382)
4.59033 (0.41149), 1 ( 0.21)
LP x
⎧ ∠ ∠− ⎫
=⎨⎪ ∠ ∠ − ⎪⎬
⎩⎪ ∠ ∠− ⎪⎭
;
Here, ( ) ( ) AH U X z =X z and ( ) ( ) SM C X z =X z . The lattice structure for ( ) AH X z can be realized
with one CFM block in AH C (Fig. 3B, and Table B).
The Lattice structure for AB AH h =x with AH C :
[ : 2 ] { 1 ( 0.41), 1 ( 0.2) } ; 2; 0 U U v k = ∠ − ∠ − N= N = ;
Characteristics of SM x (Property-2):
4.53318 ( 0.3) SM K = ∠− ;
[ : 3 ] { 1, 1.19723 (0.36437), 0.2206 ( 0.3) } MP α = ∠ ∠ − ;
The LSF-Model of MP α (Fig. 4/[1]) is obtained for 0 MP μ = and 1 MP λ =
Example-1/[1]. The lattice structure for ( ) SM X z can be realized with one CFM block in
SM C (Fig. 3B, and Table B) as follows.
The Lattice structure for B0 mp h =α + in Fig. 3B, and Table B:
61
: 4 { 1, 1.40272 (0.35451), 1.40272 ( 0.35451), 1 } MP ⎡⎣α + ⎤⎦= ∠ ∠ − ;
[ : 3 ] { 0.40184, 0.1287, 0.03055 } ; 0 v u= − − L=
[ : 3 ] { 1 (0.09816), 1 (0.3713), 1 ( 0.46945) } U k = ∠ ∠ ∠ −
The Lattice structure for B1 MP h =α − in Fig. 3B, and Table B:
: 4 { 1, 0.99821 (0.37823), 0.99821 (0.12177, 1 ( 0.5) } MP ⎡⎣α − ⎤⎦= ∠ ∠ ∠ − ;
[ : 3 ] { 0.18977, 0.12115, 0.31092 } ; 0; v u= − − L=
[ : 3 ] { 1 (0.31023), 1 (0.37885), 1 ( 0.18908) } U k = ∠ ∠ ∠ − ;
The Lattice structure of SM x in Fig. 3B, and Table B:
B0 h and B1 h as above;
0 1
6; 0;
0; ;
U v
MP SM
N N
G G G K
= =
= = =
[00119] Example-21
Consider the sequence x in Example-20. The lattice structure of x† (Fig. 9) can be obtained as
follows. For ( ) ( ) AH A z = X z the lattice structure of AH x can be realized with AB h as in Example-
20.
Characteristics of †
NA x (Property-2):
[ ]
1, 4.18335 (0.38699),
16.53667 ( 0.13655), 51.45607 (0.20062),
:9
82.90567 ( 0.46869), 60.19101 ( 0.12403),
19.44521 (0.23597), 3.70248 ( 0.31138), 0.64 (0.1)
NA x
⎧ ∠ ⎫
=⎨⎪⎪⎪ ∠∠ −− ∠∠ − ⎪⎪⎪⎬
⎩⎪ ∠ ∠− ∠ ⎪⎭
;
†[0] 0.64 ( 0.1); ( ) †( ) / † [0] NA SM NA NA x = ∠ − R z =X z x ;
0.64 ( 0.49); 10803.3055 (0.1) x SM K= ∠ − K = ∠ ;
62
[ ]
1, 9.93999 (0.40115),
69.77673 ( 0.15831), 363.72642 (0.2433),
1289.8725 ( 0.35621), 3973.67323 (0.04142),
9959.15061 (0.40987), 17758.67585 ( 0.24181),
:17
21606.61099 (0.1), 17758.67585 (0.44181),
9959.150
SM r
∠
∠ − ∠
∠ − ∠
∠ ∠−
=
∠ ∠
61 ( 0.20987), 3973.67323 (0.15858),
1289.8725 ( 0.44379), 363.72642 ( 0.0433),
69.77673 (0.35831), 9.93999 ( 0.20115), 1 (0.2)
⎧ ⎫
⎪ ⎪
⎪ ⎪
⎪ ⎪
⎪ ⎪
⎪ ⎪
⎨ ⎬
⎪ ⎪
⎪ ∠ − ∠ ⎪
⎪ ⎪
⎪ ∠ − ∠ − ⎪
⎩⎪ ∠ ∠− ∠ ⎪⎭
;
[ ]
1, 1.64382 (0.34181), 0.92186 ( 0.30987),
0.36782 (0.05858), 0.1194 (0.45621),
:9
0.03367 ( 0.1433), 0.00646 (0.25831),
0.00092 ( 0.30115), 0.00009 (0.1)
MP α
⎧ ∠ ∠− ⎫
=⎨⎪⎪⎪ ∠∠ − ∠∠ ⎪⎪⎪⎬
⎩⎪ ∠ − ∠ ⎪⎭
;
The LSF-Model of MP α (Fig. 4/[1]) is obtained for 0 MP μ = and 1 MP λ = . The lattice structure for
( ) SM R z can be realized with one CFM block in SM C (Fig. 3B, and Table B) as follows.
The Lattice structure for B0 MP h =α + in Fig. 3B, and Table B:
1, 1.64373 (0.34181),
0.92116 ( 0.30997), 0.36523 (0.05601),
:10 0.11087 (0.411), 0.11087 ( 0.411),
0.36523 ( 0.05601), 0.92116 (0.30997),
1.64373 ( 0.34181), 1
MP α +
⎧ ∠ ⎫
⎡⎣ ⎤⎦=⎨⎪⎪⎪ ∠∠− ∠ −∠ ⎪⎪⎪⎬
⎪⎪ ∠ − ∠ ⎪⎪
⎩⎪ ∠ − ⎪⎭
[ ] 0.45207, 0.33441, 0.22259, 0.15918, 0.1111,
: 9 ; 0
0.00073, 0.12011, 0.25341, 0.40509 v u L
⎧− − − − − ⎫
=⎨ ⎬ =
⎩ ⎭
;
[ ]
1 (0.04793), 1 (0.16559), 1 (0.27741),
: 9 1 (0.34082), 1 (0.3889), 1 ( 0.49927), 1 ( 0.37989),
1 ( 0.24659), 1 ( 0.09491)
v k
⎧∠ ∠ ∠ ⎫
=⎨⎪∠ ∠ ∠ − ∠ − ⎪⎬
⎩⎪∠ − ∠ − ⎪⎭
;
The Lattice structure for B1 MP h =α − in Fig. 3B, and Table B:
63
1, 1.64391 (0.34182),
0.92257 ( 0.30977), 0.3705 (0.06111)
:10 0.13596 (0.49291), 0.13596 (0.00709),
0.3705 (0.43889), 0.92257 ( 0.19023),
1.64391 (0.15818), 1 ( 0.5)
MP α −
⎧ ∠ ⎫
⎡⎣ ⎤⎦=⎨⎪⎪⎪ ∠∠ − ∠∠ ⎪⎪⎪⎬
⎪⎪ ∠ ∠− ⎪⎪
⎩⎪ ∠ ∠− ⎪⎭
;
[ ] 0.3915, 0.27835, 0.16733, 0.15866, 0.05549,
: 9 ; 0
0.05893, 0.18461, 0.32753, 0.48027 v u L
⎧− − − − − ⎫
=⎨ ⎬ =
⎩ ⎭
;
[kU:9]={1∠(0.1085), 1∠(0.22165), 1∠(0.33267), 1∠(0.34134), 1∠(0.44451), 1∠(-
0.44107), 1∠(-0.31539), 1∠(-0.17247), 1∠(-0.01973)};
The Lattice structure of rSM of xNA in Fig. 9:
hB0 and hB1 as above; NU=18; NV=0;
G0=GMP=0; G1=KSM;
[00120] Example- 22
Consider the sequence x in Example-20. The lattice structure of x† (Fig 9) can be
obtained as follows. For A(z)=XLP(z) the lattice structure of xLP can be realized by one
CFM block with xAH and xSM realized as in Example-20.
Characteristics of XNLP(Property-2):
[xNLP:5]={1, 1.97254∠(-0.28176), 8.23189∠(-0.17971), 1.70613∠(0.09732), 0.64∠(-
0.3)}:
†
NLP x [0]=0.64∠(0.3), RSM(z)= †
NLP X (z)/ †
NLP x [0];
Kx=0.64∠(-0.49); KSM=59.35585∠(-0.3);
[rSM:9]={1, 4.34306∠(-0.34857), 15.66228∠(-0.13152), 35.88468∠(-0.48307),
118.7117∠(-0.3), 35.88468∠(-0.11693), 15.66228∠(-0.46848), 4.34306∠(-0.25143),
1∠(0.4)};
[αMP:5]={1, 0.60457∠(0.18307), 0.26387∠(-0.16848), 0.07317∠(0.04857), 0.01685∠(-
0.3)};
64
The LSF-Model of αMP (Fig. 4/[1]) is obtained for μMP=0 and λMP=1. The lattice
structure for RSM(z)can be realized with one CFM block in CSM(Fig. 3B, and Table B) as
follows.
The Lattice structure for = +B MP h α 0 in Fig. 3B, and Table B:
[ + : 6]
MP α ={1, 0.61717∠(0.18599), 0.32116∠(-0.14357), 0.32116∠(0.14357), 0.61717∠(-
0.18599), 1};
[u:5]={-0.43906, -0.31595, -0.14669, 0.09751, 0.3042}; LV=0
[kU:5]={1∠(0.06094), 1∠(0.18405), 1∠(0.35331), 1∠(-0.40249), 1∠(-0.1958)};
The Lattice structure for = −B MP h α 1 in Fig. 3B, and Table B:
[ − : 6]
MP α ={1, 0.59217∠(0.18004), 0.21638∠(-0.20564), 0.21638∠(-0.29436),
0.59217∠(0.31996), 1∠(-0.5)};
[u:5]={-0.35871, -0.25423, -0.01776, 0.19714, 0.43356}; LV=0;
[kU:5]={1∠(0.14129), 1∠(0.24577), 1∠(0.48224), 1∠(-0.30286), 1∠(-0.06644)};
The Lattice structure of rSM of xNLP in Fig. 9:
hB0 and hB1 as above; NU=10; NV=0;
G0=GMP=0; G1=KSM.
[00121] The following publications [1] through [11] are hereby incorporated herein
by reference for all purposes:
[1] S. S Yedlapalli and KVS Hari. The line spectral frequency model of a finite length
sequence. IEEE Journal of Selected Topics in Signla Processing – Special issue on Model
Order Selection for Signal Processing Systems, June-2010.
[2] Alan V. Oppenheim. The Discrete Time Signal Processing. PHI, 1987.
65
[3] S. S. Yedlapalli and KVS Hari. The Canonic Linear-Phase FIR Lattice Structures.
National Conference on Communications, NCC2010, IIT-Madras, 29-31, Jan2010.
[4] M.H. Hayes. Statistical Digital Signal Processing. John Wiley & Sons, 2003.
[5] S.K. Mitra and J.F. Kaiser. Handbook for Digital Signal Processing. John Wiley & Sons,
1993.
[6] V. Madisetti and D. B. Williams. The digital signal processing handbook. CRC, 1998.
[7] F. Harris. Ultra low phase noise dsp oscillator. IEEE Signal Processing Magazine, 24 July
2007.
[8] L. Vachhani, K. Sridharan, and Meher, P.K. Efficient cordic algorithms and architectures
for low area and high throughput implementation. IEEE Transactions on Circuits and Systems
II: Express Briefs, 56, Jan. 2009.
[9] J.G. Proakis and M. Salehi. Communication systems engineering. Prentice-Hall, Inc.
Upper Saddle River, NJ, USA, 1994.
[10] T.Q Nguyen and P.P Vaidyanathan. Two-channel perfect-reconstruction fir qmf structures
which yield linear-phase analysis and synthesis filters. IEEE Transactions on Acoustics Speech
and Signal Processing, 37, May 1989.
[11] T.B. Welch, C.H.G. Wright, and M.G. Morrow. Real-time digital signal processing from
MATLAB to C with the TMS320C6x DSK. CRC, 2006.
66
CLAIMS
What is claimed is:
1. A method for determining a digital filter structure, the method comprising:
obtaining a transfer function of a digital filter in the form of one or more filter
components including an annihilating component, a minimum phase component, a nonminimum
phase component, and a symmetric component; and
for each of the one or more filter components, representing each of the filter components
as a set of interconnected notch filters, wherein each set of notch filters includes at least one of a
first notch filter having a half-lattice structure, and a second notch filter having a full lattice
structure.
2. The method of claim 1, further comprising decomposing:
the annihilating component as a series combination of one or more first notch
filters and one or more second notch filters; and
the minimum phase component, non-minimum phase component, and the
symmetric component as a series and a parallel combination of one or more first notch filters
and one or more second notch filters.
3. The method of claim 1 wherein each of the notch filters are represented as single port
devices.
4. The method of claim 1, further comprising using a canonic filter module to
67
implement at least one of the annihilating component, the minimum phase component, the nonminimum
phase component, and/or the symmetric component.
5. The method of claim 1, further comprising determining lattice coefficients of the first
notch filter and the second notch filter for each set of notch filters.
6. The method of claim 1, further comprising generating a data structure defining the
digital filter structure.
7. A device for filtering digital signals, the device comprising
a processor having one or more function modules including at least one of an
annihilating function module, a minimum phase function module, a non-minimum phase
function module, and/or a symmetric function module;
each of the function modules further comprising a set of interconnected notch
filters, wherein each set of notch filters includes at least one of a first notch filter having
a half-lattice structure, and/or a second notch filter having a full lattice structure;
a memory coupled to the processor and configured to store sets of half-lattice
and full-lattice coefficients respectively corresponding to each set of interconnected
notch filters.
8. The device of claim 7, wherein the annihilating function module includes a series
combination of one or more first notch filters and one or more second notch filters.
68
9. The device of claim 7, wherein the symmetric function module includes a seriesparallel
combination of one or more first notch filters and one or more second notch filters.
10. The device of claim 7, further comprising a canonic filter function module
configured as a function module selected from the group consisting of an annihilating function
module, a minimum phase function module, a non-minimum phase function module, and a
symmetric function module.

Dated this 18th day of October, 2010
P.H.D.RANGAPPA
IN/PA 1538
OF K & S PARTNERS
AGENT FOR THE APPLICANT