Claims:1. An apparatus comprising:
one or more processors comprising a convolution circuit of a neural network, the convolution circuit to:
initialize a set of parameters of a fractional convolutional kernel, the set of parameters comprising at least a fractional derivative parameter that is initialized with a fractional value; and
apply the fractional convolutional kernel to input data to convolve the input data to obtain output data.
, Description:RELATED APPLICATION
[0001] The present application claims priority to U.S. Non-Provisional Patent Application No. 17/107,759 filed November 30, 2020 and titled “FRACTIONAL CONVOLUTIONAL KERNELS” the entire disclosure of which is hereby incorporated by reference.

FIELD
[0002] This disclosure relates generally to machine learning and, more particularly, to fractional convolutional kernels.

BACKGROUND OF THE DISCLOSURE
[0003] Neural networks and other types of machine learning models are useful tools that have demonstrated their value solving complex problems regarding pattern recognition, natural language processing, automatic speech recognition, etc. Neural networks operate using artificial neurons arranged into one or more layers that process data from an input layer to an output layer, applying weighting values to the data during the processing of the data. Such weighting values are determined during a training process and applied during an inference process.

BRIEF DESCRIPTION OF THE DRAWINGS
[0004] So that the manner in which the above recited features of the present embodiments can be understood in detail, a more particular description of the embodiments, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate typical embodiments and are therefore not to be considered limiting of its scope. The figures are not to scale. In general, the same reference numbers are used throughout the drawing(s) and accompanying written description to refer to the same or like parts.
[0005] FIG. 1 is a block diagram of an example computing system that may be used to provide fractional convolutional kernels, according to implementations of the disclosure.
[0006] FIG. 2 illustrates a machine learning software stack, according to an embodiment.
[0007] FIGS. 3A-3B illustrate layers of example deep neural networks.
[0008] FIG. 4 illustrates an example recurrent neural network.
[0009] FIG. 5 illustrates training and deployment of a deep neural network.
[0010] FIG. 6 is a schematic depicting a graphical representation of applications of the fractional convolutional kernel using a variety of fractional derivative values in two-dimensional (2D) space, in accordance with implementations of the disclosure.
[0011] FIG. 7 illustrates an example neural network topology implementing fractional convolutional kernels, in accordance with implementations of the disclosure.
[0012] FIG. 8A depicts dynamic filtering progression ranging from a Gaussian filter to a DoG filter using the fractional convolutional kernel of implementations of the disclosure.
[0013] FIG. 8B depicts dynamic filtering progression ranging from a DoG filter to a LoG filter using the fractional convolutional kernel of implementations of the disclosure.
[0014] FIG. 9 is a flow diagram illustrating an embodiment of a method for implementing the example model trainer and/or model executor, in accordance with implementations of the disclosure.
[0015] FIG. 10 is a flow diagram illustrating an embodiment of a method for implementing fractional convolutional kernels in a neural network, in accordance with implementations of the disclosure.
[0016] FIG. 11 is a schematic diagram of an illustrative electronic computing device to enable fractional convolutional kernels in a neural network, according to some embodiments.

DETAILED DESCRIPTION
[0017] Implementations of the disclosure describe fractional convolutional kernels. In computer engineering, computing architecture is a set of rules and methods that describe the functionality, organization, and implementation of computer systems. Today’s computing systems are expected to deliver near zero-wait responsiveness and superb performance while taking on large workloads for execution. Therefore, computing architectures have continually changed (e.g., improved) to accommodate demanding workloads and increased performance expectations.