FORM 2


THE PATENTS ACT 1970
(39 of 1970)
&
THE PATENTS RULES, 2003
COMPLETE SPECIFICATION
(See Section 10; rule 13)
TITLE OF THE INVENTION
FREQUENCY TO VOLTAGE CONVERTER USING IC 555 BASED TIMER
IN RETRIGGERABLE MODE
APPLICANTS
TATA MOTORS LIMITED, an Indian company
having its registered office at Bombay House,
24 Homi Mody Street, Hutatma Chowk,
Mumbai 400 001 Maharashtra, India
INVENTORS
Mr. Vishwas Vaidya, Ms. Vrushali Nawale both Indian nationals of TATA MOTORS LIMITED,
an Indian company having its registered office at Bombay House, 24 Homi Mody Street, Hutatma Chowk,
Mumbai 400 001 Maharashtra, India
PREAMBLE TO THE DESCRIPTION
The following specification particularly describes the invention and the manner in
which it is to be performed.


FIELD OF THE INVENTION
The present invention relates to the fields of frequency to voltage conversion systems. The present invention specifically relates to a frequency to voltage converter using IC 555 based timer in retriggerable mode.
BACKGROUND OF THE INVENTION
Frequency to Voltage converters are required in various industrial applications such as pulse counting applications, frequency measurement, digital to analog converters, RPM indicators, signal processing applications for control systems (using pulse-train output of a feedback sensor). They also can be used as a reference signal source to calibrate frequency sources. Special purpose chips like LM 2917 and LM 331 from M/s National Semiconductors, USA, are dedicated for F to V (Frequency to voltage) conversion application and are costlier than the general purpose IC chips. Also piece to variation in output voltage for these special chips is greater than +/- 8 % tolerance.
US 3723981 describes a frequency to voltage converter scheme based on a switching circuit. It charges a capacitor to a peak negative voltage and then charges the capacitor towards positive voltage till the next zero-crossing, thereby producing an average voltage proportional to frequency. However, the circuit requires both positive and negative supplies apart from using many discrete components. This approach is not suitable for systems using only a single power-supply requiring minimal discrete components to conserve PCB space.
US 4166248 describes the frequency to voltage conversion based two pulse train generator circuits. The pulses in the pulse-trains have frequency and pulse width

proportional to input frequency. An integrator produces a DC voltage proportional to pulse-width of the second pulse-train. This approach increases the circuit complexity due to the two separate pulse-trains required. The high component count required for this approach consumes a large PCB space. Hence, this approach is not suitable where component cost, simplicity of the circuit and compact PCB size are important.
With respect to the conventional arts, the frequency to voltage conversion is achieved through costlier IC chips and complex circuit arrangements. However, such prior art does not provide higher output performance due to greater variation in tolerance. Therefore, it is desirable to provide an improved frequency to voltage converter, which is simple in construction and cost-effective.
OBJECT OF THE INVENTION
An object of the present invention is to provide a frequency to voltage converter using IC 555 based timer, which provide higher output conversion performance.
Another object of the present invention is to provide a frequency to voltage converter based on a retriggerable mono-shot concept.
Yet another object of the present invention is to provide a frequency to voltage converter, which is simple in construction and cost-effective.
SUMMARY OF THE INVENTION
According to one aspect, the present invention, which achieves the objectives, relates to a frequency to voltage converter comprising an input trigger interface circuit for

re-triggering the input pulse frequency by discharging a timing capacitor at every positive edge of the input pulse frequency using a transistor. An IC 555 timer chip can be wired into a mono-shot mode for generating an output PWM signal proportional to the re-triggered input pulse frequency. The input trigger interface circuit makes the IC 555 timer chip into a re-triggerable mode. A low pass filter can be connected to an output of the IC 555 timer chip for filtering the output PWM signal to extract a voltage signal proportional to the input pulse frequency. Such voltage signal output can be connected to the applications requiring frequency to voltage conversion such as automotive taco meter, pulse counting applications, and electronic control units requiring analog outputs proportional to frequency.
The input trigger interface circuit discharges the timing capacitor of the 555 mono-shot, thereby re-triggering the timing cycle of the input pulse frequency. As the mono-shot timing duration is fixed, "on period of the out-put PWM remains constant but off-period goes on diminishing and/or expanding as the input frequency increases and/or decreases respectively, thereby increasing and/or decreasing percentage duty-cycle and hence the average voltage value of the output PWM. The output RC low-pass filter extracts this voltage value, which serves as the final analog out put of the converter and is proportional to the input frequency.
According to another aspect, the present invention, which achieves the objectives, relates to a method of converting frequency to voltage using IC 555 based timer in re-triggerable mode, comprising: configuring the IC 555 timer chip into a mono-shot mode. The input trigger interface makes the IC 555 timer chip re-triggerable by adding a trigger driven discharge path across a timing capacitor by means of a transistor. A trigger output of the timing capacitor is connected to input pulse frequency such that the IC 555 timer chip generates an output PWM signal

proportional to the input pulse frequency. The output PWM signal is filtered to extract a voltage signal proportional to the input pulse frequency using the low pass
filter.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention will be discussed in greater detail with reference to the accompanying
Figures.
FIG. 1 shows a circuit diagram of a frequency to voltage converter using IC 555 based timer in retriggerable mode, in accordance with an exemplary embodiment of the present invention.
FIG. 2 illustrates an input and output waveforms for the frequency to voltage converter of FIG. 1, in accordance with an exemplary embodiment of the present invention.
FIG. 3 illustrates a graph depicting relationship between input frequency and output voltage for the frequency to voltage converter of FIG. 1, in accordance with an exemplary embodiment of the present invention.
DETAILED DESCRIPTION OF THE INVENTION
Referring to FIG. 1, a circuit diagram of a frequency to voltage converter using IC 555 based timer in retriggerable mode is illustrated, in accordance with an exemplary embodiment of the present invention. The frequency to voltage converter consists a mono-shot timer circuit based on IC 555 chip 9, which is connected to input pulse-

train by means of a transistorized trigger input interface circuit and to the output by a low-pass RC filter circuit. In the transistorized trigger input interface, a capacitor 1 and resistor 3 blocks DC signal from the input pulse train with input frequency, and a diode 2 passes only a positive portion of the input frequency pulse train. Resistors 4 and 5 and a transistor 6 forms a trigger switch, which gets closed across a timing capacitor 7 at every positive going transition of the input pulse-train.
Such transistorized trigger switch closure discharges the timing capacitor 7 at every positive edge of the input pulse train using a timing resistor 8, thereby initiating a fresh timing cycle for the mono-shot circuit built around IC 555 chip 9. The proper connection of resistor 10 and capacitors 11 and 12 operates the IC 555 chip 9 in a mono-shot mode. The output of IC 555 chip 9 at pin 3 goes high in "quasi-stable state" for a time delay period given by Equation (1) below:
Td=l.l RC Equation (1)
On substituting the values shown in the frequency to voltage converter circuit of FIG. 1, this time delay works out to be 0.1 milliseconds.
Moreover, if the input pulse train has a cycle time period more than mono-shot timing, then the next rising edge of the incoming pulse-train arrives after the time delay has expired. Therefore, the output of the IC 555 chip 9 is lowered, which constitutes end of "On period" of the PWM duty cycle at the timer output. The "off period" now starts and continues till arrival of the next positive edge in the incoming pulse-train. Hence, DC voltage value of the PWM output is given by Equations (2) and (3) below:

Vdc = Vbatt x Ton/(Ton +Toff)

Equation (2)

Where,
Vdc = DC value of the PWM output.
Vbatt = battery supply voltage to the circuit
Ton = "On time1' period of the PWM output wave
Toff = "off time" period of the PWM output wave
Note that Ton + Toff term equals to 1/fin, where fin is the incoming pulse frequency,
Then, Vdc = Vbatt x fin x Ton Equation (3)
Furthermore, the low pass filter connected at the output of the timer chip 9 consists of a resistor 13 and capacitor 14 extracts the DC value Vdc from the PWM wave at the output of the timer chip 9, which provides a voltage proportional to the input frequency fin. Assuming that, Vbat = 12 volts and Ton = 0. 1msec and express fin in KHz, upon substituting these values in Equation (3),
Then, Vdc = Vout = 1.2x fin Equation (4)
Where, Vout = final output voltage of the frequency to voltage converter.
FIG. 2 clearly depicts an input pulse-train and an output PWM at a timer chip output of the frequency to voltage converter of FIG. 1, in accordance with an exemplary embodiment of the present invention. As described in the figure, input frequency of 5 KHz produces a Ton of 0.1 msec and a Toff of 0.1 msec for a total 0.2 msec time period of the input wave, which provides 50% PWM signal. The rising edge of each input trigger initiates a fresh timing cycle for the mono-shot timer chip 9. The output

PWM starts its on time Ton at the every rising age of the input wave, where the Ton corresponds to the time delay governed by the circuit components shown in FIG. 1. Similarly, Toff is given by the remaining amount of time after subtracting Ton from the input time period of 0.2 msec. Then, the low pass filter provides 6 Volts as given by Equation (4). For different frequencies, Ton remains fixed at 0.1 msec but Toff changes as per the remaining amount of time period.
FIG. 3 illustrates a graph depicting the linear relationship between input frequency and output voltage for the components values of the frequency to voltage converter shown in FIG. 1, in accordance with an exemplary embodiment of the present invention. The IC 555 timer chip 9 by design is "non-retriggerable", where the external transistorized trigger switch as discussed above makes the timer chip circuit re-triggerable. At frequencies greater than lOKhz, the output of the re-triggerable timer chip 9 remains saturated at 12 Volts, since it never exceeds the battery supply voltage. In the non-re-triggerable mono-shot timer chip, the output drops to zero after the time period is over and produces low going output that glitches at frequencies above 10 KHz. Thus, the output erratically drops below 12 volts after the maximum frequency. Hence, the re-triggerable timer chip 9 provides higher frequency to voltage conversion performance in a simple and cost-effective manner.

WE CLAIM
1. A frequency to voltage converter using IC 555 based tinier in retriggerable
mode, comprising:
an input trigger interface circuit for re-triggering input pulse frequency by discharging a timing capacitor at every positive edge of the input pulse frequency using a transistor;
an IC 555 timer chip wired into a mono-shot mode for generating an output PWM signal proportional to the re-triggered input pulse frequency, wherein said input trigger interface circuit makes the said IC 555 timer chip into a re-triggerable mode; and
a low pass filter connected to an output of the said IC 555 timer chip for filtering the output PWM signal to extract a voltage signal proportional to the input pulse frequency.
2. The converter as claimed in claim 1, wherein said transistor forms a trigger switch that is closed across the said timing capacitor at every positive edge of the input pulse frequency.
3. The converter as claimed in claim 1, wherein said trigger switch discharges the said timing capacitor to initiate a fresh timing cycle of the input pulse frequency for the said IC 555 timer chip.
4. The converter as claimed in claim 1, wherein said re-triggerable IC 555 timer chip maintains the output at steady voltage even at higher frequencies.

5. A method of converting frequency to voltage using IC 555 based timer in retriggerable mode, comprising:
configuring the said IC 555 timer chip into a mono-shot mode;
making the said IC 555 timer chip re-triggerable by adding a trigger driven discharge path across a timing capacitor by means of a transistor;
connecting a trigger output of the said timing capacitor to input pulse frequency such that the said IC 555 timer chip generates an output PWM signal proportional to the input pulse frequency; and
filtering the output PWM signal to extract a voltage signal proportional to the input pulse frequency using a low pass filter.
Dated this 13th day of January 2009
TATA MOTORS LIMITED By their Agent & Attorney