FIELD OF THE INVENTION
A generalized Backplane design architecture for Interfacing Various Avionics Buses such as
MIL1553B, ARINC429 and ARINC 717 data buses with a Centralized Processor interface.
The subject architecture interfaces the different signals from backend airborne connectors,
carries out necessary impedance matching, filtering and interfaces them with a centralized
processing system for respectively processing the data by catering various electronic
components in optimum space and meeting the tough military environmental & EMI/EMC
conditions.
BACKGROUND OF THE INVENTION
In present scenario wherein various avionics digital busses form an integral part of a data
transfer architecture in a military aircrafts and data acquisition or processing avionics system
is required to have a military rugged single backplane architecture on an PCB where all the
essential various digital avionics buses can be interfaced . There are various LRUs which
work in a combination on an aircraft interacting with each other through a dedicated means
of data buses for easy & safe flying and landing of the aircraft. In LRUs various electronic
signals come from the aircraft and the processing modules convert them into suitable
compatible format. First of all, the signals come to the backend architecture through physical
interface (Unit connector) in LRU level. A generalized architecture occupying minimal space
and suitable to meet the military environmental and EMI/EMC conditions is required for the
LRU to provide the communication channel interface to the processing modules for
conversion in compatible format.
SUMMARY OF PRESENT INVENTION
In accordance with one aspect of present invention is to provide a physical communication
interface between various avionics digital buses such as MIL1553B, ARINC 429, ARINC
717 with processing modules.
In accordance with second aspect of present invention is to provide a suitable rigid backend
to be fitted in less space inside in airborne system.
In accordance with another aspect of present invention is to provide Electromagnetic
interference free signals to signal processing modules in airborne system.
In accordance with yet another aspect of present invention is to provide backend
architecture for an easy and reliable fitment on mechanical interface of airborne system
In accordance with yet another aspect of present invention is to provide a physical interface
of various compatible standard connectors for MIL1553B, ARINC 429 and ARIC 717.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1: It shows the layout of backend architecture for generalized backplane architecture
for interfacing various avionics buses with a centralized processor interface
(Details: J10= Physical Interface (airborne connector) for Processor based Central
Processing system along with digital avionics buses communication interface and audio
interface also.
J11 & J12: An Additional Physical Interface for Discrete signal Processing
J13 & J12 = An Additional Physical Interface for Analog Signals
Figure 2: It shows the block diagram of back end architecture for showing various Avionics
Buses signal with other signals too.
DETAILED DESCRIPTION
There are various signals come from the Aircraft at LRU level. The signals are in the form of
Analog signal, Discrete signal, Video signal, Synchro signal (AC Signals) and various others
but the specific signals on military airborne environment wherein high data transfer rates,
reliability are required use various digital avionics buses out of which MIL1553B, ARINC429
and ARINC717 are of prime importance for data transfer/exchange between various
avionics system and data logger LRU’s. The present design architecture of the system can
be used in aircraft to interface data from cockpit voice, analog inputs, MIL1553B bus, ARINC
429 & ARINC717 channels from Aircraft. This new invention caters to the following
technicalities for providing interface of the mentioned Avionics Digital Buses
• Impedance matching.
• EMI/EMC Filtering as required.
• Routing of the signals wrt proper cabling inside from airborne connector to the
Backplane PCB and then at the respective Edge terminations.
• Additional Interface for Control Discrete Signals and Analog and Audio signals
interfacing as required with respect to some Data Logger LRU’s in airborne
applications.
• Mechanical layout Design for fitting in confined area of LRU’s for space optimization.

WE CLAIMS:-
Accordingly, the description of the present invention is to be considered as illustrative only and is for the purpose of teaching those skilled in the art of the best mode of carrying out the invention. The details may be varied substantially without departing from the spirit of the invention, and exclusive use of all modifications which are within the scope of the appended claims is reserved. We Claim

1. The said invention provides a generalized Backplane design architecture for Interfacing Various Avionics Buses such as MIL1553B, ARINC429 and ARINC 717 data buses with a Centralized Processor interface with a Rigid combination of backend architecture and can be easily fitted in less space.

2. The system as per Claim 1, wherein said architecture also caters to Impedance matching and EMI/EMC Filtering as required .

3. The system as per Claim 1, wherein it sustains extreme temperature range of -40°C to +125°C.

4. The system as per Claim 1, wherein it sustain up to 8g random vibration when working with whole LRU.

5. The system as per Claim 1, wherein it provides an efficient routing of the signals wrt proper cabling inside of LRU from airborne connector to the Backplane PCB and then at the respective Edge terminations. ,TagSPECI:As per Annexure-II