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"Image Processing Device And Method"

Abstract: The present invention relates to an image processing apparatus and method configured to be able to suppress increases in computation due to interpolation processing. For pixels of fractional pixel precision corresponding to sampling positions at a position b and a position d, pixel values corresponding to sampling positions at the position b and the position d are obtained by performing a sum-of-products operation using a first filter. For fractional pixel precision corresponding to sampling positions at a position c, pixel values corresponding to sampling positions at the position c are obtained by performing a sum-of-products operation using a second filter and an intermediate value B or an intermediate value D generated using a second filter with fewer taps than the first filter. The present invention may be applied to image coding apparatus that code in the H.2 64/AVC format, for example.

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Patent Information

Application #
Filing Date
02 December 2011
Publication Number
45/2012
Publication Type
INA
Invention Field
ELECTRONICS
Status
Email
Parent Application

Applicants

SONY CORPORATION
1-7-1 KONAN, MINATO-KU, TOKYO 1080075, JAPAN

Inventors

1. KAZUSHI SATO
C/O SONY CORPORATION, 1-7-1 KONAN, MINATO-KU, TOKYO 1080075, JAPAN

Specification

NA

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