FORM 2
THE PATENT ACT 1970
&
THE PATENTS RULES, 2003 COMPLETE SPECIFICATION
(section 10 and rule 13)
1. TITLE OF THE INVENTION:
"Instantaneous Fault Protection Algorithm For Microprocessor Based Electronic Trip Units To Avoid Nuisance Tripping Of Circuit Breaker"
2. APPLICANT:
(a) NAME: Larsen & Toubro Limited
(b) NATIONALITY: Indian Company registered under the
provisions of the Companies Act-1956.
(c) ADDRESS: Larsen & Toubro Limited
Electrical & Automation North Wing, Gate 7, Level 0, Powai Campus, Saki Vihar Road, Mumbai 400 072, INDIA
3. PREAMBLE TO THE DESCRIPTION:
COMPLETE
The following specification
particularly describes the invention and the manner in which it is to be performed

Instantaneous fault protection algorithm for Microprocessor based electronic trip units to avoid nuisance tripping of Circuit Breaker
Field of invention
The present invention relates to microprocessor based trip units for circuit breakers, and more particularly to an instantaneous fault protection mechanism adapted to avoid nuisance tripping of circuit breaker.
Background of the invention
Trip units are basically used to provide protection and control for circuit breaker under fault conditions. The function of protection trip unit is to cause prompt discontinuation of service under short circuit conditions as it might cause damage or otherwise interfere with the effective operation of the rest of the system. However, the fault detection mechanisms in trip units of these devices are incapable of avoiding nuisance in tripping conditions of the circuit breaker. The conventionally known digital or microprocessor based trip units use combination of analog and digital circuits that use fault protection algorithms which are ineffective under the conditions nuisance or unwanted signals.
Accordingly, there exists a need to provide a fault protection algorithm for microprocessor based electronic trip units to avoid nuisance tripping of circuit breaker which overcomes drawbacks of the prior art.
Object of the invention

An object of the present invention is to provide an instantaneous fault protection algorithm for microprocessor based electronic trip units that avoid tripping of the circuit breaker under the conditions of nuisance or unwanted signals.
Summary of the invention
An instantaneous fault protection mechanism for avoiding nuisance tripping of a circuit breaker is disclosed. The fault protection mechanism comprises a trip unit that receives a plurality of analog signals from a respective plurality of current sensors of R, Y, B, N current phases. The trip unit converts the analog signals into digital signals through an analog to digital converter channel for each current phase. The fault protection mechanism includes a microcontroller that performs essential computations for providing a digital root mean square value for corresponding plurality of analog instantaneous fault protection algorithms. The microcontroller compares the root mean square value with a fault set point for generating a trip signal. The fault protection mechanism includes a trip function block having an electromechanical trip solenoid adapted for receiving the trip signals from the microcontroller. The trip function block discontinues a supply for providing protection against a fault condition and/or a nuisance signals. The analog instantaneous protection is digitally derived by an algorithm that assists in accurate detection of the fault conditions without any computation delay. The nuisance signals are evaluated by a di/dt method that includes a comparison of each sample from the Annual digital converter channel with a di/dt ratio to compute the fault condition and/or the nuisance signal.
Brief description of the drawings
FIG. 1 shows a short circuit current of an AC component with a slow decay rate;

FIG. 2 shows a short circuit current of a DC component with a faster decay rate;
FIG. 3 shows a combined waveform of the AC component and the DC component of the short circuit current wave forms of FIGS. 1 and 2;
FIG. 4 shows a block diagram of an electronic trip unit constructed in accordance with an embodiment of the invention;
FIG. 5 shows a flowchart for instantaneous fault protection algorithm adapted for the electronic trip unit of FIG. 4;
FIG. 6 shows a flowchart showing fault detection based on True RMS computation for every cycle of each phase; and
FIG. 7 shows a flowchart of a di/dt method adapted for checking the current spikes or nuisance signals at which the circuit breaker is not desired to trip.
Detailed description of the invention
The foregoing objects of the present invention are accomplished and the problems and shortcomings associated with the prior art, techniques and approaches are overcome by the present invention as described below in the preferred embodiments.
Accordingly, the present invention provides an instantaneous fault protection mechanism for microprocessor based electronic trip units to avoid nuisance tripping of circuit breaker.
As shown in FIGS. 1-3, a short circuit current is made of an AC component waveform 10 and a DC component wave form 20 respectively. The AC component

waveform 10 is of a relatively slow decay rate. The DC component waveform 20 is of a relatively faster decay rate. The AC component waveform 10 and DC component waveform 20 combine into a waveform 30 thereby representing a worst case asymmetry. An algorithm in accordance with the present invention is adapted to provide an instantaneous fault protection mechanism for microprocessor based electronic trip units to avoid nuisance tripping of a circuit breaker.
Referring to FIG. 4, a block diagram 100 of the instantaneous fault protection mechanism of the electronic trip unit constructed in accordance with an embodiment of the present invention is shown. The algorithm followed by the block diagram 100 takes into consideration asymmetrical nature of short circuit waveform (As shown in FIGS. 1-3) for providing protection against void tripping of the circuit breaker under the conditions of nuisance or unwanted signals. The block diagram 100 includes a plurality of blocks referring to a plurality of Rogowski current sensors respectively. In this one particular embodiment, a first R phase Rogowski current sensor 111, a second Y phase Rogowski current sensor 112, a third B phase Rogowski current sensor 113 and a fourth N phase Rogowski current sensor 114 referring to Rogowski current phases respectively. The outputs from the sensors 111-114 are respectively given to a first signal conditioning block 115, a second signal conditioning block 116, a third signal conditioning block 117, and a fourth signal conditioning block 118 that are further connected to a plurality of ADC channels of the microcontroller 120. In this one particular embodiment, the microcontroller 120 includes a first ADC channel 122, a second ADC channel 124, a third ADC channel 126 and a fourth ADC channel 128 that convert analog signals to digital that are further processed to a trip function block 119. The trip function block 119 generates trip signals that are given to a trip mechanism block 121. The trip mechanism block 121 consists of an electromechanical trip solenoid which operates to open contacts of the circuit breaker thereby providing protection to further system against the fault condition.

Referring to FIG. 5, an algorithm 500 adapted to be followed by all the phases, namely R, Y, B, N in this one particular embodiment, is shown. In a first step 501, a microcontroller supply is generated and the analog signals are fed to the ADC channels 122-128 of the microcontroller 120 when the trip unit is powered through a plurality of transformers. In this step these analog signals are converted to digital at a particular frequency such that each cycle has specific number of samples. In a next step 502, value of each sample S[i] is compared to a rated short time withstand current Isc. A process moves to a step 503 if S[i] is observed to be greater than Isc else the process moves to a step 504 that again returns to a step 502. In a step 505, it is compared whether number of samples exceeding the said Rated Short Time withstand rating of the circuit breaker is more than the set number of counts. If yes, then a trip signal is generated in a further step 506 else the process returns to the step 502 following the step 504. Accordingly, a function of Analog Instantaneous protection is derived digitally in accordance with the algorithm 500 of the present invention. This algorithm 500 helps to detect the make on fault conditions accurately without any delay involved in computations.
As shown in FIG. 6, a flowchart depicts faults detection based on true root mean square (RMS, hereinafter) value computation for every cycle of each phase namely R, Y, B, N in this one particular embodiment,. The digital samples from ADC channels 122-128 are accumulated in the memory location of a microcontroller 120. After completion of one full cycle a True RMS computation is done for the accumulated samples for each phase in a first step 601. In a further step 602, the maximum RMS value [MAX (R, Y, B, N)] from these phases is compared with the RMS value of the instantaneous pickup (set point). If the condition is true, a trip signal is generated in a step 603 thus opening the circuit breaker and providing Instantaneous protection. If the condition is untrue, the process goes to next cycle in a step 604 thereby again returning to the first step 601.

Referring to FIG. 7, a flowchart using a di/dt method for checking the current spikes or nuisance signals at which the circuit breaker is not desired to trip is shown. In a first step 701, each sample from the ADC is compared with the previous sample. In a next step 702, it is checked whether value of each sample S[i]- S[i-1] is greater than the set limit. If the condition is true, the process moves to a step 704 with next sample and returns to the step 702 else the process moves to a next step 704 wherein it is checked that whether the value of the sample S[i] is greater than a set point. If the condition is true the process moves to next step 705 else it returns to the step 702 by following the step 703. In next step 706, it is checked whether the counter value is greater than the set point. If the condition is true, the process moves to a last step 707 wherein trip signal is generated else the process returns to the step 702 by following the step 703. In the above mentioned process, if the di/dt ratio of a particular sample exceeds the pattern of sampling then this sample is considered as spike and not considered in computation of fault current comparison with the set point. This avoids the tripping of circuit breaker in presence of nuisance or unwanted signals.
Advantages of the present invention
1. The algorithm followed by the block diagram 100 takes into consideration asymmetrical nature of short circuit waveform for providing protection against void tripping of the circuit breaker under the conditions of nuisance or unwanted signals.
2. The algorithm of the present invention provides protection against nuisance tripping by analyzing the nature of waveform for different application and under harmonic condition.
3. The analog instantaneous protection is derived digitally in accordance with the algorithm 500 of the present invention. The algorithm 500 helps to detect the make on fault conditions accurately without any delay involved in computations.

4. The present invention provides a di/dt method for checking the current spikes or nuisance signals at which the circuit breaker is not desired to trip providing di/dt computation and comparison for deciding the tripping action.
The foregoing descriptions of specific embodiments of the present invention have been presented for purposes of illustration and description. They are not intended to be exhaustive or to limit the present invention to the precise forms disclosed, and obviously many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the present invention and its practical application, to thereby enable others skilled in the art to best utilize the present invention and various embodiments with various modifications as are suited to the particular use contemplated. It is understood that various omission and substitutions of equivalents are contemplated as circumstance may suggest or render expedient, but such are intended to cover the application or implementation without departing from the spirit or scope of the present invention.

We claim:
1. An instantaneous fault protection mechanism for avoiding nuisance tripping
of a circuit breaker, the fault protection mechanism comprising:
a trip unit receiving a plurality of analog signals from a plurality of current sensors of R, Y, B, N current phases respectively, the trip unit converting the analog signal into a digital signal through an analog to digital converter channel;
a microcontroller performing essential computations for providing a digital root mean square value for corresponding a plurality of analog instantaneous fault protection algorithms, the microcontroller comparing the root mean square value with a fault set point for generating a trip signal; and
a trip function block having an electromechanical trip solenoid adapted for receiving the trip signal from the microcontroller, the trip function block discontinuing a supply for providing protection against a fault condition and/or a nuisance signal.
2. The fault protection mechanism as claimed in claim 1, wherein the analog instantaneous protection is digitally derived by an algorithm that assists in accurate detection of the fault condition without any computation delay.
3. The fault protection mechanism as claimed in claim 1, wherein the nuisance signals are evaluated by a di/dt method that includes a comparison of each sample from the annual digital converter channel with a di/dt ratio for computing the fault condition and/or the nuisance signal.