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Instrumentation Amplifier With Improved Cmrr

Abstract: The present disclosure relates to a circuit for an instrumentation amplifier that provides a high CMRR without need to have closely matched resistors. In an embodiment, subtractor of prior art instrumentation amplifiers is replaced by a second stage comprising an op-amp, a transistor, and one or more resistors. The op-amp is operated by giving negative feedback through the transistor such that voltages at inverting terminal and non-inverting terminal of the op-amp cancel out common mode input by only maintaining amplified differential input. In an embodiment, amplification can be distributed to both stages, minimizing gain in each of the stage, thereby improving bandwidth of operation of the circuit.

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Patent Information

Application #
Filing Date
24 February 2015
Publication Number
39/2016
Publication Type
INA
Invention Field
ELECTRICAL
Status
Email
docket@khuranaandkhurana.com
Parent Application
Patent Number
Legal Status
Grant Date
2022-07-05
Renewal Date

Applicants

Indian Institute of Science
C V Raman Road, Bangalore, Karnataka 560012, India.

Inventors

1. KUMAR, K. Jayanth
Department of Electronic Systems Engineering, Indian Institute of Science, C V Raman Road, Bangalore, Karnataka 560012, India.

Specification

DESC:TECHNICAL FIELD
[0001] The present disclosure generally relates to the field of amplifier circuits and more specifically to a differential amplifiers circuit to improve common-mode rejection ratio (CMRR) thereof.

BACKGROUND
[0002] Background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art
[0003] Ground noise is a very common issue in any circuit, and especially in amplifiers that are basic building blocks for electronic circuits. To overcome problems associated with ground noise, differential amplifiers are used that cancel common mode voltage. A differential amplifier (referred to as operational amplifier or op-amp in short in its basic form) provides voltage gain to the difference between signals applied to its two input terminals while responding with much lower gain or attenuation to voltages common to the two inputs. Thus, desired differential signals are amplified with little effect from extraneous common mode signals. Such extraneous signals frequently arise from signal current flow in long lines or from noise pickup, but are essentially rejected by the differential amplifier.
[0004] However, operational amplifier typically has low common-mode rejection ratio (CMRR), wherein CMRR is a figure of merit for a differential amplifier that compares gain of signals common to both inputs to gain of the difference between the signals applied to the inputs. The CMRR is defined as follows:
If vi 1 and vi 2 are small signal voltages applied to inputs i1 and i2respectively of a differential amplifier, and vo1 and vo2 are the output voltages at outputs o1 ando2respectively; then the differential-mode voltage gain adis:

and the common-mode voltage gain acis

and the CMRR expressed in dB is


[0005] Commercially available operational amplifiers may have a CMRR in the order of 100 dB. Because of low CMRR, and inverse relationship between CMRR and frequency, use of these operational amplifiers is effectively limited to operation at low frequencies such as below about 100 MHz as CMRR keeps decreasing as frequency increases. To overcome the problem, instrumentation amplifiers are used in circuits requiring higher CMRR.
[0006] An instrumentation amplifier is a type of differential amplifier that has been outfitted with input buffer amplifiers, and therefore an instrumentation amplifier is almost always internally composed of 3 operational amplifiers that form two stages. The first stage amplifies only the differential signal without any amplification of the common mode voltage. In standard instrumentation amplifiers the second stage is a subtractor that outputs the difference.
[0007] The Instrumentation amplifiers can be built with individual op-amps and precision resistors and need to have closely matched resistors. This stage works very well if all the resistors used are of high precision. In fact, resistance mismatch is the main reason because of which CMRR of instrumentation amplifiers is restricted. Any mismatch in resistors can result in CMRR restriction. For this reason, IC instrumentation amplifier typically contains closely matched laser-trimmed resistors.
[0008] Efforts have been made to overcome this limitation of instrumentation amplifiers. US Patent 6559720, for example, discloses use of differential trans-conductance amplifiers and trans-resistance amplifiers. In this configuration, tail current must be accurately tuned to a specific value to match the GM of both the trans-conductors, which is difficult. Even if it is matched, it may get mismatched with time because of various reasons such as temperature etc.
[0009] US Patent 8207788 discloses use of a set of difference amplifiers and amplification is achieved only by voltage amplification. In the disclosed method, feedback paths ‘bL ’ and ‘bH’ need to be matched, which is difficult. Even if they are matched, because of various reasons such as temperature variation, the mismatch arises again with time.
[0010] There is therefore a need for aninstrumentation amplifier circuit that is easy to implement, and the where performance is not affected with time and due to extraneous factors such as temperature etc.
[0011] All publications herein are incorporated by reference to the same extent as if each individual publication or patent application were specifically and individually indicated to be incorporated by reference. Where a definition or use of a term in an incorporated reference is inconsistent or contrary to the definition of that term provided herein, the definition of that term provided herein applies and the definition of that term in the reference does not apply.
[0012] In some embodiments, the numbers expressing quantities of ingredients, properties such as concentration, reaction conditions, and so forth, used to describe and claim certain embodiments of the invention are to be understood as being modified in some instances by the term “about.” Accordingly, in some embodiments, the numerical parameters set forth in the written description and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by a particular embodiment. In some embodiments, the numerical parameters should be construed in light of the number of reported significant digits and by applying ordinary rounding techniques. Notwithstanding that the numerical ranges and parameters setting forth the broad scope of some embodiments of the invention are approximations, the numerical values set forth in the specific examples are reported as precisely as practicable. The numerical values presented in some embodiments of the invention may contain certain errors necessarily resulting from the standard deviation found in their respective testing measurements.
[0013] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0014] The recitation of ranges of values herein is merely intended to serve as a shorthand method of referring individually to each separate value falling within the range. Unless otherwise indicated herein, each individual value is incorporated into the specification as if it were individually recited herein. All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g. “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
[0015] Groupings of alternative elements or embodiments of the invention disclosed herein are not to be construed as limitations. Each group member can be referred to and claimed individually or in any combination with other members of the group or other elements found herein. One or more members of a group can be included in, or deleted from, a group for reasons of convenience and/or patentability. When any such inclusion or deletion occurs, the specification is herein deemed to contain the group as modified thus fulfilling the written description of all Markush groups used in the appended claims.

OBJECTS OF THE INVENTION
[0016] An object of the present disclosure is to overcome problems associated with existing technologies related to instrumentation amplifiers.
[0017] Another object of the present disclosure is to provide a circuit for instrumentation amplifier that does not require precision/closely matched resistors.
[0018] Another object of the present disclosure is to provide a circuit for instrumentation amplifier that has high CMRR.
[0019] Another object of the present disclosure is to provide an instrumentation amplifier whose performance does not get affected by temperature.
[0020] Another object of the present disclosure is to provide an instrumentation amplifier whose performance does not get affected with time.
[0021] Another object of the present disclosure is to provide an instrumentation amplifier where gain can be distributed between the two stages.
[0022] Another object of the present disclosure is to provide an instrumentation amplifier with improved bandwidth.
[0023] Another object of the present disclosure is to provide an instrumentation amplifier with a simple circuit.

SUMMARY
[0024] Aspects of present disclosure relate to an instrumentation amplifier. In an aspect, the disclosure provides a circuit for an instrumentation amplifier to provide a high CMRR.
[0025] In an embodiment, the disclosure provides a circuit that replaces the circuit of second stage (subtractor) of prior art instrumentation amplifiers.
[0026] In an embodiment, the proposed second stage circuit is designed such that the CMRR does not depend on resistance mismatch. In the proposed second stage circuit, any resistance mismatch can only affect differential gain of the instrumentation amplifier by little amount. The output due to common mode voltage does not change with resistors. Any output due to common mode voltage can only be because of the CMRR of the op-amp used and shall be minimal.
[0027] In an embodiment, the proposed second stage circuit comprises an op-amp, a transistor, and one or more of resistors. The op-amp can be operated by giving negative feedback, wherein when the voltage at the non-inverting terminal of the op-amp is greater than the voltage at the inverting terminal of the op-amp, the transistor is turned on to decrease the voltage at the non-inverting terminal to track the voltage at the inverting terminal. On the other hand, when the voltage at the non-inverting terminal of the op-amp is less than the voltage at the inverting terminal of the op-amp, the transistor is turned off to increase the voltage at the non-inverting terminal to track the voltage at the inverting terminal. Thus, the voltages at the inverting terminal and the non-inverting terminal of the op-amp cancel out common mode input by only maintaining the amplified differential input. Therefore, the voltages at non-inverting and inverting input terminals are equal.
[0028] In an embodiment, with the proposed second stage circuit, amplification can be distributed to both the stages. In the prior art with subtractor, as the increase in gain is restricted to second stage, it requires large resistors, which worsen resistance mismatch and thereby the CMRR.
[0029] In an embodiment, as the gain can be distributed to the two stages, gain from each stage is minimized, and minimized gain improves bandwidth of operation of the circuit.
[0030] Various objects, features, aspects and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components

BRIEF DESCRIPTION OF THE DRAWINGS
[0031] The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.
[0032] FIGs. 1A and 1B illustrate typical circuit of an instrumentation amplifier and its second stage respectively in accordance with prior art.
[0033] FIG. 2 illustrates an exemplary circuit for second stage of an instrumentation amplifier in accordance with an embodiment of the present disclosure.
[0034] FIG. 3 illustrates an exemplary circuit for an instrumentation amplifier in accordance with embodiments of the present disclosure.
[0035] FIG. 4A illustrates an exemplary conventional instrumentation amplifier with resistors having 10% variation in their resistance values in accordance with an embodiment of the present disclosure.
[0036] FIG. 4B illustrates a schematic diagram of exemplary disclosed instrumentation amplifier with resistors having 10% variation in their resistance values in accordance with an embodiment of the present disclosure.
[0037] FIG. 4C illustrates a schematic diagram of exemplary conventional instrumentation amplifier with the resistors in the second stage matched as close to 1Kohms as possible in accordance with an embodiment of the present disclosure.
[0038] FIG. 5 illustrates a schematic diagram of exemplary instrumentation amplifier that can provide output with respect to ground in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION
[0039] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. However, the amount of detail offered is not intended to limit the anticipated variations of embodiments; on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present disclosure as defined by the appended claims.
[0040] Each of the appended claims defines a separate invention, which for infringement purposes is recognized as including equivalents to the various elements or limitations specified in the claims. Depending on the context, all references below to the "invention" may in some cases refer to certain specific embodiments only. In other cases it will be recognized that references to the "invention" will refer to subject matter recited in one or more, but not necessarily all, of the claims.
[0041] Various terms as used herein are shown below. To the extent a term used in a claim is not defined below, it should be given the broadest definition persons in the pertinent art have given that term as reflected in printed publications and issued patents at the time of filing.
[0042] Embodiments of the present disclosure relate to an instrumentation amplifier. In an aspect the disclosure provides a circuit for an instrumentation amplifier to provide a high CMRR.
[0043] In an embodiment, the present disclosure provides a circuit that replaces the circuit of second stage (subtractor) of prior art instrumentation amplifiers. FIGs. 1A and 1B illustrate typical circuits of an instrumentation amplifier in accordance with prior art. As depicted in FIG. 1A, circuit 100 essentially comprises of two stages wherein the first stage comprises of two op-amps, amplifies only the differential signal and the common mode voltage appears at its output without any amplification. The second stage circuit 150depicted in FIG. 1B is a subtractor that outputs the difference after amplification.
[0044] The conventional circuit suffers from drawback that resistance mismatch in the second stage restricts overall CMRR of the instrumentation amplifier. To illustrate, we can consider a simple subtractor of FIG. 1B with a gain of unity. Considering R1, R2, R3 and R4 as 1Kohmeach having a tolerance of 10% on their resistance value. The worst case scenario occurs when the tolerances on the resistors R1, R2, R3 and R4 lead to following resistor combinations:
R1 = 1100 ohms, R2 = 900 ohms, R3 = 900 ohms, and R4 = 1100 ohms

In this case, output due to common mode voltage shall be 0.18181818* Vcom, which degrades CMRR to a great extent. Thus, CMRR of the instrumentation amplifiers built in accordance with conventional circuit is restricted due to the second stage (subtractor).
[0045] In an embodiment of the present disclosure, the proposed second stage circuit is designed such that the CMRR does not depend on the resistance values. In the proposed second stage circuit, any resistance mismatch can only affect differential gain of the instrumentation amplifier by little amount. The output due to common mode voltage does not change with resistors. Any output due to common mode voltage can only be because of the CMRR of the op-amp used and shall be minimal.
[0046] FIG. 2 illustrates an exemplary circuit 200 for second stage of an instrumentation amplifier in accordance with an embodiment of the present disclosure. In an embodiment the proposed second stage circuit 200 can include an op-amp 202, a transistor 204,and one or more resistors Ri 206, Rn 208, and Rb 210. Resistance RL 212 symbolizes load resistance. The op-amp 202can be operated by giving negative feedback through transistor 204 and Rb 210.
[0047] In an embodiment, a negative feedback loop works to keep the voltages at non-inverting terminal 214 and at inverting input terminal 216 equal. When the voltage at the non-inverting terminal 214 of the op-amp 202 is greater than the voltage at the inverting terminal 216 of the op-amp 202, transistor 204 is turned on to decrease the voltage at the non-inverting terminal 214 to track the voltage at the inverting terminal. On the other hand, when voltage at the non-inverting terminal 214 of the op-amp 202 is less than voltage at the inverting terminal 216 of the op-amp 202, transistor is turned off to increase voltage at the non-inverting terminal 214 to track the voltage at the inverting terminal 216. Thus, voltages at the inverting terminal 216 and the non-inverting terminal 214 of the op-amp 202 cancel out common mode input by only maintaining amplified differential input.
[0048] In an aspect, with the voltages at non-inverting terminal 214 and at inverting input terminal 216 being equal, voltage across the resistor Rn 208shall be the difference between the inputs v1 and v2. Thus, current through Rn 208 canbe (v1 – v2)/Rn. As would be apparent to persons skilled in art, this current will flow through the load resistance RL. Thus, voltage across RL212 will be:
Vo = (v1 – v2)*(RL/Rn)

[0049] Considering resistance mismatch problem, irrespective of the resistances values, voltage across the resistor Rn shall depend on the difference between the input voltages v1 and v2, and common mode voltage cannot appear across that load and hence it can generate no output due to common mode voltage. Thus, the disclosed second stage circuit 200 can overcome the disadvantage associated with conventional circuit for amplification amplifiers in respect of mismatch of resistance values.
[0050] In an embodiment, with proposed second stage circuit 200, amplification can be distributed to both the stages. In the prior art (with subtractor), increase in gain required larger resistors, which worsened the resistance mismatch with consequent adverse effect on CMRR. Therefore, gain in the second stage had to be restricted. In the disclosed instrumentation amplifier, as resistance mismatch does not affect CMRR, gain from each stage can be distributed to the two stages.
[0051] In an embodiment, as gain can be distributed to the two stages, gain from each stage can be minimized, and reduced gain can improve the bandwidth of operation of the circuit.
[0052] FIG. 3 illustrates an exemplary circuit 300 for an instrumentation amplifier comprising a second stage circuit 200 in accordance with embodiments of the present disclosure. As depicted, first stage can include two op-amps 302 and 304, each with a negative feedback through a circuit comprising resistance Rf 306. Vdiff and Vcom can be differential and common mode signals applied to the input of the circuit 300. The differential gain of the stage can be:

Adiff = 1 + 2*(Rf/R1)
, where R1 308 is resistance in circuit connecting non-inverting terminals of the two op-amps 302 and 304. The common mode gain for the first stage shall be unity and it canamplify only the differential signal Vdiff, and give common mode voltage Vcom in output without any amplification. Output of the first stage can be v1 and v2.
[0053] Output of the first stage i.e. v1 and v2 at two output terminals can be fed to the second stage configured in accordance with the disclosed circuit 200 comprising a third op-amp 202, a transistor 204, and resistors such as Ri 206, Rn 208 and Rb 210. Resistor RL 212 symbolizes load resistance. Op-amp 202 can be operated by giving negative feedback through transistor 204 and Rb 210. Negative feedback loop works to keep the voltages at non-inverting terminal 214 and at inverting input terminal 216 equal. When the voltage at the non-inverting terminal 214 of the op-amp 202is greater than voltage at the inverting terminal 216 of the op-amp 202, the transistor is turned on to decrease the voltage at the non-inverting terminal 214 to track the voltage at the inverting terminal. On the other hand, when the voltage at the non-inverting terminal 214 of the op-amp 202 is less than the voltage at the inverting terminal 216 of the op-amp 202, the transistor is turned off to increase the voltage at the non-inverting terminal 214 to track the voltage at the inverting terminal. Thus, the voltages at the inverting terminal 216 and the non-inverting terminal 214 of the op-amp 202 cancel out common mode input by only maintaining the amplified differential input.
[0054] With the voltages at non-inverting terminal 214 and at inverting input terminal 216 being equal, voltage across the resistor Rn 208shall be the difference between the inputs v1 and v2. Thus, current through Rn 208 can be (v1-v2)/Rn. As would be apparent to a person skilled in art, this current will flow through load resistance RL. Thus, voltage across RL will be:
Vo = (v1 – v2)*(Rl/Rn)

Therefore, output in terms of the input differential voltage can be:
Vo = (1+2*(Rf/R1)) * (Rl/Rn) * Vdiff

Therefore, gain of the circuit can be:
A =Vo/Vdiff = (1+2*(Rf/R1)) * (Rl/Rn).

As is evident from above, CMRR of the disclosed circuit can be affected only by CMRR of op-amp used. Change in resistance can only change differential gain.
[0055] In an exemplary aspect, in FIG. 3, it needs to be made sure that voltage to the left side of Rn 208 is greater than voltage to the left side of Ri 206, else the current in Rn 208 should go from right to left to maintain equal voltages at both terminals of opamp, which is not possible. In order to satisfy this, a DC offset of 2V can, for instance, be given along with the differential input.
[0056] Performance of the disclosed second stage circuit 200 was compared with performance of conventional second stage circuit 150 by practical experiments. The two circuits, circuit 150 and circuit 200 were configured to have unity differential gain by all resistances i.e. R1, R2, R3 and R4 of circuit 150, and Rn and RL having a resistance value of 1kohms. Table 1 below tabulates outputs of the two for different differential inputs:

Differential input
(Volts)
Output of conventional second stage circuit
(circuit 150)
(Volts) Output of proposed second stage circuit
(circuit 200)
(Volts)
0.1001 0.1026 0.1030
0.2003 0.2027 0.2031
0.3002 0.3030 0.3031
0.4000 0.4041 0.4036
0.5000 0.5054 0.5024
0.6003 0.6064 0.6024
0.6998 0.7060 0.7024
0.8001 0.8072 0.8034
0.9006 0.9080 0.9030
1.000 1.0090 1.0028
Table 1: Performance of second stage of conventional and disclosed
second stage for differential inputs.
[0057] Another experiment was conducted to check output of a conventional instrumentation amplifier in accordance with circuit 100 and that in accordance with disclosed circuit 300 due to common mode voltage. To assess performance of the two circuits in amplifying common mode voltage, both the circuits 100 and 300 were configured with resistors having 10% variation in resistance values. Their results were compared with another instrumentation amplifier in accordance with circuit 100 but having closely matched resistors to simulate state of art. FIG. 4A (prior art), FIG. 4B and FIG. 4C (prior art) illustrate these circuits 400, 450 and 475 respectively along with resistance values. Vcom is the common mode voltage applied at input to these circuits without any differential mode input.
[0058] Table 2 below tabulates the results of the above experiment during which output of the three circuits was recorded for different frequencies with input signal:
Vcom = 0.6*sin(2p*freq*t)
ie., a sinusoidal signal with a peak to peak voltage of 1.2V.

Frequency
Hz Output from conventional circuit with resistances having 10% variations
400
(in mv) Output from proposed circuit with resistances having 10% variations
450
(in mv) Output from conventional circuit with closely matched resistances
475
(in mv)
10 240 2 3
20 240 2 4
50 240 2 4
100 240 2 4
500 240 2 4
1k 240 2 4
10k 240 2 4
20k 240 2 4
30k 240 3 4
40k 250 4 5
50k 250 4 5
60k 250 4 5
70k 250 5 6
80k 250 6 6
90k 260 6 7
100k 260 7 7
Table 2: output for common mode signal with different input signal frequencies
[0059] As is seen from the table, the output of proposed circuit 450that is in accordance with disclosure and has resistances with 10% variations matches closely with output from circuit 475 that is conventional but with closely matched resistances. Since the output from circuit 475 can be only because of the CMRR of the op-amp used, it is evident that the output of circuit 450 is only because of the CMRR of the op-amp and difference in resistance values does not cause any common mode signal amplification.
[0060] Gain in both the circuits i.e. circuit 400 and circuit450 is 49 (approximated to 50v/v for ease of calculation) and the average outputs due to common mode voltage in circuits 400 and 450is 250mv and 5mv respectively. Therefore,
CMRR of circuit 400 = 1200/(250/50) = 240 = 47.6dB
CMRR of circuit450 = 1200/(5/50) = 12000 = 81.583dB
The above clearly brings out the advantage of the disclosed circuit for an instrumentation amplifier, both in respect of CMRR and in use of resistors that may not have closely matched resistance values. In fact, the disclosed circuit can exhibit further improved CMRR for higher gain as increasing the gain does not change the output due to common mode voltage.
[0061] In an aspect, circuit in FIG. 2, FIG.3 and FIG. 4A-4C of instrumentation amplifier provides output with respect to -15V, and not with respect to ground as may be desired in certain cases. FIG. 5 illustrates a schematic diagram of exemplary instrumentation amplifier 500 that can provide output with respect to ground in accordance with an embodiment of the present disclosure. As shown in the FIG. 5, output of the second stage can be cascaded with a subtraction circuit 502 that can subtract -15V from the output voltage of the second stage. In an exemplary implementation, as shown in FIG. 5, if resister R1, R2, R3 and R4 are chosen to be 1K exact, subtraction circuit 502 can precisely subtract -15V and give the amplified differential signal that would be with respect to the ground. Even if the resistors (R1, R2, R3 and R4) in the subtraction circuit 502 are not matched, subtraction circuit will just add a little DC to the amplified AC signal. The expression below displays the Vout value with different resistors.

Vout = v2*((R2/(R1+R2)) * ((R3+R4)/R3)) – v1*(R4/R3)

As one may appreciate, subtraction circuit 502 hardly adds a small DC voltage to the output voltage but leaves the AC differential signal unchanged, thus, keeping the CMRR still high.
[0062] While the foregoing describes various embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof. The scope of the invention is determined by the claims that follow. The invention is not limited to the described embodiments, versions or examples, which are included to enable a person having ordinary skill in the art to make and use the invention when combined with information and knowledge available to the person having ordinary skill in the art.

ADVANTAGES OF THE INVENTION
[0063] The present disclosure overcomes problems associated with existing technologies related to instrumentation amplifiers.
[0064] The present disclosure provides a circuit for instrumentation amplifier that does not require precision/closely matched resistors.
[0065] The present disclosure provides a circuit for instrumentation amplifier that has high CMRR.
[0066] The present disclosure provides an instrumentation amplifier whose performance does not get affected by temperature.
[0067] The present disclosure provides an instrumentation amplifier whose performance does not get affected with time.
[0068] The present disclosure provides an instrumentation amplifier where gain can be distributed between the two stages.
[0069] The present disclosure provides an instrumentation amplifier with improved band width.
[0070] The present disclosure provides an instrumentation amplifier with a simple circuit.
,CLAIMS:1. An instrumentation amplifier comprising:
a first stage circuit; and
a second stage circuit comprises an op-amp, a transistor, and one or more resistors, wherein the op-amp is operated by giving negative feedback, and wherein when voltage at non-inverting terminal of the op-amp is greater than voltage at inverting terminal, the transistor is turned on to decrease the voltage at the non-inverting terminal to track the voltage at the inverting terminal, and wherein when the voltage at the non-inverting terminal of the op-amp is less than the voltage at the inverting terminal, the transistor is turned off to increase the voltage at the non-inverting terminal to track the voltage at the inverting terminal.

2. The instrumentation amplifier of claim 1, wherein voltages at the inverting terminal and the non-inverting terminal of the op-amp cancel out common mode input by only maintaining amplified differential input.

3. The instrumentation amplifier of claim 1, wherein voltages at non-inverting and inverting input terminals are equal.

4. The instrumentation amplifier of claim 1, wherein the first stage circuit is configured to receive input differential voltage (Vdiff) and common mode voltage (Vcom) and output amplified differential signal and present common mode voltage without amplification.

5. The instrumentation amplifier of claim 1, wherein the first stage circuit comprises two amplifiers, each connected with a negative feedback through a resister.

6. The instrumentation amplifier of claim 5, wherein the first stage circuit provides differential gain (Adiff) of 1+2 *(Rf/R1), wherein the R1 is resistor connecting non-inverting terminals the two amplifiers.
7. The instrumentation amplifier of claim 1, wherein output of the second stage circuitis cascaded with a subtraction circuit that subtracts negative voltage from the output voltage of the second stage circuit.

8. The instrumentation amplifier of claim 1, wherein the one or more resistors comprise a load resistance RL, and wherein the op-amp is operated by giving negative feedback through the transistor and resistor Rb.

9. The instrumentation amplifier of claim 8, wherein voltage across resistor Rn 208 is difference between inputs v1 and v2, wherein current through resistor Rn 208 is (v1 – v2)/Rn, and wherein current flows through the load resistance RL, making voltage across RLto be:
Vo = (v1 – v2)*(RL/Rn)

Documents

Application Documents

# Name Date
1 Visio-Drawing98.pdf ONLINE 2015-03-03
2 PRV Spec Form 2.pdf ONLINE 2015-03-03
3 Form_5.pdf ONLINE 2015-03-03
4 Form_3.pdf ONLINE 2015-03-03
5 Visio-Drawing98.pdf 2015-03-13
6 PRV Spec Form 2.pdf 2015-03-13
7 Form_5.pdf 2015-03-13
8 Form_3.pdf 2015-03-13
9 850-CHE-2015 POWER OF ATTORNEY 21-07-2015.pdf 2015-07-21
10 850-CHE-2015 FORM-1 21-07-2015.pdf 2015-07-21
11 850-CHE-2015 CORRESPONDENCE OTHERS 21-07-2015.pdf 2015-07-21
12 Drawing [16-02-2016(online)].pdf 2016-02-16
13 Description(Complete) [16-02-2016(online)].pdf 2016-02-16
14 850-CHE-2015-FER.pdf 2019-12-26
15 850-CHE-2015-FER_SER_REPLY [28-04-2020(online)].pdf 2020-04-28
16 850-CHE-2015-DRAWING [28-04-2020(online)].pdf 2020-04-28
17 850-CHE-2015-CORRESPONDENCE [28-04-2020(online)].pdf 2020-04-28
18 850-CHE-2015-COMPLETE SPECIFICATION [28-04-2020(online)].pdf 2020-04-28
19 850-CHE-2015-CLAIMS [28-04-2020(online)].pdf 2020-04-28
20 850-CHE-2015-ABSTRACT [28-04-2020(online)].pdf 2020-04-28
21 850-CHE-2015-PatentCertificate05-07-2022.pdf 2022-07-05
22 850-CHE-2015-IntimationOfGrant05-07-2022.pdf 2022-07-05
23 850-CHE-2015-OTHERS [28-09-2022(online)].pdf 2022-09-28
24 850-CHE-2015-EDUCATIONAL INSTITUTION(S) [28-09-2022(online)].pdf 2022-09-28

Search Strategy

1 SS28850CHE2015_19-12-2019.pdf

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