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Integrated System For Residual And Overcurrent Fault Detection

Abstract: This invention relates generally to a system for fault detection and more particularly to an integrated system for residual and over current detection. It comprises a current transformer for residual current detection, said current transformer for residual current detection passing through phase and neutral, secondary side of said current transformer for residual current detection connected to a winding, said winding connected to an amplifier, said amplifier connected to a rectifier to make the output of said amplifier unidirectional, said unidirectional output from said rectifier fed to input port (A1) of a microcontroller; a current transformer for over current detection, said current transformer for over current detection passing through phase, secondary side of said current transformer for over current detection connected to a winding, said winding connected to a rectifier, output from said rectifier fed to input port (B1) of said microcontroller. Fig. 3

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
21 March 2011
Publication Number
12/2014
Publication Type
INA
Invention Field
ELECTRICAL
Status
Email
Parent Application
Patent Number
Legal Status
Grant Date
2022-07-11
Renewal Date

Applicants

LARSEN & TOUBRO LIMITED
L & T House  Ballard Estate  Mumbai 400 001  State of Maharashtra  India

Inventors

1. DESHMUKH  Vinod
LARSEN & TOUBRO  EBG  ABEB Building  Gate No. 7  Saki Vihar Road  Powai  Mumbai-400 072
2. JETHLIYA Rajesh
LARSEN & TOUBRO  EBG  ABEB Building  Gate No. 7  Saki Vihar Road  Powai  Mumbai-400 072

Specification

FORM2
THE PATENTS ACT, 1970
(39 of 1970)
&
The Patents Rules, 2003
COMPLETE SPECIFICATION
(See section 10; rule 13)
1. Title of the invention. - INTEGRATED SYSTEM FOR RESIDUAL AND OVERCURRENT FAULT DETECTION
2. Applicant(s)
(a) NAME : LARSEN & TOUBRO LIMITED
(b) NATIONALITY: An Indian Company.
(c) ADDRESS: L & T House, Ballard Estate, Mumbai 400 001,
State of Maharashtra, India
3. PREAMBLE TO THE DESCRIPTION
The following specification particularly describes the invention and the manner in which it is to be performed:


TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to a system for fault detection. More particularly, the invention relates to an integrated system for residual and over current detection.
BACKGROUND AND THE PRIOR ART
In modular devices, the residual current is detected by a combination of core balanced current transformer (CBCT) and Permanent magnet relay (PMR). Another method to detect the leakage current is by using an analog circuit arrangement by using leakage current detection IC.
The overload current is detected by a bimetal which bends and trips the breaker depending upon the value of current through it. The disadvantage is that the method is operated on principle of heat therefore consume energy to detect over load. Bimetal response is very slow therefore it takes more time to reset to its original position.
For different ratings of the breaker, different bimetal is to be used and hence the one circuit breaker cannot be used for multiple ratings. Similar problem is there in case of residual currents, the same breaker cannot be used for the multiple ratings.
Thus there is a need to provide an electronic circuit arrangement using microcontroller which is used for detection of residual currents and the over current. Also the selective option is provided to select the different ratings of residual current and over current to use the same breaker for different ratings. Since this is an electronic arrangement, the disadvantage of slow response of bimetal is removed. The present invention therefore provides combined digital protection scheme for both the over current fault and residual current fault.

OBJECTS OF THE INVENTION
A basic object of the present invention is to overcome the disadvantages/drawbacks of the known art.
Another object of the present invention is to provide an integrated system for residual and over current detection.
Another object of the present invention is to provide means for selecting different ratings of residual and over current.
Another object of the present invention is to prevent the time delay in operation of circuit breaker.
These and other advantages of the present invention will become readily apparent from the following detailed description read in conjunction with the accompanying drawings.
SUMMARY OF THE INVENTION
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the present invention. It is not intended to identify the key/critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concept of the invention in a simplified form as a prelude to a more detailed description of the invention presented later.

There is provided a system for fault detection.
According to one embodiment of the present invention provides an integrated system for residual and over current detection.
Another embodiment of the present invention provides means for selecting different ratings of residual and over current.
Yet another embodiment of the present invention prevents the time delay in operation of circuit breaker.
BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS
In the appended drawings:
Figure 1 illustrates the block diagram of the present invention.
Figure 2 illustrates the flow chart of method steps performed by the microcontroller.
Figure 3 illustrates another block diagram of the present invention.
DETAILED DESCRIPTION OF THE ACCOMPANYING DRAWINGS
The following drawings are illustrative of particular examples for enabling methods of the present invention, are descriptive of some of the methods, and are not intended to limit the scope of the invention. The drawings are not to scale (unless so stated) and are intended for use in conjunction with the explanations in the following detailed description.

Reference is first invited to Fig 1 where the block diagram of the present invention is shown. It shows the connection of current transformers, windings, rectifiers, diodes, resistors, microcontroller, capacitors, optocoupler etc.
Fig. 2 shows the algorithm for the microcontroller operation.
Fig. 3 shows the additional connection of switch in the present invention. Switches provide means for selecting different ratings of residual and over current by selecting different values of resistance.
The invented system is thus an integrated system for residual and over current detection.
DETAILED DESCRIPTION OF THE INVENTION
Accordingly the present invention provides an arrangement to achieve integrated protection circuit breaker with selective option for residual and over current
detection.
Figure 1 shows the overall block diagram of the invention. The Current transformer CT1 is for residual current detection and Current transformer CT2 is for the detection of overload. The CT1 is usually called as core balanced current transformer since the flux is balanced in the core in normal condition i.e. when there is no earth fault.
In case of an earth fault, the part of main current (phase current) flows to the ground, and there is an unbalance between phase and neutral current. This unbalance in current is detected by the CT1. The winding W1 is wounded on the secondary side of the CT1. The output current at terminals of Wl is converted into the voltage using resistor R11. The output of the CT1 is very small i.e. in mili-volts. The output of the

amplifier (1) is rectified by the rectifier (2) to make it unidirectional. This output is given to the input port (A1) of the microcontroller (MC).
The CT2 is for the detection of the overload. The CT2 is a current transformer having few turns at secondary at secondary compared to CT1 because the current in Amp is flowing from the phase line. It is to be noted that both phase and neutral are passing from CT1 and only phase is passing from CT2. The winding W2 wounded on the secondary side of the CT2. The current through winding W2 is converted into voltage by resistor R21. This output is rectified by the rectifier (3) to convert it into the unidirectional waveform. This is given to the input port (B1) of the microcontroller.
The reference values are assigned in microcontroller for particular value of residual current and overload current shown by 6 and 7 in figure 2. The microcontroller will accept the input from the ports A1 and Bl (see 8 and 9 in figure 2). This input is given to the ADC which is inbuilt inside the microcontroller. The ADC will convert the analog rectified output into the digital values. Then these values will be compared with the reference values in both the cases of residual and overload (10, 11).
In case of an residual current, if the value is higher than the reference value, then controller will again compare the value with the reference value after a delay of few mili-seconds (2msec). After the second compare if again the input value is higher than the reference value, the output port A2 will become high (12). This output is given to the gate of the thyristor (13).
Once gate voltage is available, the thyristor (13) will conduct and the current will start flowing from the solenoid (14). The solenoid will give the trigger signal to the mechanism (15) and mechanism will break the lines (16) to restrict the current through the load (17).

In a similar manner, the CT2 output at port B1 is compared (11) with the reference value and if it higher than the reference voltage, it is again compared with the reference voltage. If it is still higher, the output port B2 becomes higher. The delay is given in this case is to avoid the nuisance tripping. The output at port is B2 is given to the same thyristor 13 through optocoupler (18). The optocoupler (18) is used for isolating the two inputs at the gate of the thyristor. Again the same mechanism will break the main lines. The resistor R3 and R4 are used to restrict the current through the gate of the thyristor. The two anti parallel diodes D1 and D2 are used to bypass the high voltage spikes at secondary of CT1. Capacitors C1 and C2 are noise removal capacitors.
In addition to figure 1, as illustrated in figure 3 the two switches S1 and S2 can be connected at respective secondary windings W1 and W1. These are 1 to 4 way switch. These switches gives us the provision of connecting different resistors in secondary side i.e. R11, R12, R13, R14 in case of residual and R21, R22, R23 and R24 in case of an overload. By connecting different resistors, the output of CT1 and CT2 is changed hence changing the input to the microcontroller.
Since the input to microcontroller is changed, the microcontroller will word for now different values of residual currents and overload currents. So the selectivity for overload and residual current is achieved using this way. The resistors R5 and R6 limit the current at input to the rectifier circuit. Advantages:
• The residual current is processed by a microcontroller.
• Combined electronic circuit for residual and overload detection. If the value of current is higher, then the same circuit can be used for the short circuits currents also.
• ASIC can be made including all components excluding the CTs.

• Selective option is provided to select different ratings of residual and over current in the same breaker. The selective option can be built inside the controller also by varying the reference voltage levels.
• The breaker can be operated multiple times for the residual and over current without any time delay between two operations.
• Intermediate delay is provided in the program to provide protection against nuisance tripping.
Although the embodiments herein are described with various specific embodiments, it will be obvious for a person skilled in the art to practice the embodiments herein with modifications. However, all such modifications are deemed to be within the scope of the claims.
It is also to be understood that the following claims are intended to cover all of the generic and specific features of the embodiments described herein and all the statements of the scope of the embodiments which as a matter of language might be said to fall there between.

WE CLAIM:
1. An integrated system for detecting residual and/or over current, said system comprising:
unit for detecting residual current passing through phase and neutral, said unit connected to an amplifier which is again connected to a rectifier so as to make the output of said amplifier unidirectional whereby said unidirectional output from said rectifier is fed to input port (A1) of a microcontroller;
unit for detecting over current passing through phase, said unit connected to a winding which is again connected to a rectifier whereby said rectifier generating output to be fed to input port (B1) of said microcontroller;
an ADC present in said microcontroller to convert the said rectified input to digital form and said digital output from said ADC being compared with the reference voltage present in the said microcontroller;
a thyristor wherein the gate of said thyristor is connected to output (A2) of said microcontroller, said thyristor further connected to a solenoid for giving trigger signal to the mechanism;
an optocoupler connected to output (B2) of said microcontroller, said optocoupler further connected to said gate of said thyristor;
a duality of switches connected to said windings for selecting different ratings of residual and over current.
2. System as claimed in claim 1 wherein said unit for over current detection comprising secondary windings having less number of turns than secondary windings of said unit for residual current detection.

3. System as claimed in claims 1 and 2 wherein said unit is a current transformer.
4. System as claimed in claim 3 wherein said current transformer for residual current detection is a core balanced current transformer.
5. System as claimed in claims 1 and 2 wherein said winding is further connected to a resistor to convert said output current at terminals of said winding into voltage.
6. System as claimed in claim 1 wherein said output (A2 and B2) of said microcontroller is further connected to resistor to restrict the current through the said gate of said thyristor.
7. System as claimed in claim 3 wherein said secondary side of said current transformer for residual current detection is further connected to duality of anti parallel diodes to bypass the high voltage spikes.
8. System as claimed in claim 1 wherein said output (A2 and B2) of said microcontroller is further connected to capacitor for noise removal.
9. System as claimed in claim 1 wherein said reference voltage in said microcontroller is kept dynamic for selecting different ratings of residual and over current.

10. System as claimed in claim 1 wherein a duality of resistors (R5 and R6) limit the current at input to the said rectifier circuit.
11. System as claimed in claim 1 wherein intermediate delay is provided in said microcontroller to provide protection against nuisance tripping.
12. A system for detecting residual and over current as herein substantially described and illustrated with reference to the accompanying drawings.

Documents

Application Documents

# Name Date
1 786-MUM-2011-FORM-27 [05-09-2024(online)].pdf 2024-09-05
1 786-MUM-2011-OTHERS [22-01-2018(online)].pdf 2018-01-22
2 786-MUM-2011-IntimationOfGrant11-07-2022.pdf 2022-07-11
2 786-MUM-2011-FER_SER_REPLY [22-01-2018(online)].pdf 2018-01-22
3 786-MUM-2011-PatentCertificate11-07-2022.pdf 2022-07-11
3 786-MUM-2011-COMPLETE SPECIFICATION [22-01-2018(online)].pdf 2018-01-22
4 786-MUM-2011-FORM-26 [26-10-2021(online)].pdf 2021-10-26
4 786-MUM-2011-CLAIMS [22-01-2018(online)].pdf 2018-01-22
5 786-MUM-2011-US(14)-HearingNotice-(HearingDate-30-03-2021).pdf 2021-10-03
5 786-MUM-2011-ABSTRACT [22-01-2018(online)].pdf 2018-01-22
6 Power of Authority.pdf 2018-08-11
6 786-MUM-2011-Written submissions and relevant documents [13-04-2021(online)].pdf 2021-04-13
7 786-MUM-2011-Correspondence to notify the Controller [23-03-2021(online)].pdf 2021-03-23
8 786-MUM-2011-8(i)-Substitution-Change Of Applicant - Form 6 [09-01-2021(online)].pdf 2021-01-09
9 786-MUM-2011-ASSIGNMENT DOCUMENTS [09-01-2021(online)].pdf 2021-01-09
10 786-MUM-2011-PA [09-01-2021(online)].pdf 2021-01-09
10 ABSTRACT1.jpg 2018-08-11
11 786-MUM-2011-ABSTRACT(9-1-2012).pdf 2018-08-11
11 786-MUM-2011-FORM 5(9-1-2012).pdf 2018-08-11
12 786-MUM-2011-CLAIMS(9-1-2012).pdf 2018-08-11
12 786-MUM-2011-FORM 2(TITLE PAGE)-(9-1-2012).pdf 2018-08-11
13 786-MUM-2011-CORRESPONDENCE(2-9-2011).pdf 2018-08-11
13 786-MUM-2011-FORM 2(9-1-2012).pdf 2018-08-11
14 786-MUM-2011-CORRESPONDENCE(23-5-2012).pdf 2018-08-11
14 786-MUM-2011-FORM 18(23-5-2012).pdf 2018-08-11
15 786-MUM-2011-FORM 1(2-9-2011).pdf 2018-08-11
15 786-MUM-2011-CORRESPONDENCE(9-1-2012).pdf 2018-08-11
16 786-MUM-2011-FER.pdf 2018-08-11
16 786-MUM-2011-DESCRIPTION(COMPLTE)-(9-1-2012).pdf 2018-08-11
17 786-MUM-2011-DRAWING(9-1-2012).pdf 2018-08-11
18 786-MUM-2011-DESCRIPTION(COMPLTE)-(9-1-2012).pdf 2018-08-11
18 786-MUM-2011-FER.pdf 2018-08-11
19 786-MUM-2011-CORRESPONDENCE(9-1-2012).pdf 2018-08-11
19 786-MUM-2011-FORM 1(2-9-2011).pdf 2018-08-11
20 786-MUM-2011-CORRESPONDENCE(23-5-2012).pdf 2018-08-11
20 786-MUM-2011-FORM 18(23-5-2012).pdf 2018-08-11
21 786-MUM-2011-CORRESPONDENCE(2-9-2011).pdf 2018-08-11
21 786-MUM-2011-FORM 2(9-1-2012).pdf 2018-08-11
22 786-MUM-2011-CLAIMS(9-1-2012).pdf 2018-08-11
22 786-MUM-2011-FORM 2(TITLE PAGE)-(9-1-2012).pdf 2018-08-11
23 786-MUM-2011-ABSTRACT(9-1-2012).pdf 2018-08-11
23 786-MUM-2011-FORM 5(9-1-2012).pdf 2018-08-11
24 786-MUM-2011-PA [09-01-2021(online)].pdf 2021-01-09
24 ABSTRACT1.jpg 2018-08-11
25 786-MUM-2011-ASSIGNMENT DOCUMENTS [09-01-2021(online)].pdf 2021-01-09
26 786-MUM-2011-8(i)-Substitution-Change Of Applicant - Form 6 [09-01-2021(online)].pdf 2021-01-09
27 786-MUM-2011-Correspondence to notify the Controller [23-03-2021(online)].pdf 2021-03-23
28 Power of Authority.pdf 2018-08-11
28 786-MUM-2011-Written submissions and relevant documents [13-04-2021(online)].pdf 2021-04-13
29 786-MUM-2011-US(14)-HearingNotice-(HearingDate-30-03-2021).pdf 2021-10-03
29 786-MUM-2011-ABSTRACT [22-01-2018(online)].pdf 2018-01-22
30 786-MUM-2011-FORM-26 [26-10-2021(online)].pdf 2021-10-26
30 786-MUM-2011-CLAIMS [22-01-2018(online)].pdf 2018-01-22
31 786-MUM-2011-PatentCertificate11-07-2022.pdf 2022-07-11
31 786-MUM-2011-COMPLETE SPECIFICATION [22-01-2018(online)].pdf 2018-01-22
32 786-MUM-2011-IntimationOfGrant11-07-2022.pdf 2022-07-11
32 786-MUM-2011-FER_SER_REPLY [22-01-2018(online)].pdf 2018-01-22
33 786-MUM-2011-OTHERS [22-01-2018(online)].pdf 2018-01-22
33 786-MUM-2011-FORM-27 [05-09-2024(online)].pdf 2024-09-05

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