Interstage Matching Network Attenuator

Abstract: An impedance- matching network for a radio frequency (RF) transmission system can include first port for coupling to a first transistor differential pair. The network can further include a second port for coupling to a second transistor differential pair. The network can further include a matching network connected to the first port and die second port, the matching network comprised of a pair of coupled lines. Other aspects are described.

Patent Information

Application #

Filing Date

22 November 2023

Publication Number

51/2023

Publication Type

INA

Invention Field

ELECTRONICS

Status

Email

Parent Application

Applicants

INTEL CORPORATION

2200 Mission College Blvd. Santa Clara, California 95054

Inventors

1. BHAT, Ritesh

6571 NE Cherry Dr. Hillsboro, Oregon 97124

2. CALLENDER, Steven

118 NW 22nd Pl. Apt. 1 Portland, Oregon 97210

Specification

Documents

Application Documents

#	Name	Date
1	202347079223-PRIORITY DOCUMENTS [22-11-2023(online)].pdf	2023-11-22
2	202347079223-POWER OF AUTHORITY [22-11-2023(online)].pdf	2023-11-22
3	202347079223-FORM 1 [22-11-2023(online)].pdf	2023-11-22
4	202347079223-DRAWINGS [22-11-2023(online)].pdf	2023-11-22
5	202347079223-DECLARATION OF INVENTORSHIP (FORM 5) [22-11-2023(online)].pdf	2023-11-22
6	202347079223-COMPLETE SPECIFICATION [22-11-2023(online)].pdf	2023-11-22
7	202347079223-FORM 3 [03-05-2024(online)].pdf	2024-05-03
8	202347079223-FORM 18 [30-05-2024(online)].pdf	2024-05-30
9	202347079223-Proof of Right [30-10-2024(online)].pdf	2024-10-30