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Inverter Control Device

Abstract: The inverter control device (10) includes: a current detection unit (11) for detecting the current value of a DC bus (5) of an inverter (3); a detected current storing unit (12) for acquiring the current value at a current value detection timing; a phase current calculation unit (13) for restoring an AC current value; a command voltage vector generation unit (14) for generating a command voltage vector on the basis of the AC current value and a rotation speed command value; a corrected command voltage vector generation unit (15) for generating a corrected command voltage vector; and a switching time setting unit (16) which sets a switching time and outputs the switching time to the detected current storing unit (12) and a inverter control unit (17), wherein, with half the switching cycle defined as a unit cycle, the corrected command voltage vector is generated by applying a plurality of voltage vectors the sum of which becomes zero vector in n cycles (n is a natural number equal to or greater than 2). Thus, occurrence of current ripple is suppressed, whereby occurrence of a beat sound can be suppressed. [Figure: 1]

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Patent Information

Application #
Filing Date
27 July 2018
Publication Number
31/2018
Publication Type
INA
Invention Field
ELECTRICAL
Status
Email
Parent Application
Patent Number
Legal Status
Grant Date
2022-03-17
Renewal Date

Applicants

MITSUBISHI ELECTRIC CORPORATION
7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 100-8310, Japan.

Inventors

1. SANO, Sota
c/o Mitsubishi Electric Corporation, 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 100-8310
2. TERASHIMA, Satoru
c/o Mitsubishi Electric Corporation, 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 100-8310
3. FUKUOKA, Hiroatsu
c/o Mitsubishi Electric Corporation, 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 100-8310
4. SATAKE, Akira
c/o Mitsubishi Electric Corporation, 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 100-8310
5. FURUTANI, Shinichi
c/o Mitsubishi Electric Corporation, 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 100-8310

Specification

TECHNICAL FIELD
(0001] The present invention relates to an inverter control device for controlling an inverter which converts DC power to AC power, used for a rotating machine, in particular, an electric motor.
BACKGROUND ART
(0002] Conventionally, power conversion devices that convert DC power to AC power and drive an electric motor through feedback control using phase current, require means for detecting the phase current. For the purpose of cost reduction, instead of providing a current sensor between a power converter and the electric motor, a method of restoring electric motor current (phase current) using a current value detected from a DC bus of a power converter (inverter) is proposed.
(0003] For example, an inverter control device in Patent Document 1 includes: voltage command vector generation means for generating a voltage command vector which is a vector of voltage to be followed by the three-phase voltage of an inverter and is formed from a vector of combined voltage of phase voltages for three phases; and voltage command vector

correction means for correcting the generated voltage command vector, wherein the inverter is controlled in accordance with the corrected voltage command vector, the voltage command vector correction means performs correction so that, in the current detection interval, the voltage command vector corrected by the voltage command vector correction means becomes a vector outside a region in which the three-phase currents cannot be detected, and in a current non-detection interval in a carrier cycle, performs reverse correction for cancelling the correction in the current detection interval. Thus, in the current non-detection interval in which current detection does not need to be performed in the carrier cycle, reverse correction is performed so as to cancel the correction of the voltage command vector which is performed for current detection in the current detection interval, whereby it becomes possible to reduce phase current distortion due to the correction.
[0004] A three-phase voltage type PWM inverter device of Patent Document 2 outputs, in a first period composing one PWM period, two fundamental voltage vector components V4, V5 which allow generation of a command voltage vector and have phases different from each other by 60 degrees, and outputs, in a second period composing one PWM period and contiguous to the first period, two fundamental voltage vector components VI, V2 having phases respectively different from the above

fundamental voltage vector components by 180 degrees. Therefore, even in the case of small modulation degree or in a state in which the phase of an output voltage vector is close to the phase of a single fundamental voltage vector, a pulse width having a sufficient length is ensured, and current detection can be performed with high accuracy. Thus, it becomes possible to perform current detection with high accuracy, for example, even in the case of small modulation degree or in the case of being close to the phase of a single fundamental voltage vector.
CITATION LIST PATENT DOCUMENT
[0005] Patent Document 1: Japanese Laid-Open Patent Publication No. 2012-178927
Patent Document 2: Japanese Laid-Open Patent Publication No. 2005-12934
SUMMARY OF THE INVENTION
PROBLEMS TO BE SOLVED BY THE INVENTION
[000 6] However, in the inverter control methods of Patent Document 1 and Patent Document 2, a modulation factor region in which current detection can be performed is increased, but in a region in which the modulation factor for a command voltage is small in the case of low-speed driving or the like,

a command voltage vector component always becomes small, so that it becomes impossible to ensure an interval for performing current detection. Therefore, it is necessary to apply a voltage vector for performing current detection.
In addition, in order to make application voltage in each switching cycle equal to a command voltage, a compensation voltage vector is needed. Therefore, current ripple increases, leading to occurrence of noise. Further, in these two Patent Documents, since applied voltage is determined depending on a command voltage, a phase for detection in each control cycle is determined by a voltage command and cannot be selected, and thus there is a problem that detection accuracy deteriorates at a part where a command voltage magnitude relationship is switched. In addition, current ripple is great at the maximum-voltage phase and the minimum-voltage phase of command voltages for three-phase, and current ripple is small at the middle-voltage phase. That is, periodic change in current ripple occurs depending on three-phase voltage commands, thus causing a problem that a beat sound having a frequency six times as high as the frequency of driving of the electric motor occurs as noise.
[0007] Further, in the inverter device of Patent Document 2, three-phase AC currents can be restored only once per two cycles of the switching cycle, and thus there is a problem

that current detection accuracy deteriorates when a carrier frequency is small and the switching cycle is long. [0008] The present invention has been made to solve the above problems, and an object of the present invention is to provide an inverter control device that enables restoration of three-phase AC current values on the basis of current values for two phases detected from a DC bus without depending on three-phase voltage commands, whereby it becomes possible to set the phase for which detection is performed in each control cycle, and by performing processing such as always performing detection for the same phase, detection accuracy can be improved, and a beat sound as noise can be reduced.
SOLUTION TO THE PROBLEMS
[0009] In order to solve the above problem, an inverter control device of the present invention includes: an inverter control unit for controlling a switching element of an inverter which converts DC power to AC power, using a predetermined switching time; a current detection unit for detecting a current value of a DC power supply which supplies DC power to the inverter; a detected current storing unit which sets a current value detection time on the basis of the switching time, and which acquires the current value from the current detection unit and stores and retains the current

value; a phase current calculation unit for calculating and restoring an AC current value of AC current generated by the inverter, from the current values for a necessary number of phases for restoration stored in the detected current storing unit; a command voltage vector generation unit for generating a command voltage vector on the basis of the restored AC current value and a rotation speed command value; a corrected command voltage vector generation unit for generating a corrected command voltage vector on the basis of the command voltage vector; and a switching time setting unit which sets the switching time on the basis of the corrected command voltage vector and outputs the set switching time to the inverter control unit and the detected current storing unit. Where half a switching cycle of the inverter is defined as a unit cycle and n is a natural number equal to or greater than 2, the corrected command voltage vector generation unit generates the corrected command voltage vector by, if n is 3 or greater, applying a plurality of voltage vectors the sum of which becomes zero vector in n cycles of the unit cycles, and if n is 2, applying a plurality of voltage vectors the sum of which becomes zero vector in four cycles of the unit cycles.
EFFECT OF THE INVENTION
[0010] The inverter control device of the present

invention performs the setting of current value detection intervals such that, where half the switching cycle is defined as a unit cycle and n is a natural number equal to or greater than 3, in at least two of n cycles, voltage vectors for detection are applied so that the sum thereof becomes zero vector, and in the other cycles, a voltage vector based on the command voltage vector is applied. Therefore, it becomes possible to set the phase for which detection is performed in each control cycle, without depending on the command voltage vector. Thus, where k is a natural number equal to or smaller than n, if the voltage vector applied in the k-th cycle of the n cycles is set to be always the same, an effect of enabling reduction in a beat sound as noise due to periodic change in the magnitude of current pulsation is provided.
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] [FIG. 1] FIG. 1 is a schematic configuration diagram of a motor control system including an inverter control device according to embodiment 1.
[FIG. 2] FIG. 2 illustrates a procedure for setting a current detection time at which a current value is acquired from a DC bus by a current detection unit, in embodiment 1.
[FIG. 3] FIG. 3 illustrates an example of voltage

vectors applied in a corrected command voltage vector generation unit in embodiment 1.
[FIG. 4] FIG. 4 illustrates an example of voltage vectors applied in respective cycles in embodiment 1.
[FIG. 5] FIG. 5 shows an example of switchover of the applied voltage vector in embodiment 1.
[FIG. 6] FIG. 6 illustrates a relationship between switching times, and a command voltage vector and the applied voltage vector, in embodiment 1.
[FIG. 7] FIG. 7 shows an output current waveform of an inverter in embodiment 1.
[FIG. 8] FIG. 8 shows an output current waveform of a conventional inverter.
[FIG. 9] FIG. 9 is a diagram showing a hardware configuration of the inverter control device according to embodiment 1.
[FIG. 10] FIG. 10 is a schematic configuration diagram of a motor control system including an inverter control device according to embodiment 2.
[FIG. 11] FIG. 11 illustrates a relationship between switching times, and a command voltage vector and the applied voltage vector, in embodiment 2.
DESCRIPTION OF EMBODIMENTS [0012] Embodiment 1

FIG. 1 is a schematic configuration diagram of a motor control system including an inverter control device according to embodiment 1. FIG. 2 illustrates a procedure for setting a current value detection time at which a current value is acquired from a DC bus by a current detection unit. FIG. 3 illustrates an example of voltage vectors applied in a corrected command voltage vector generation unit. FIG. 4 illustrates an example of voltage vectors applied in respective cycles. FIG. 5 shows an example of switchover of the applied voltage vector. FIG. 6 illustrates a relationship between switching times, and a command voltage vector and the applied voltage vector. FIG. 7 shows an output current waveform of an inverter.
[0013] As shown in FIG. 1, the motor control system 1 in embodiment 1 includes: an electric motor 2 which is a rotating machine; an inverter 3 for supplying AC current values for three phases to the electric motor 2; a DC power supply 4 for supplying DC power to the inverter 3; a DC bus 5 electrically connecting the DC power supply 4 and the inverter 3; and an inverter control device 10 for controlling the inverter 3.
[0014] Here, the inverter 3 is composed of: three pairs
(for three phases) of switching elements, each pair being composed of a switching element 31s in an upper arm 31
(positive side) and a switching element 32s in a lower arm 32

(negative side); and diodes 31d, 32d connected in antiparallel to the respective switching elements 31s, 32s for each phase. The inverter control device 10 controls conduction/shut-off (ON/OFF) of the switching elements 31s, 32s for each phase, whereby DC power supplied from the DC power supply 4 is converted to three-phase AC power. The electric motor 2 which is a load is driven by the three-phase AC power. It is noted that, as the switching elements, semiconductor switching elements such as MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) are generally used.
[0015] As shown in FIG. 1, the inverter control device 10 includes: a current detection unit 11 for detecting the value of current flowing through the DC bus 5; a detected current storing unit 12 for acquiring a current value Idc from the current detection unit 11 at a set current value detection time and storing and retaining the current value Idc; a phase current calculation unit 13 for calculating and restoring AC current values Iu, Iv, Iw for three phases flowing through the electric motor 2, from current values IdcA, IdcB for two phases stored in the detected current storing unit 12; a command voltage vector generation unit 14 for generating command voltage vectors Vu, Vv, Vw for three phases as a target, on the basis of the restored AC current values Iu, Iv, Iw for three phases and a rotation speed command value Wref

issued from outside; a corrected command voltage vector generation unit 15 for generating corrected command voltage vectors Vu', Vv', Vw' for three phases by comparing the command voltage vectors Vu, Vv, Vw for three phases generated by the command voltage vector generation unit 14 with the command voltage vectors Vu, Vv, Vw for three phases at present; a switching time setting unit 16 for setting switching times at which the switching elements 31s, 32s are driven, on the basis of the command voltage vectors Vu', Vv', Vw' for three phases corrected by the corrected command voltage vector generation unit 15; and an inverter control unit 17 for outputting ON/OFF control signals Guu, Gvu, Gwu to the gates of the switching elements 31s, 32s for three phases and outputting ON/OFF control signals Gul, Gvl, Gwl to the gates of the switching elements 32s for three phases, on the basis of the switching times Sup, Svp, Swp, Swn, Svn, Sun set by the switching time setting unit 16. [0016] Next, the function of each part composing the inverter control device 10 shown in FIG. 1 will be described.
The current detection unit 11 is provided on the path of the DC bus 5 and includes a current detection element for detecting a current value. The current detection element is, for example, a Hall sensor, a resistor, or a current transformer, and voltage between both ends of the current detection element or output voltage thereof is detected, via

an amplifier, a buffer, etc., as necessary. In FIG. 1, as an example, the current detection element is provided on the low voltage (negative) side of the DC power supply 4. However, the current detection element may be provided on the high voltage (positive) side, and in either case, there is no influence on operation in the present embodiment. [0017] The detected current storing unit 12 acquires the current value Idc from the current detection unit 11 at current value detection times Ta, Tb set by the switching time setting unit 16 described later, and stores and retains the current value Idc. The detected current storing unit 12 retains the detected current values IdcA, IdcB for two phases described later.
[0018] The phase current calculation unit 13 calculates and restores the AC current values Iu, Iv, Iw for three phases flowing through the electric motor 2, using the current values IdcA, IdcB for two phases detected from the DC bus 5 and stored in the detected current storing unit 12. Here, the calculation of the AC current values Iu, Iv, Iw for three phases is performed using the corrected command voltage vectors Vu', Vv', Vw' for three phases outputted from the corrected command voltage vector generation unit 15 described later.
[0019] The command voltage vector generation unit 14 generates new command voltage vectors Vu, Vv, Vw for three

phases as a driving target for the inverter 3 in each set switching cycle on the basis of the rotation speed command value Wref issued from outside and the AC current values Iu, Iv, Iw for three phases restored by the phase current calculation unit 13, thereby performing update. [0020] The corrected command voltage vector generation unit 15 applies a voltage vector Va for current value detection for two phases, which has such a magnitude as to allow current value detection, and a voltage vector Vb for cancelling the voltage vector Va, to the command voltage vectors Vu, Vv, Vw for three phases generated by the command voltage vector generation unit 14, thereby generating corrected command voltage vectors Vu', Vv', Vw' for three phases, and outputs the corrected command voltage vectors Vu', Vv', Vw' to the switching time setting unit 16. In addition, the newly corrected command voltage vectors Vu', Vv', Vw' for three phases are also outputted and used for the phase current calculation unit 13.
[0021] The switching time setting unit 16 sets the switching times Sup, Svp, Swp, Swn, Svn, Sun at which the switching elements 31s, 32s composing the inverter 3 are driven, on the basis of the corrected command voltage vectors Vu', Vv', Vw' for three phases generated by the corrected command voltage vector generation unit 15. At the set switching times Sup, Svp, Swp, Swn, Svn, Sun, ON/OFF control

signals are outputted to the gates of the switching elements 31s, 32s, whereby the inverter 3 is driven. [0022] The detected current storing unit 12 sets the current value detection times Ta, Tb using the switching times Sup, Svp, Swp, Swn, Svn, Sun set by the switching time setting unit 16, and at the set current value detection times Ta, Tb, acquires the current values IdcA, IdcB of the DC bus 5 detected by the current detection unit 11, and stores and retains the current values IdcA, IdcB.
[0023] At the switching times Sup, Svp, Swp, Swn, Svn, Sun set by the switching time setting unit 16, the inverter control unit 17 outputs the ON/OFF control signals Guu, Gvu, Gwu to the gates of the switching elements 31s in the upper arms. At the same time, the inverter control unit 17 outputs, to the gates of the switching elements 32s in the lower arms, the ON/OFF control signals Gul, Gvl, Gwl which are opposite to those for the switching elements 31s in the upper arms. [0024] Next, operation of the inverter control device 10 will be described with reference to FIG. 1 to FIG. 6.
FIG. 2 illustrates a procedure for setting the current value detection times Ta, Tb on the basis of the switching times Sup, Svp, Swp for the switching elements 31s composing the upper arms. Here, FIG. 2(a), FIG. 2(b), and FIG. 2(c) show the switch states of the switching elements 31s composing the upper arms for the respective phases, and

respectively show the switch state for the maximum-voltage phase (U phase), the switch state for the middle-voltage phase (V phase), and the switch state for the minimum-voltage phase (W phase). In addition, FIG. 2(d) shows the current value of the DC bus 5, FIG. 2(e) shows the current value detection times Ta, Tb, and FIG. 2(f) shows the switching times Sup, Svp, Swp, Swn, Svn, Sun for the switching elements 31s, 32s.
[0025] The switching time setting unit 16 sets the current value detection times Ta, Tb using the switching times Sup, Svp, Swp for the switching elements 31s. In order to detect the current values IdcA, IdcB for two phases from the DC bus 5, it is necessary to select two of current value detection intervals which are intervals in which the switch states of the switching elements 31s in the upper arms for three phases are not all ON or not all OFF, i.e., intervals having switch states corresponding to non-zero vector, and perform detection in the selected intervals. Therefore, the current value detection times Ta, Tb at which the current values IdcA, IdcB are detected are set depending on the switching time for the switching element 31s for the middle-voltage phase (V phase). The corrected command voltage vectors Vu', Vv', Vw' for three phases generated by the corrected command voltage vector generation unit 15 are defined as, in the order from the greatest one, the maximum-voltage phase, the middle-

voltage phase, and the minimum-voltage phase. For example, FIG. 2 shows the case where Vu' corresponds to the maximum-voltage phase (U phase), Vv' corresponds to the middle-voltage phase (V phase), and Vw' corresponds to the minimum-voltage phase (W phase).
[0026] In FIG. 2(a), FIG. 2(b), FIG. 2(c), the switch states of the switching elements 31s composing the upper arms for the respective phases are shown, while the switch states of the switching elements 32s composing the lower arms are opposite to the switch states in the upper arms. That is, when the switching element 31s in the upper arm for the maximum-voltage phase (U phase) is ON (conductive), the switching element 32s in the lower arm for the maximum-voltage phase (U phase) is OFF (shut off).
[0027] Of the current values IdcA, IdcB detected for two phases, IdcA is defined as a current value of the DC bus 5 detected during the non-zero voltage vector period that appears first, and IdcB is defined as a current value of the DC bus 5 detected during the non-zero voltage vector period that appears second. In FIG. 2, Ta which is the current value detection time for the current value IdcA is set at a predetermined time period Tl before the switching time Svp for the switching element 31s for the middle-voltage phase (V phase). Here, Tl is set to be longer than a time period required for current value detection. In FIG. 2, Tb which is

the current value detection time for the current value IdcB is set at a predetermined time period T2 after Ta. Here, T2 needs to be set considering a dead time interval provided for preventing each pair of switching elements 31s, 32s connected in series in the inverter 3 from becoming conductive at the same time, and in addition, since the current value Idc of the DC bus 5 can oscillate by sharp voltage change due to ON/OFF operations of the switching elements 31s, 32s, T2 needs to be set also considering the current oscillation. [0028] FIG. 2 shows an example of the above and shows an interval (hereinafter, referred to as a current value detection impossible interval Ti) in which current oscillates by sharp voltage change due to ON/OFF operations of the switching elements 31s in the non-zero voltage vector interval at the switching times Sup, Svp, Swp for the switching elements 31s and thus a current value cannot be detected, and a current value detection possible interval Tp. Therefore, T2 is set so that Tb is not within the current value detection impossible interval Ti. At this time, IdcA indicates a current value for the maximum-voltage phase (U phase), and IdcB indicates a current value for the minimum-voltage phase (W phase) . From the current values for the two phases, the phase current calculation unit 13 calculates a current value for the middle-voltage phase (V phase). The difference between the current value detection times for IdcA

and IdcB is set to be as short as possible. The reason is as follows. By the non-zero voltage vector, current flows through the electric motor 2 and the current value of the DC bus 5 also changes. Therefore, if Ta and Tb are away from each other, the current value detection accuracy for the middle-voltage phase (V phase) is deteriorated.
[0029] FIG. 2 shows an example in which current value detection is performed during the first-half two non-zero voltage vector periods of the four non-zero voltage vector periods in a switching cycle T. However, current value detection may be performed during the second-half two non¬zero voltage vector periods, and also in this case, the same processing is performed. In this case, IdcA indicates a current value of the DC bus 5 detected during the third non¬zero voltage vector period, and IdcB indicates a current value of the DC bus 5 detected during the fourth non-zero voltage vector period. At this time, IdcA indicates the current value for the minimum-voltage phase (W phase), and IdcB indicates the current value for the maximum-voltage phase (U phase).
[0030] The phase current calculation unit 13 has a role of restoring the AC current values Iu, Iv, Iw for three phases from the detected current values IdcA, IdcB for two phases stored in the detected current storing unit 12. The signs of the current values for two phases are determined on the basis

of the command voltage vectors Vu, Vv, Vw for three phases generated by the command voltage vector generation unit 14. The current value for the other one phase can be easily calculated from the current values IdcA, IdcB for two phases the signs of which have been already determined, using the fact that the sum of the current values for three phases is zero. Through the above calculation, it is possible to restore the required AC current values Iu, Iv, Iw for three phases flowing through the electric motor 2. The calculated AC current values Iu, Iv, Iw for three phases are used for control processes and the like for the respective parts, e.g., for a process of updating (generating) the command voltage vectors for the three phases in the command voltage vector generation unit 14, and for monitoring the output of the electric motor 2.
[0031] The command voltage vector generation unit 14 has a role of generating the command voltage vectors Vu, Vv, Vw for three phases as an output target of the inverter 3. Depending on the control method for the electric motor 2, various command voltage vector generation methods are known. However, these methods are irrelevant to the essence of the present invention, and therefore the description thereof is omitted here.
[0032] The corrected command voltage vector generation unit 15 has a role of applying voltage vectors to the command

voltage vector V (Vu, Vv, Vw) generated by the command voltage vector generation unit 14. Here, the applied voltage vectors are voltage vectors that can ensure the current value detection intervals for two phases, and these voltage vectors are, for example, voltage vectors Va, Vb different from each other. Where half the switching cycle is defined as unit cycle, it is necessary to satisfy a condition that the sum of the voltage vectors Va and Vb applied in n unit cycles becomes zero vector. Further, it is desirable that the voltage vectors Va, Vb applied in each cycle of the switching cycle are combined vectors of a series of fundamental voltage vectors VI(100) to V6(101), in order to reduce loss in switching.
[0033] Here, three numbers in parentheses of each fundamental voltage vector indicate, as for the switching elements 31s in the upper arms, the switch states of the respective switching elements 31s for U phase, V phase, and W phase from the left, and "1" indicates ON and "0" indicates OFF. For example, VI(100) indicates that the switching element 31s for U phase is ON and the switching elements 31s for the other phases are OFF. The same applies to the case of switching elements 32s in the lower arms. [0034] Here, an example of the applied voltage vectors will be described with reference to FIG. 3. In FIG. 3, the case of unit cycle n = 3 is assumed for simplification

purpose. In the first unit cycle shown in FIG. 3(a), VI(100) and V2(110) which are non-zero voltage vectors are outputted on the basis of the command voltage vector V, and in the second unit cycle shown in FIG. 3(b), V2(110) and V3(010) are outputted as the voltage vector Va for ensuring the current value detection interval. In the third unit cycle shown in FIG. 3(c), V5(001) and V6(101) are outputted, as the voltage vector Vb for ensuring the current value detection interval, so as to cancel the voltage vector Va in the second cycle of the unit cycle. Therefore, the sum of the applied voltage vectors Va and Vb other than the command voltage vector V in the three unit cycles is zero vector. Thus, the command voltage vector V after the voltage vectors Va, Vb for ensuring the current detection intervals are applied is to coincide with the command voltage vector V before the voltage vectors Va, Vb are applied, in terms of the sum in the three unit cycles.
[0035] FIG. 4 shows an example of a relationship between the command voltage vector V and the output voltage vector Vo in each unit cycle. FIG. 4(a) shows a relationship between the command voltage vector V and the output voltage vector Vo in the first to n-th cycles, where n denotes the unit cycle number, and FIG. 4(b) shows a relationship between the command voltage vector V and the output voltage vector Vo in the (n + l)-th to (n + n)-th cycles. In the first to n-th

unit cycles, a voltage vector obtained by combining V6 and VI is applied in the k-th cycle, a voltage vector obtained by combining V4 and V5 is applied in the m-th cycle, and a voltage vector obtained by combining V2 and V3 is applied in the n-th cycle. As described above, the sum of the voltage vectors applied during the first to n-th unit cycles becomes zero vector. Therefore, the output voltage vector Vo in the first cycle becomes the same as the command voltage vector V. Similarly, in the (n + l)-th to (n + n)-th unit cycles, a •voltage vector obtained by combining V6 and VI is applied in the k-th cycle, a voltage vector obtained by combining V4 and V5 is applied in the m-th cycle, and a voltage vector obtained by combining V2 and V3 is applied in the n-th cycle. The sum of the voltage vectors applied during the (n + l)-th to n-th unit cycles becomes zero vector. Therefore, the output voltage vector Vo in the (n + l)-th cycle becomes the same as the command voltage vector V. It is noted that the output voltage vector Vo in the first cycle and the output voltage vector Vo in the (n + l)-th cycle have different values. That is, the sum of the voltage vectors applied in the respective unit cycles becomes zero vector, and the same voltage vector is always applied on an n-cycle basis, i.e., in the k-th cycle and the (n + k)-th cycle. That is, a voltage vector not depending on the command voltage vector V is applied.

[0036] FIG. 5 shows an example of switchover of the applied voltage vector. As shown in FIG. 4, the voltage vector (voltage vector obtained by combining V6 and VI) applied in the k-th cycle of the n cycles is always the same voltage vector, but when a period longer than the drive cycle has elapsed, e.g., at a timing of restarting the inverter 3 next after operation thereof is stopped, a voltage vector (voltage vector obtained by combining V4 and V5) different from that before the operation is stopped is applied. The switched voltage vector is always applied as the same voltage vector on an n-cycle basis again as shown in FIG. 4. [0037] In this way, the corrected command voltage vector generation unit 15 applies the voltage vector Va for current value detection for two phases, which has such a magnitude as to allow current value detection, and the voltage vector Vb for cancelling the voltage vector Va, to the command voltage vectors V for three phases generated by the command voltage vector generation unit 14, thereby generating the corrected command voltage vectors Vu', Vv', Vw' for three phases. [0038] The switching time setting unit 16 has a role of setting the switching times Sup, Svp, Swp, Sun, Svn, Swn on the basis of the corrected command voltage vectors Vu', Vv', Vw' for three phases generated by the corrected command voltage vector generation unit 15. FIG. 6 illustrates a relationship between the switching times, and the command

voltage vector and the applied voltage vector. FIG. 6 shows an example of setting of the switching times Sup to Swn on the basis of the command voltage vector V in the first cycle generated in FIG. 3. In FIG. 6, FIG. 6(a) shows the output voltage vector Vo, FIG. 6(b) shows the applied voltage vector Va, FIG. 6(c) shows the command voltage vector V, and FIG. 6(d) shows the output voltage vector Vo. In addition, as in FIG. 2, FIG. 6(e), FIG. 6(f), and FIG. 6(g) show the switch states of the gates of the switching elements 31s in the upper arms for the respective phases, and respectively show the switch state for the maximum-voltage phase (U phase), the switch state for the middle-voltage phase (V phase), and the switch state for the minimum-voltage phase (W phase). The switch states of the gates of the switching elements 32s in the lower arms are opposite to the switch states of the gates of the switching elements 31s in the upper arms. FIG. 6(h) shows the switching times Sup, Svp, Swp, Swn, Svn, Sun for the switching elements 31s, 32s.
[0039] Here, as shown in FIG. 6(d), in n unit cycles, the command voltage vector V (FIG. 6(c)) and the applied voltage vector Va (FIG. 6(b)) are outputted separately from each other. In FIG. 6(d), numbers in boxes at the stage of output voltage vector Vo indicate fundamental voltage vectors. It is noted that w0" represents V0(000) which indicates that the switching elements 31s for the three phases are all OFF, and

"7" represents V7(lll) which indicates that the switching elements 31s for the three phases are all ON. In the example in FIG. 6, first, from the state in which the switching elements 31s for three phases are all OFF, on the basis of the applied voltage vector Va, the switching element 31s for V phase is turned on, the switching element 31s for U phase is turned on, subsequently, the switching elements 31s for three phases are all turned on, and further, on the basis of the command voltage vector V, the switching element 31s for W phase is turned off, the switching elements 31s for V phase and W phase are turned off, and finally, the switching elements 31s for three phases are all turned off.
[0040] Therefore, as shown in FIG. 6(d), the interval corresponding to pulse-like voltages for switching outputted on the basis of the voltage vector Va applied to the three phases becomes the current value detection interval for the DC bus 5. In addition, in the switching cycle, the command voltage vector V and the applied voltage vector Va are outputted separately from each other. Therefore, it becomes possible to perform current value detection in the output interval of the applied voltage vector Va in each switching cycle, and thus it becomes possible to restore the AC current values Iu, Iv, Iw for three phases in each switching cycle.
[0041] On the basis of the switching times Sup, Svp, Swp, Sun, Svn, Swn set by the switching time setting unit 16, the

inverter control unit 17 outputs the ON/OFF control signals Guu, Gvu, Gwu to the gates of the switching elements 31s for three phases in the upper arms, and outputs the ON/OFF control signals Gul, Gvl, Gwl opposite to those for the switching element 31s for three phases in the upper arms, to the gates of the switching elements 32s for three phases in the lower arms, thereby controlling the phase currents outputted from the inverter 3.
[0042] FIG. 7 shows an example of output waveforms of phase currents by the inverter control device of the present embodiment. In addition, FIG. 8 shows output waveforms of phase currents by the conventional inverter control method shown in Patent Document 1. Here, for comparison between the effect of the technology shown in Patent Document 1 and the effect of the technology of the present embodiment, waveforms of phase currents in the case of driving with a switching frequency of 2 kHz and a frequency command of 0.5 Hz are shown. As is obvious from FIG. 7, it is found that periodic change in current ripple (part enclosed by circle in FIG. 8) which would occur in the conventional technology is reduced in the present embodiment.
[0043] Therefore, by applying only the minimum necessary voltage vectors for ensuring the current value detection intervals for the DC bus, it becomes unnecessary to provide compensation voltage that depends on a magnitude relationship

of the command voltage vector, and in addition, since the applied voltage vector is also set not depending on the command voltage vector, it becomes possible to set the phase for which detection is performed in each control cycle. Thus, for example, by always detecting the current value for the same phase, it becomes possible to improve the detection accuracy. In addition, the voltage vector applied in the k-th cycle of each set of n cycles is set to be constant, whereby the shape of current ripple becomes constant irrespective of a magnitude relationship of the command voltage vector, and thus the periodic change does not occur. By eliminating the periodic change in current ripple, it becomes possible to eliminate a beat sound having a frequency six times as high as the frequency for driving the electric motor 2. In addition, by switching the k-th applied voltage vector when a longer period than the drive cycle has elapsed, it becomes possible to prevent consumption of each switching element due to repetition of the same switching. [0044] As described above, in the inverter control device according to embodiment 1, where half the switching cycle is defined as a unit cycle and n is a natural number equal to or greater than 3, in n cycles, the sum of voltage vectors applied for current value detection in at least two cycles is set to be zero vector, and a voltage vector based on the command voltage vector is applied in the other cycles,

whereby the current value detection intervals are set. Therefore, it becomes possible to set the phase for which detection is performed in each control cycle, without depending on the command voltage vector. Thus, where k is a natural number equal to or smaller than n, if the voltage vector applied in the k-th cycle of the n cycles is set to be always the same, an effect of enabling reduction in a beat sound as noise due to periodic change in the magnitude of current pulsation is provided.
[0045] FIG. 9 shows a hardware configuration of the inverter control device according to embodiment 1. The inverter control device 10 includes a processor 50, a storage device 51, and a current sensor 52, and the functions of the respective parts described above are realized by these components. For example, the storage device 51 stores a program for control, and in addition, various data such as data obtained by calculation, detected current values, and command voltage vectors for three phases. The processor 50 performs calculation using programs and data stored in the storage device 51 and needed for executing the operation of the present embodiment. The current sensor 52 which is a current detection element acquires a current value from the DC bus 5. The storage device 51 includes a volatile storage device such as a random access memory, and a nonvolatile auxiliary storage device such as a flash memory. As the

nonvolatile auxiliary storage device, an auxiliary storage device such as a hard disk may be used, instead of a flash memory. [004 6] Embodiment 2
FIG. 10 is a schematic configuration diagram of a motor control system including an inverter control device according to embodiment 2. FIG. 11 illustrates a relationship between the switching times, and the command voltage vector and the applied voltage vector. The difference between the inverter control device according to embodiment 2 and the inverter control device according to embodiment 1 is that, as shown in FIG. 10, in the inverter control device 20 of the motor control system 9 of embodiment 2, the detected current storing unit 12 is replaced with a detected current storing unit 22, and the phase current calculation unit 13 is replaced with a phase current calculation unit 23. The other components are the same as those in FIG. 1 of embodiment 1, and therefore the description thereof is omitted.
[0047] In the above embodiment 1, as shown in FIG. 6, n is set to be equal to or greater than 3, and current value detection is performed in the output intervals of voltage vectors applied in n unit cycles each of which is half the switching cycle. In embodiment 2, the case of performing current value detection when n is 2 will be described. If n

is 2, there is only one output interval of the applied voltage vector. Therefore, as shown in FIG. 11, the switching cycles are classified into two cycles, i.e., the first-half cycle and the second-half cycle, and the voltage vector for current value detection is applied alternately in the first-half cycle and the second-half cycle per switching cycle.
[0048] Next, operation of the inverter control device 20 according to the present embodiment 2 will be described with reference to FIG. 10 and FIG. 11.
In embodiment 1, as shown in FIG. 6, in each unit cycle which is half the switching cycle, the command voltage vector V and the voltage vector Va applied for ensuring the current value detection interval are outputted separately from each other, and it is necessary to make the output voltage vector Vo equal to the command voltage vector V in the n unit cycles. Therefore, at least two unit cycles are needed for applying the voltage vectors Va, Vb to be applied, and thus, a total of three unit cycles are needed including at least one unit cycle for outputting the command voltage vector V. In embodiment 2, as shown in FIG. 11, in the switching time setting unit 16, in one of two unit cycles, the command voltage vector V is outputted, and in the other one of the two unit cycles, the voltage vector Va applied for ensuring the current value detection interval is outputted.

In addition, the order of separate outputs of the command voltage vector V and the applied voltage vector Va, Vb is switched every switching cycle. Along with this, the position for current value detection is also switched every switching cycle. In this way, the voltage vector Va applied for current value detection in the first cycle can be cancelled by the voltage vector Vb applied for current value detection in the second cycle. Thus, unlike embodiment 1, the voltage vector Vb applied for cancellation is not needed in n cycles, and it becomes possible to output the command voltage vector V and the voltage vector Va, Vb applied for ensuring the current value detection interval in two unit cycles.
[0049] The detected current storing unit 22 has a function of acquiring and storing current values IdcA, IdcB, IdcC, IdcD detected for the last two switching cycles, and the phase current calculation unit 23 has a function of calculating AC current values Iul, Ivl, Iwl, Iu2, Iv2, Iw2 for three phases for two switching cycles from the above four detected current values, and outputting the AC current values Iu, Iv, Iw for three phases obtained by respectively averaging the AC current values Iul, Ivl, Iwl, Iu2, Iv2, Iw2. In this way, by changing the current value detection positions in the last two switching cycles and outputting the average values thereof, it becomes possible to perform

accurate current detection with a decreased influence of current ripple.
[0050] As described above, in the inverter control device according to embodiment 2, in one of two unit cycles, the command voltage vector is outputted, and in the other one of the two unit cycles, a voltage vector applied for ensuring the current value detection interval is outputted, whereby setting of the current value detection interval is performed. Therefore, it becomes possible to set the phase for which detection is performed in each control cycle, without depending on the command voltage vector. Thus, if the voltage vector applied first in the two cycles is set to be always the same, an effect of enabling further reduction in a beat sound as noise due to periodic change in the magnitude of current pulsation is provided.
[0051] The inverter control device according to the present invention is useful for a motor control system widely applicable to systems for driving various rotating machines such as electric motors, and in particular, suitable for a motor control system that performs driving at a low triangular carrier wave frequency and in a region in which the command voltage modulation factor is low. [0052] It is noted that, within the scope of the present invention, the above embodiments may be freely combined with each other, or each of the above embodiments may be modified

or simplified as appropriate.
[0053] In the drawings, the same reference characters
denote the same or corresponding parts.
DESCRIPTION OF THE REFERENCE CHARACTERS [0054] 1, 9 motor control system
2 electric motor
3 inverter
4 DC power supply
5 DC bus

10 inverter control device
11 current detection unit 31s, 32s switching element 31d, 32d diode

12, 22 detected current storing unit
13, 23 phase current calculation unit

14 command voltage vector generation unit
15 corrected command voltage vector generation
unit
16 switching time setting unit
17 inverter control unit

50 processor
51 storage device
52 current sensor

We claim:
[1] An inverter control device comprising:
an inverter control unit for controlling a switching element of an inverter which converts DC power to AC power, using a predetermined switching time;
a current detection unit for detecting a current value of a DC power supply which supplies DC power to the inverter;
a detected current storing unit which sets a 'current value detection time on the basis of the switching time, and which acquires the current value from the current detection unit and stores and retains the current value;
a phase current calculation unit for calculating and restoring an AC current value of AC current generated by the inverter, from the current values for a necessary number of phases for restoration stored in the detected current storing unit;
a command voltage vector generation unit for generating a command voltage vector on the basis of the restored AC current value and a rotation speed command value;
a corrected command voltage vector generation unit for generating a corrected command voltage vector on the basis of the command voltage vector; and
a switching time setting unit which sets the switching time on the basis of the corrected command voltage

vector and outputs the set switching time to the inverter control unit and the detected current storing unit, wherein
where half a switching cycle of the inverter is defined as a unit cycle and n is a natural number equal to or greater than 2, the corrected command voltage vector generation unit generates the corrected command voltage vector by, if n is 3 or greater, applying a plurality of voltage vectors the sum of which becomes zero vector in n cycles of the unit cycles, and if n is 2, applying a plurality of voltage vectors the sum of which becomes zero vector in four cycles of the unit cycles.
[2] The inverter control device according to claim 1, wherein
the n cycles are three or more cycles, and in at least two cycles thereof, the plurality of voltage vectors having such magnitudes as to ensure detection intervals for the current values for the necessary number of phases for restoration are applied respectively.
[3] The inverter control device according to claim 2, wherein
where k is a natural number equal to or smaller than n, the voltage vector applied in the k-th cycle of the n cycles is the same voltage vector on an n-cycle basis.

[4] The inverter control device according to claim 3,
wherein
the voltage vector applied in the k-th cycle is switched to a different voltage vector when a period longer than the n cycles has elapsed.
[5] The inverter control device according to claim 1,
wherein
the n cycles are two cycles, and either of the plurality of voltage vectors having such magnitudes as to ensure detection intervals for the current values for the necessary number of phases for restoration is applied in one of a first-half cycle set and a second-half cycle set thereof,
and
the plurality of voltage vectors are applied alternately in the first-half cycle set and the second-half cycle set per different set of the n cycles.
[6] The inverter control device according to claim 5, wherein
the voltage vector applied in the first-half cycle set is the same voltage vector on a 2n-cycle basis, and the voltage vector applied in the second-half cycle set is the same voltage vector on a 2n-cycle basis.

[7] The inverter control device according to claim 6,
wherein
either of the plurality of voltage vectors applied in one of the first-half cycle set and the second-half cycle set is switched to a voltage vector having a different value when a period longer than the n cycles has elapsed.
[8] The inverter control device according to any one of claims 5 to 7, wherein
average values of the respective current values for the necessary number of phases for restoration detected in different sets of the n cycles are used as the current values.

Documents

Application Documents

# Name Date
1 201847028327-TRANSLATIOIN OF PRIOIRTY DOCUMENTS ETC. [27-07-2018(online)].pdf 2018-07-27
2 201847028327-STATEMENT OF UNDERTAKING (FORM 3) [27-07-2018(online)].pdf 2018-07-27
3 201847028327-REQUEST FOR EXAMINATION (FORM-18) [27-07-2018(online)].pdf 2018-07-27
4 201847028327-PROOF OF RIGHT [27-07-2018(online)].pdf 2018-07-27
5 201847028327-PRIORITY DOCUMENTS [27-07-2018(online)].pdf 2018-07-27
6 201847028327-POWER OF AUTHORITY [27-07-2018(online)].pdf 2018-07-27
7 201847028327-FORM 18 [27-07-2018(online)].pdf 2018-07-27
8 201847028327-FORM 1 [27-07-2018(online)].pdf 2018-07-27
9 201847028327-DRAWINGS [27-07-2018(online)].pdf 2018-07-27
10 201847028327-DECLARATION OF INVENTORSHIP (FORM 5) [27-07-2018(online)].pdf 2018-07-27
11 201847028327-COMPLETE SPECIFICATION [27-07-2018(online)].pdf 2018-07-27
12 201847028327-CLAIMS UNDER RULE 1 (PROVISIO) OF RULE 20 [27-07-2018(online)].pdf 2018-07-27
13 Correspondence by Agent_Form1 _09-08-2018.pdf 2018-08-09
14 abstract 201847028327.jpg 2018-08-29
15 201847028327.pdf 2018-08-29
16 201847028327-FORM 3 [09-11-2018(online)].pdf 2018-11-09
17 201847028327-FER.pdf 2019-12-16
18 201847028327-OTHERS [10-06-2020(online)].pdf 2020-06-10
19 201847028327-Information under section 8(2) [10-06-2020(online)].pdf 2020-06-10
20 201847028327-FORM-26 [10-06-2020(online)].pdf 2020-06-10
21 201847028327-FORM 3 [10-06-2020(online)].pdf 2020-06-10
22 201847028327-FER_SER_REPLY [10-06-2020(online)].pdf 2020-06-10
23 201847028327-DRAWING [10-06-2020(online)].pdf 2020-06-10
24 201847028327-COMPLETE SPECIFICATION [10-06-2020(online)].pdf 2020-06-10
25 201847028327-CLAIMS [10-06-2020(online)].pdf 2020-06-10
26 201847028327-ABSTRACT [10-06-2020(online)].pdf 2020-06-10
27 201847028327-PatentCertificate17-03-2022.pdf 2022-03-17
28 201847028327-IntimationOfGrant17-03-2022.pdf 2022-03-17
29 201847028327-RELEVANT DOCUMENTS [20-09-2023(online)].pdf 2023-09-20

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