Abstract: An inverter controller (5) comprises: a carrier-wave generation unit (8) for generating a three-phase carrier wave; and a PWM control unit (7) for controlling a switching state of an inverter by comparing the carrier wave and a modulated wave. The carrier-wave generation unit (8) comprises: a phase arithmetic unit (81) for calculating first to third carrier-wave phases on the basis of a carrier-wave frequency command and a motor frequency; and a carrier-wave output unit (82) for outputting the three-phase carrier wave on the basis of the first to third carrier-wave phases. The first to third carrier-wave phases have phase differences that vary continuously according to a change in motor frequency.
FORM 2
THE PATENTS ACT, 1970
(39 of 1970)
&
THE PATENTS RULES, 2003
COMPLETE SPECIFICATION
[See section 10, Rule 13]
INVERTER CONTROL DEVICE AND ELECTRIC MOTOR DRIVE APPARATUS;
MITSUBISHI ELECTRIC CORPORATION, A CORPORATION ORGANISED
AND EXISTING UNDER THE LAWS OF JAPAN, WHOSE ADDRESS IS 7-3,
MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO 100-8310, JAPAN
THE FOLLOWING SPECIFICATION PARTICULARLY DESCRIBES THE
INVENTION AND THE MANNER IN WHICH IT IS TO BE PERFORMED
2
DESCRIPTION
Field
[0001] The present disclosure relates to an inverter
5 control device that controls an inverter and an electric
motor drive apparatus that includes the inverter control
device.
Background
10 [0002] Electric motors that apply a propulsive force to
electric vehicles are driven by inverters. On a track
where electric vehicles travel, track antenna beacons that
are receivers of various types of signals are disposed. In
order to prevent malfunctioning of these track antenna
15 beacons, regulations on leakage noise are set for the
electric vehicles. Patent Literature 1 below describes
that, in order to reduce common mode noise, a hollow core
formed of ferromagnetic material such as ferrite or
amorphous metal is arranged around a wire that connects the
20 inverter and the electric motor.
Citation List
Patent Literature
[0003] Patent Literature 1: Japanese Patent Application
25 Laid-open No. 2004-187368
Summary
Technical Problem
[0004] However, a space under a floor of an electric
30 vehicle is limited. Therefore, there is, in some cases, no
space sufficient for additionally providing a filter
component such as the cores described in Patent Literature
1 described above. In such a case, in order to secure the
3
space for additionally providing the filter component, it
is, in some cases, necessary to review the specifications
of an inverter control device.
[0005] Furthermore, the filter characteristics of the
5 filter component need to be determined according to the
impedance including that of an electric motor. However,
the manufacturer of the electric motor and the manufacturer
of the inverter control device are not necessarily the same.
In this case, depending on additional provision of the
10 filter component will increase the number of design steps
for the manufacturer of the inverter control device, and
increase an adjustment work on practical vehicles.
Therefore, it is desired to reduce leakage noise without
depending on additional provision of the filter component.
15 [0006] The present disclosure has been made in
consideration of the above, and an object of the present
disclosure is to provide an inverter control device that
can reduce leakage noise without depending on additional
provision of a filter component.
20
Solution to Problem
[0007] In order to solve the above problems and achieve
the object, the present disclosure is an inverter control
device that controls an inverter that drives a three-phase
25 electric motor through pulse width modulation. The
inverter control device includes: a carrier wave generation
unit to generate three-phase carrier waves; and a pulse
width modulation control unit to control a switching state
of the inverter by comparing the carrier wave with a
30 modulated wave. The carrier wave generation unit includes
a phase calculation unit to calculate first to third
carrier wave phases on the basis of a carrier wave
frequency command and an electric motor frequency, and a
4
carrier wave output unit to output the three-phase carrier
waves on the basis of the first to the third carrier wave
phases. The first to the third carrier wave phases have
phase differences from each other, and the phase difference
5 continuously changes according to a change in the electric
motor frequency.
Advantageous Effects of Invention
[0008] The inverter control device according to the
10 present disclosure produces an effect that leakage noise
can be reduced without depending on additional provision of
a filter component.
Brief Description of Drawings
15 [0009] FIG. 1 is a diagram illustrating an exemplary
configuration of an electric motor drive apparatus
including an inverter control device according to a first
embodiment.
FIG. 2 is a diagram illustrating an exemplary
20 configuration of a general inverter main circuit.
FIG. 3 is a diagram illustrating an equivalent circuit
in FIG. 1 used for explaining a leakage current.
FIG. 4 is a diagram used for explaining a method for
generating pulse width modulation (PWM) control signals
25 provided to semiconductor elements of each arm illustrated
in FIG. 2.
FIG. 5 is a diagram illustrating PWM control signals
generated according to individual phase voltage commands
illustrated in FIG. 4.
30 FIG. 6 is a diagram illustrating a common mode voltage
generated by the PWM control signals illustrated in FIG. 5.
FIG. 7 is a diagram illustrating an example of each
phase voltage command with a modulation rate different from
5
that in FIG. 4.
FIG. 8 is a diagram illustrating PWM control signals
generated according to individual phase voltage commands
illustrated in FIG. 7.
5 FIG. 9 is a diagram illustrating a common mode voltage
generated by the PWM control signals illustrated in FIG. 8.
FIG. 10 is a diagram illustrating an example of
waveforms in a case where carrier wave phases of respective
phases are shifted from each other by 120° in a carrier
10 wave and each phase voltage command illustrated in FIG. 7.
FIG. 11 is a diagram illustrating PWM control signals
generated by individual phase voltage commands and
individual phase carrier waves illustrated in FIG. 10.
FIG. 12 is a diagram illustrating an example of a
15 common mode voltage waveform generated by the PWM control
signals illustrated in FIG. 11.
FIG. 13 is a diagram illustrating an example of a
harmonic distribution of an electric motor current
according to conventional control when the carrier wave in
20 each phase is the same.
FIG. 14 is a diagram illustrating an example of the
harmonic distribution of the electric motor current
according to the conventional control in a case where the
carrier wave phases of the respective phases are shifted
25 from each other by 120°.
FIG. 15 is a diagram illustrating an example of the
common mode voltage waveform according to the conventional
control in a case where the carrier wave phases of the
respective phases are shifted from each other by 120°.
30 FIG. 16 is a diagram used for explanation of a concept
of a control method according to the first embodiment.
FIG. 17 is a diagram illustrating an exemplary
configuration of a carrier wave generation unit according
6
to the first embodiment.
FIG. 18 is a diagram illustrating an exemplary
configuration of a carrier wave generation unit according
to a modification of the first embodiment.
5 FIG. 19 is a block diagram illustrating an example of
a hardware configuration that implements functions of the
inverter control device according to the first embodiment.
FIG. 20 is a block diagram illustrating another
example of the hardware configuration that implements the
10 functions of the inverter control device according to the
first embodiment.
FIG. 21 is a diagram illustrating an exemplary
configuration of a carrier wave generation unit according
to a second embodiment.
15 FIG. 22 is a diagram illustrating an exemplary
configuration of a carrier wave generation unit according
to a third embodiment.
FIG. 23 is a diagram illustrating a detailed
configuration of a frequency modulation unit illustrated in
20 FIG. 22.
FIG. 24 is a diagram illustrating an output image of a
frequency modulation amount output from the frequency
modulation unit illustrated in FIG. 23.
25 Description of Embodiments
[0010] Hereinafter, an inverter control device and an
electric motor drive apparatus according to embodiments of
the present disclosure will be described in detail with
reference to the accompanying drawings. Note that,
30 although an electric motor drive apparatus applied to a
railway system will be described as an example in the
following embodiments, it is not intended to exclude
applications to other uses.
7
[0011] First Embodiment.
FIG. 1 is a diagram illustrating an exemplary
configuration of an electric motor drive apparatus 1
including an inverter control device 5 according to a first
5 embodiment. As illustrated in FIG. 1, the electric motor
drive apparatus 1 according to the first embodiment
includes a filter capacitor 3, an inverter 4, and the
inverter control device 5. The inverter 4 is connected to
an electric motor 105. The electric motor 105 is a three10 phase electric motor installed on an electric vehicle.
[0012] DC power supplied from an overhead line 101 is
supplied to the electric motor drive apparatus 1 via a
current collector 102 and a filter reactor 2. There is a
substation (not illustrated) beyond the overhead line 101,
15 and the overhead line 101 serves as an external power
supply for the electric motor drive apparatus 1. Note that
an overhead line voltage that is a voltage of the overhead
line 101 applied to the current collector 102, and each
conversion capacitance of the inverter 4 differ depending
20 on a driving system. The overhead line voltage ranges
approximately from 600 to 3000 [V]. Furthermore, the
conversion capacitances range from several tens to several
hundred kilovolt-amperes [kVA].
[0013] The positive-side terminal P of the electric
25 motor drive apparatus 1 is connected to the filter reactor
2. The negative-side terminal N of the electric motor
drive apparatus 1 is connected to a rail 104 via a wheel
103. As a result, a direct current due to the DC power
supplied from the overhead line 101 flows through the
30 filter reactor 2, the electric motor drive apparatus 1, the
electric motor 105, the wheel 103, and the rail 104, and
then returns to the substation.
[0014] Note that although, in FIG. 1, an aerial
8
electrical line is illustrated as the overhead line 101,
and a pantagraph-like current collector is illustrated as
the current collector 102, the present disclosure is not
limited to this. As the overhead line 101, a third rail
5 used for subways or the like may be used, and accordingly,
a current collector suitable for a third rail may be used
as the current collector 102. Furthermore, although, in
FIG. 1, a case where the overhead line 101 is a DC overhead
line is illustrated, the overhead line 101 may be an AC
10 overhead line. Note that, in a case where the overhead
line 101 is an AC overhead line, a transformer that steps
down the received AC voltage is provided instead of the
filter reactor 2, and a converter that converts the AC
voltage output from the transformer into a DC voltage is
15 provided in a subsequent stage of the transformer.
[0015] Furthermore, although, in FIG. 1, the filter
reactor 2 is illustrated as a component external to the
electric motor drive apparatus 1, the present disclosure is
not limited to this. The filter reactor 2 may be provided
20 in the electric motor drive apparatus 1.
[0016] The filter capacitor 3 is connected between the
positive-side terminal P and the negative-side terminal N
inside the electric motor drive apparatus 1. As a result,
the filter capacitor 3 is connected in parallel to both
25 ends of the inverter 4 on the input side of the inverter 4.
[0017] The filter capacitor 3 smooths the DC voltage
applied. Furthermore, the filter capacitor 3 is connected
to the filter reactor 2 and configures an LC filter circuit
together with the filter reactor 2. This LC filter circuit
30 reduces a surge voltage applied from the side of the
overhead line 101. Furthermore, the LC filter circuit
reduces the magnitude of a ripple component of the current
flowing in the inverter 4. The inverter 4 is a power
9
conversion circuit that supplies power to the electric
motor 105.
[0018] An operation of the inverter 4 is controlled by
the inverter control device 5. The inverter 4 converts the
5 DC voltage of the filter capacitor 3 into an AC voltage
having a given voltage value and a given frequency and
applies the AC voltage to the electric motor 105.
[0019] The inverter control device 5 includes a voltage
command calculation unit 6, a PWM control unit 7, and a
10 carrier wave generation unit 8. Information regarding a
torque command and information regarding an electric motor
frequency are input to the inverter control device 5. The
voltage command calculation unit 6 calculates a voltage
command on the basis of the torque command and the electric
15 motor frequency. The carrier wave generation unit 8
generates a carrier wave on the basis of the electric motor
frequency. The PWM control unit 7 generates a PWM control
signal used to control a switching element of the inverter
4 on the basis of the voltage command and the carrier wave
20 and outputs the PWM control signal to the inverter 4. The
PWM control signal is generated by performing amplitude
comparison between the voltage command and the carrier wave.
A method for generating the PWM control signal will be
described later.
25 [0020] FIG. 2 is a diagram illustrating an exemplary
configuration of a general inverter main circuit. The
inverter main circuit includes semiconductor elements UPI,
VPI, and WPI of an upper arm and semiconductor elements UNI,
VNI, and WNI of a lower arm.
30 [0021] The semiconductor elements UPI and UNI are
connected in series so as to form a U-phase leg. The
semiconductor elements VPI and VNI are connected in series
so as to form a V-phase leg. The semiconductor elements
10
WPI and WNI are connected in series so as to form a W-phase
leg. The U-phase, the V-phase, and the W-phase legs are
connected in parallel to each other to configure a threephase bridge circuit.
5 [0022] FIG. 3 is a diagram illustrating an equivalent
circuit in FIG. 1 used for explaining a leakage current.
In FIG. 3, the electric motor 105 is represented by circuit
symbols of an inductor. Regardless of the type of the
electric motor, in a case where a three-phase motor is
10 driven by a three-phase inverter, a neutral point potential
of the three-phase motor fluctuates. Therefore, as
illustrated in FIG. 3, the equivalent circuit is formed in
which a stray capacitor 34 is connected between a neutral
point potential 32 of the electric motor 105 and a
15 reference potential 31 that is the ground potential. The
neutral point potential 32 includes a high-frequency
component caused by PWM control. Therefore, when a U-phase
voltage 33U, a V-phase voltage 33V, and a W-phase voltage
33W are applied to the electric motor 105, a leakage
20 current 35 flows through the stray capacitor 34.
[0023] Note that the potential difference between the
neutral point potential 32 and the reference potential 31
is referred to as “common mode voltage”. In a case of the
three-phase inverter, the common mode voltage is calculated
25 by (Vu+Vv+Vw)/3, where Vu indicates the U-phase voltage 33U,
Vv indicates the V-phase voltage 33V, and Vw indicates the
W-phase voltage 33W.
[0024] FIG. 4 is a diagram used for explanation of the
method for generating PWM control signals provided to the
30 semiconductor elements of each arm illustrated in FIG. 2.
In FIG. 4, a U-phase voltage command 26U, a V-phase voltage
command 26V, and a W-phase voltage command 26W that are
sine waves and a carrier wave 28 that is a triangular wave
11
are illustrated. The horizontal axis represents the phase
angle, and the vertical axis represents the amplitude value.
A value 1 [Vpu] on the vertical axis is equivalent to a
half of the amplitude of the voltage applied to the
5 inverter 4, in other words, a half of the DC voltage that
is a voltage of the filter capacitor 3.
[0025] FIG. 5 is a diagram illustrating PWM control
signals generated by the individual phase voltage commands
illustrated in FIG. 4. FIG. 5 illustrates a U-phase PWM
10 control signal, a V-phase PWM control signal, and a W-phase
PWM control signal in this order from the top. The
horizontal axis in FIG. 5 represents the phase angle, as in
FIG. 4. In FIG. 5, waveforms of the PWM control signals
when the modulation rate is 0.8 are illustrated. In this
15 specification, the modulation rate is defined as a ratio
between a half of the DC voltage applied to the inverter 4
and the amplitude of an AC phase voltage applied to the
electric motor 105 by the inverter 4. Note that the
definition here is an example, and the modulation rate may
20 be defined in any way.
[0026] The PWM control unit 7 compares the U-phase
voltage command 26U and the carrier wave 28 that is a
triangular wave signal. When the U-phase voltage command
26U is larger than the carrier wave 28, the U-phase PWM
25 control signal becomes “ON”, and when the U-phase voltage
command 26U is equal to or less than the carrier wave 28,
the U-phase PWM control signal becomes “OFF”. In this way,
the U-phase PWM control signal illustrated in the upper
portion in FIG. 5 is generated. Similarly to the U-phase
30 PWM control signal, the V-phase PWM control signal and the
W-phase PWM control signal are generated by respectively
comparing the V-phase voltage command 26V and the W-phase
voltage command 26W with the carrier wave 28. The V-phase
12
PWM control signal and the W-phase PWM control signal
generated at this time are respectively illustrated in the
middle portion and the lower portion in FIG. 5.
[0027] FIG. 6 is a diagram illustrating a common mode
5 voltage generated by the PWM control signals illustrated in
FIG. 5. In FIG. 6, the horizontal axis represents the
phase angle, and the vertical axis represents the amplitude
of the common mode voltage. As illustrated in FIG. 6, a
common mode voltage when the modulation rate is relatively
10 large has a waveform that changes step by step between
levels of ±1 [Vpu] or ±1/3 [Vpu].
[0028] The leakage current flows each time when the
common mode voltage changes. Furthermore, as the change
amount (voltage change rate) of the common mode voltage per
15 unit time increases, the amplitude of the leakage current
increases. Therefore, in order to reduce the leakage
current 35 that flows through the stray capacitor 34,
reduction in the change rate of a common mode is important.
[0029] FIG. 7 is a diagram illustrating an example of
20 each phase voltage command with the modulation rate
different from that in FIG. 4. In FIG. 7, each phase
voltage command when the modulation rate is 0.1 is
illustrated. Distinction between a solid line, a broken
line, and an alternate long and short dash line is the same
25 as that in FIG. 4. That is, the solid line indicates the
U-phase voltage command 26U, the broken line indicates the
V-phase voltage command 26V, and the alternate long and
short dash line indicates the W-phase voltage command 26W.
[0030] FIG. 8 is a diagram illustrating PWM control
30 signals generated by the individual phase voltage commands
illustrated in FIG. 7. In FIG. 8, waveforms of the PWM
control signals when the modulation rate is 0.1 are
illustrated. The order of the PWM control signals is the
13
same as that in FIG. 5, and the U-phase PWM control signal,
the V-phase PWM control signal, and the W-phase PWM control
signal are illustrated in this order from the top.
[0031] When the modulation rate is a value close to zero,
5 as illustrated in FIG. 8, the difference between the PWM
control signals in the respective phases decreases, and the
output of the inverter 4 is mostly in a state of a zero
voltage vector. Here, the state of the zero voltage vector
means a state in which all of the upper arm side elements
10 are turned on or all of the lower arm elements are turned
on.
[0032] FIG. 9 is a diagram illustrating a common mode
voltage generated by the PWM control signals illustrated in
FIG. 8. As illustrated in FIG. 9, when the modulation rate
15 is close to zero, a common mode voltage has a waveform that
goes forth and back between levels of ±1 [Vpu] in a short
time. Therefore, as compared with a case where the
modulation rate is 0.8 that is relatively large, the
voltage change rate increases, and the leakage current 35
20 that flows through the stray capacitor 34 increases.
[0033] FIG. 10 is a diagram illustrating an example of
waveforms in a case where the carrier wave phases of the
respective phases are shifted from each other by 120° in
the carrier wave and each phase voltage command illustrated
25 in FIG. 7. In the example illustrated in FIG. 10, the
phase of a V-phase carrier wave 28V indicated by a broken
line is delayed by 120° with respect to the phase of a Uphase carrier wave 28U indicated by a solid line.
Furthermore, the phase of a W-phase carrier wave 28W
30 indicated by an alternate long and short dash line is
advanced by 120° with respect to the U-phase carrier wave
28U. Note that advancing the phase by 120° is equivalent
to delaying the phase by 240°.
14
[0034] FIG. 11 is a diagram illustrating PWM control
signals generated by the individual phase voltage commands
and individual phase carrier waves illustrated in FIG. 10.
The waveforms illustrated in FIG. 11 indicate that on or
5 off timings of the PWM control signals of the respective
phases are different from each other. Therefore, in a case
where the carrier wave phases of the respective phases are
shifted from each other by 120°, it can be understood that,
even in a case where the modulation rate takes a value
10 close to zero, the zero voltage vector is not caused unlike
FIG. 8.
[0035] FIG. 12 is a diagram illustrating an example of a
common mode voltage waveform generated by the PWM control
signals illustrated in FIG. 11. According to FIG. 12, even
15 in a case where the modulation rate is close to zero, the
common mode voltage has a waveform that goes forth and back
between levels of ±1/3 [Vpu]. Therefore, as compared with
the example in FIG. 9 in which the carrier wave phase of
each phase is the same, the voltage change rate is smaller.
20 Therefore, the leakage current 35 that flows through the
stray capacitor 34 is reduced.
[0036] FIG. 13 is a diagram illustrating an example of a
harmonic distribution of an electric motor current
according to conventional control when the carrier waves of
25 the respective phases are the same. In FIG. 13, the
vertical axis represents the current amplitude. Control
parameters of a waveform in FIG. 13 include a carrier wave
frequency of 800 Hz, a driving frequency of 20 Hz, and a
modulation rate of 0.2. According to FIG. 13, a 20 Hz
30 component of the driving frequency largely appears, and a
2f component (1600 Hz) of the carrier wave frequency
appears although the amplitude thereof is relatively small.
[0037] FIG. 14 is a diagram illustrating an example of
15
the harmonic distribution of the electric motor current
according to the conventional control in a case where the
carrier wave phases of the respective phases are shifted
from each other by 120°. Note that control parameters
5 other than the carrier wave phase are the same as those in
the example in FIG. 13. FIG. 14 shows that a 1f component
(800 Hz) of the carrier wave frequency significantly
increases. As can be understood from this result, in a
case where the carrier wave phases of the respective phases
10 are shifted from each other by 120°, this causes a problem
in that electromagnetic noise emitted from the electric
motor increases.
[0038] In FIG. 12, it has been described that, in a case
where the carrier wave phases of the respective phases are
15 shifted from each other by 120°, the leakage current 35
that flows through the stray capacitor 34 is reduced.
However, the discloser of the present application has found
that, in a case where the carrier wave phases of the
respective phases are shifted from each other by 120°, when
20 a value of the modulation rate is relatively large, an
effect of reducing the leakage current 35 that flows
through the stray capacitor 34 is reduced. Hereinafter,
this point will be described.
[0039] FIG. 15 is a diagram illustrating an example of
25 the common mode voltage waveform according to the
conventional control in a case where the carrier wave
phases of the respective phases are shifted from each other
by 120°. Control parameters other than the carrier wave
phase in the waveform in FIG. 15 include a carrier wave
30 frequency of 800 Hz, a driving frequency of 20 Hz, and a
modulation rate of 0.8. According to FIG. 15, it can be
understood that, even in a state where the carrier wave
phases are shifted by 120°, when the modulation rate is
16
increased, the common mode voltage waveform changes to the
level of ±1 [Vpu], and thus the effect of reducing the
leakage current 35 is reduced.
[0040] FIG. 16 is a diagram used for explanation of a
5 concept of a control method according to the first
embodiment. The horizontal axis represents the modulation
rate, and the vertical axis represents the noise level. As
the speed of the electric motor is larger, the modulation
rate is larger. Therefore, the modulation rate in the
10 horizontal axis may be read as the speed of the electric
motor. The noise level in the vertical axis means a noise
level caused by the leakage current 35. A thick solid line
K1 represents a noise level in a case where there is a
carrier wave phase difference, that is, there is a phase
15 difference between the carrier wave phases of the
respective phases. A thick broken line K2 represents a
noise level in a case where there is no carrier wave phase
difference, that is, a case where there is no phase
difference between the carrier wave phases of the
20 respective phases. Furthermore, a thin broken line K3
drawn in parallel to the horizontal axis represents the
limit value of the noise level. Note that the limit value
is a value that changes according to a car type and a route
of an electric vehicle.
25 [0041] FIG. 16 shows that, in a case where there is no
carrier wave phase difference, a noise level caused by the
leakage current 35 is lowered as the modulation rate
increases. On the other hand, FIG. 16 also shows that, in
a case where there is a carrier wave phase difference, the
30 noise level caused by the leakage current 35 increases as
the modulation rate increases. Therefore, in a range where
the limit value of the noise level can be satisfied without
a carrier wave phase difference, it can be said that it is
17
desirable to select a conventional modulation method with
no carrier wave phase difference from the viewpoint of
noise.
[0042] Based on the matters described above, in the
5 inverter control device 5 according to the first embodiment,
the carrier wave generation unit 8 is configured as in FIG.
17. FIG. 17 is a diagram illustrating an exemplary
configuration of the carrier wave generation unit 8
according to the first embodiment. As illustrated in FIG.
10 17, the carrier wave generation unit 8 according to the
first embodiment includes a phase calculation unit 81 and a
carrier wave output unit 82.
[0043] The phase calculation unit 81 includes an
integrator 811, a phase difference calculation unit 812, a
15 subtractor 813, and an adder 814. The integrator 811
calculates a first carrier wave phase θcu on the basis of a
carrier wave frequency command fc. The phase difference
calculation unit 812 calculates a phase difference Δθc on
the basis of the electric motor frequency. The subtractor
20 813 calculates a second carrier wave phase θcv by
subtracting the phase difference Δθc from the first carrier
wave phase θcu. The adder 814 calculates a third carrier
wave phase θcw by adding the phase difference Δθc to the
first carrier wave phase θcu. Note that, in FIG. 17, an
25 input signal of the phase difference calculation unit 812
is assumed as the electric motor frequency. However, the
present disclosure is not limited to this. Instead of the
electric motor frequency, the modulation rate or the speed
information on the electric vehicle may be used.
30 Furthermore, the phase difference calculation unit 812 may
have a configuration that outputs the phase difference Δθc
according to a reference table or a configuration that
outputs the phase difference Δθc through function
18
calculation.
[0044] In the processing in FIG. 17, the phase
difference Δθc means a shift width of the carrier wave
phase. As described with reference to FIG. 16, the shift
5 width of the carrier wave phase between the respective
phases causes a noise problem in relation to the modulation
rate. Therefore, it is desirable to set the shift width of
the carrier wave phase to the minimum necessary.
Furthermore, a configuration can be considered in which an
10 operation mode is provided and the shift width of the
carrier wave phase is controlled by switching the operation
mode. However, there is a concern that the configuration
that switches the operation mode causes a torque shock.
Therefore, in the first embodiment, a configuration is used
15 in which the shift width of the carrier wave phase is
continuously changed and a configuration is used in which
the shift width of the carrier wave phase is gradually
decreased as the electric motor frequency increases.
[0045] The first carrier wave phase θcu, the second
20 carrier wave phase θcv, and the third carrier wave phase θcw
calculated by the phase calculation unit 81 are input to
the carrier wave output unit 82. The carrier wave output
unit 82 generates a U-phase carrier wave cu using the first
carrier wave phase θcu and outputs the U-phase carrier wave
25 cu. The carrier wave output unit 82 generates a V-phase
carrier wave cv using the second carrier wave phase θcv and
outputs the V-phase carrier wave cv. The carrier wave
output unit 82 generates a W-phase carrier wave cw using
the third carrier wave phase θcw and outputs the W-phase
30 carrier wave cw.
[0046] As described above, the phase calculation unit 81
calculates the first carrier wave phase θcu, the second
carrier wave phase θcv, and the third carrier wave phase θcw
19
on the basis of the carrier wave frequency command fc and
the electric motor frequency. Furthermore, the carrier
wave output unit 82 outputs the U-phase carrier wave cu,
the V-phase carrier wave cv, and the W-phase carrier wave
5 cw that are three-phase carrier waves on the basis of the
first carrier wave phase θcu, the second carrier wave phase
θcv, and the third carrier wave phase θcw. According to the
carrier wave generation unit 8 configured in this way, both
of common mode noise reduction at a low speed range and
10 noise reduction in middle to high speed ranges can be
achieved. Furthermore, control that does not cause a
torque shock in mode transition can be achieved.
[0047] Note that, in FIG. 17, the configuration is such
that the phase difference between the first carrier wave
15 phase θcu and the second carrier wave phase θcv is equal to
the phase difference between the first carrier wave phase
θcu and the third carrier wave phase θcw. However, these
phase differences may be different. What is important is
that the first carrier wave phase θcu, the second carrier
20 wave phase θcv, and the third carrier wave phase θcw have
phase differences from each other, and the phase difference
changes according to the change in the electric motor
frequency. If this point is secured, an effect of the
first embodiment described here can be obtained.
25 [0048] Furthermore, the carrier wave generation unit 8
illustrated in FIG. 17 may be configured as illustrated in
FIG. 18. FIG. 18 is a diagram illustrating an exemplary
configuration of a carrier wave generation unit 8A
according to a modification of the first embodiment. In
30 the carrier wave generation unit 8A illustrated in FIG. 18,
the phase calculation unit 81 in the configuration of the
carrier wave generation unit 8 illustrated in FIG. 17 is
replaced with a phase calculation unit 81A. In the phase
20
calculation unit 81A, integrators 815 and 816 are added to
the configuration of the phase calculation unit 81
illustrated in FIG. 17. Other components are equivalent to
the components of the phase calculation unit 81 illustrated
5 in FIG. 17, and the equivalent components are denoted with
the same reference character, and overlapped description
will be omitted.
[0049] In FIG. 18, a configuration is used in which the
input carrier wave frequency command fc is branched into
10 three carrier wave frequency commands of the respective
phases, that is, a U-phase carrier wave frequency command
fcu, a V-phase carrier wave frequency command fcv, and a Wphase carrier wave frequency command fcw in the phase
calculation unit 81A and input to individual integrators
15 provided for the respective phases. Because signals input
to the respective integrators 811, 815, and 816 are the
same, an operation equivalent to FIG. 17 is performed.
[0050] As described above, the inverter control device
according to the first embodiment includes the carrier wave
20 generation unit that generates the three-phase carrier
waves, and the carrier wave generation unit calculates the
first to the third carrier wave phases on the basis of the
carrier wave frequency command and the electric motor
frequency. The first to the third carrier wave phases have
25 the phase differences from each other, and the phase
difference continuously changes according to the change in
the electric motor frequency. As a result, the common mode
voltage generated by the PWM control signals can be reduced.
As a result, the leakage current that may flow through the
30 stray capacitor can be reduced; therefore, it is possible
to reduce leakage noise without additionally providing a
filter component.
[0051] Note that it is desirable that the second and the
21
third carrier wave phases have the phase differences with
respect to the first carrier wave phase that are equal in
magnitude but have opposite signs. In this way, the effect
of reducing the common mode noise can be enhanced.
5 [0052] Furthermore, when the electric motor frequency is
zero, it is desirable that the phase difference between the
first to the third carrier wave phases be 120°. In this
way, the effect of reducing the common mode noise can be
further enhanced.
10 [0053] Next, a hardware configuration for implementing
functions of the inverter control device 5 according to the
first embodiment will be described with reference to the
drawings in FIGs. 19 and 20. FIG. 19 is a block diagram
illustrating an example of the hardware configuration that
15 implements the functions of the inverter control device 5
according to the first embodiment. FIG. 20 is a block
diagram illustrating another example of the hardware
configuration that implements the functions of the inverter
control device 5 according to the first embodiment.
20 [0054] In a case where some or all of the functions of
the inverter control device 5 according to the first
embodiment are implemented, as illustrated in FIG. 20, a
configuration can be used that includes a processor 200
that performs calculations, a memory 202 that saves a
25 program read by the processor 200, and an interface 204
that inputs and outputs signals.
[0055] The processor 200 may be calculation means such
as a calculation device, a microprocessor, a microcomputer,
a central processing unit (CPU), or a digital signal
30 processor (DSP). Furthermore, as the memory 202, a
nonvolatile or a volatile semiconductor memory such as a
random access memory (RAM), a read only memory (ROM), a
flash memory, an erasable programmable ROM (EPROM), or an
22
electrically EPROM (EEPROM) (registered trademark), a
magnetic disk, a flexible disk, an optical disk, a compact
disk, a mini disk, or a digital versatile disc (DVD) can be
exemplified.
5 [0056] The memory 202 stores a program that executes the
functions of the inverter control device 5 according to the
first embodiment. The processor 200 can execute the above
processing by receiving needed information via the
interface 204, executing the program stored in the memory
10 202 by the processor 200, and referring to a table stored
in the memory 202 by the processor 200. A calculation
result by the processor 200 can be stored in the memory 202.
[0057] Furthermore, in a case where some of the
functions of the inverter control device 5 according to the
15 first embodiment are implemented, processing circuitry 203
illustrated in FIG. 24 can be used. The processing
circuitry 203 corresponds to a single circuit, a composite
circuit, an application specific integrated circuit (ASIC),
a field-programmable gate array (FPGA), or a combination
20 thereof. Information input to the processing circuitry 203
and information output from the processing circuitry 203
can be obtained via the interface 204.
[0058] Note that part of the processing of the inverter
control device 5 may be executed by the processing
25 circuitry 203, and processing that is not executed by the
processing circuitry 203 may be executed by the processor
200 and the memory 202.
[0059] Second Embodiment.
FIG. 21 is a diagram illustrating an exemplary
30 configuration of a carrier wave generation unit 8B
according to a second embodiment. In the carrier wave
generation unit 8B illustrated in FIG. 21, a frequency
modulation unit 83 and an adder 84 are provided in a
23
preceding stage of the phase calculation unit 81 in the
configuration of the carrier wave generation unit 8
illustrated in FIG. 17. The frequency modulation unit 83
is provided so as to reduce noise.
5 [0060] The frequency modulation unit 83 includes a
random number generator 831 and an amplifier 832. The
adder 84 has a configuration into which a basic carrier
wave frequency command fc0 and an output of the frequency
modulation unit 83 are input. Other components are
10 equivalent to the components of the phase calculation unit
81 illustrated in FIG. 17, and the equivalent components
are denoted with the same reference character, and
overlapped description will be omitted.
[0061] In FIG. 21, in the frequency modulation unit 83,
15 the amplifier 832 gives a gain to an output of the random
number generator 831. An output of the amplifier 832 is
input to the adder 84 as a frequency modulation amount Δfc.
The frequency modulation unit 83 is a configuration unit
that performs so-called random modulation and calculates
20 the frequency modulation amount Δfc on the basis of the
output of the random number generator 831. The adder 84
adds the carrier wave frequency command fc and the
frequency modulation amount Δfc and outputs the addition
result to the phase calculation unit 81 as a new carrier
25 wave frequency command fc1.
[0062] According to the carrier wave generation unit 8B
illustrated in FIG. 21, the frequency modulation amount Δfc
is generated on the basis of a random number generated by
the random number generator 831. Then, the generated
30 frequency modulation amount Δfc is added to the carrier
wave frequency command fc common to each phase. Therefore,
even in a case where the phase difference is provided
between the respective carrier waves, all the carrier waves
24
are frequency-modulated on the basis of a random number
generated from only one seed. As a result, while the
carrier wave of each phase is frequency modulated, a state
is maintained where the waveforms maintain a phase
5 difference therebetween. Therefore, it is possible to
prevent deterioration in the effect of reducing the common
mode noise.
[0063] As described above, according to the inverter
control device according to the second embodiment, the
10 carrier wave generation unit calculates the frequency
modulation amount on the basis of the output of the random
number generator and adds the calculated frequency
modulation amount to all the carrier wave frequency
commands to be input to the phase calculation unit. As a
15 result, it is possible to reduce noise, while preventing
the deterioration in the effect of reducing the common mode
noise
[0064] Third Embodiment.
FIG. 22 is a diagram illustrating an exemplary
20 configuration of a carrier wave generation unit 8C
according to a third embodiment. In the carrier wave
generation unit 8C illustrated in FIG. 22, a frequency
modulation unit 85 is provided in a preceding stage of the
phase calculation unit 81A in the configuration of the
25 carrier wave generation unit 8A illustrated in FIG. 18 and
the phase calculation unit 81A in the configuration of the
carrier wave generation unit 8A illustrated in FIG. 18 is
replaced with a phase calculation unit 81B. In the phase
calculation unit 81B illustrated in FIG. 22, adders 817a,
30 817b, and 817c are added in preceding stages of the
respective integrators 811, 815, and 816 in the
configuration of the phase calculation unit 81A illustrated
in FIG. 18. The frequency modulation unit 85 is provided
25
so as to reduce noise more effectively than the frequency
modulation unit 83 according to the second embodiment
illustrated in FIG. 21. Other components are equivalent to
the components of the carrier wave generation unit 8A
5 illustrated in FIG. 18, the equivalent components are
denoted with the same reference character, and overlapped
description will be omitted.
[0065] FIG. 23 is a diagram illustrating a detailed
configuration of the frequency modulation unit 85
10 illustrated in FIG. 22. The frequency modulation unit 85
includes a list 851, an order control unit 852, and
switching units 853a, 853b, and 853c. In the list 851,
frequency values of a plurality of numbers of pieces of
data is stored. More specifically, the list 851 stores
15 frequency values fi (f_0, f_1,..., and f_n) of n+1 points
that have a value equal to or more than -fL and equal to or
less than +fH and are optionally selected. The number n+1
is the number of pieces of data. Reference characters n,
fL, and fH indicate given setting values. Preferably, fL=fH.
20 Furthermore, it is desirable that the frequency values fi
of the n+1 points are at equal intervals, that is, all
differences between the adjacent frequency values fi are
equal to each other when the frequency values fi are
arranged in ascending or descending order. Furthermore,
25 FIG. 23 shows that n, fL, and fH are applied from outside
of the frequency modulation unit 85. However, a
configuration can be used in which n, fL, and fH are set in
the frequency modulation unit 85.
[0066] The order control unit 852 controls the switching
30 units 853a, 853b, and 853c and randomly selects one element
from among elements stored in the list 851 without
overlapping so as to output the selected elements as a
first frequency modulation amount Δfcu, a second frequency
26
modulation amount Δfcv, and a third frequency modulation
amount Δfcw. Furthermore, after all the elements in the
list 851 have been selected, the elements in the list are
selected in a random order different from the previous
5 order, and this selection operation is repeated.
[0067] The frequency modulation unit 85 outputs the
elements selected one by one in a first random order
without overlapping from the elements stored in the list
851 as the first frequency modulation amount Δfcu, and the
10 first frequency modulation amount Δfcu is input to the
adder 817a. Furthermore, the frequency modulation unit 85
outputs the elements selected one by one in a second random
order without overlapping from the elements stored in the
list 851 as the second frequency modulation amount Δfcv,
15 and the second frequency modulation amount Δfcv is input to
the adder 817b. Moreover, the frequency modulation unit 85
outputs the elements selected one by one in a third random
order without overlapping from the elements stored in the
list 851 as the third frequency modulation amount Δfcw, and
20 the third frequency modulation amount Δfcw is input to the
adder 817c.
[0068] In FIG. 22, the adder 817a adds the carrier wave
frequency command fc and the first frequency modulation
amount Δfcu, and the addition result is input to the
25 integrator 811 as the U-phase carrier wave frequency
command fcu. The adder 817b adds the carrier wave frequency
command fc and the second frequency modulation amount Δfcv,
and the addition result is input to the integrator 815 as
the V-phase carrier wave frequency command fcv. The adder
30 817c adds the carrier wave frequency command fc and the
third frequency modulation amount Δfcw, and the addition
result is input to the integrator 816 as the W-phase
carrier wave frequency command fcw. The subsequent
27
operation is as described above, and description here will
be omitted.
[0069] FIG. 24 is a diagram illustrating an output image
of the frequency modulation amount Δfc output from the
5 frequency modulation unit 85 illustrated in FIG. 23. The
frequency modulation amount Δfc represents any one of the
first frequency modulation amount Δfcu, the second
frequency modulation amount Δfcv, and the third frequency
modulation amount Δfcw. In the upper portion in FIG. 24,
10 the frequency modulation amount Δfc output from the
frequency modulation unit 85 is represented as a sequence
{fxi}={fx0, fx1, fx2,..., fxn} (i=0, 1, 2,..., n).
Furthermore, in the lower portion in FIG. 24, a time when
each element of the sequence {fxi} is output is illustrated.
15 An output time of each element may be rephrased as a time
needed to switch the output. According to FIG. 24, an
output time of the element fxi is a reciprocal of the
element fxi. That is, a time from when an i-th element is
selected to when the i-th element is switched to an i+1-th
20 element is set as a reciprocal of the i-th element. In the
list 851, when it is assumed that a time from when a first
element is output to when a final element is output be Tcyc,
the time Tcyc can be expressed by the following formula (1).
[0070] [Formula 1]
25 ∙∙∙ (1)
[0071] Although the frequency modulation amount Δfc
differs for each phase, only the order of the selection of
the elements from the list 851 is different. Therefore,
even if the elements stored in the list 851 are selected in
30 any order, the time Tcyc needed until all the elements in
the list 851 are selected is always equal. That is,
although the carrier wave frequencies of the respective
28
phases are modulated with different random numbers, the
carrier wave phase difference is returned to the setting
value for each time Tcyc. Therefore, by using the frequency
modulation unit 85 according to the third embodiment, it is
5 possible to achieve both of the reduction of the common
mode noise and improvement in listening feeling.
Specifically, as the number of pieces of data n+1 is
smaller and a codomain of the frequency value stored in the
list 851 is narrower, the effect of reducing the common
10 mode noise is prioritized. Conversely, as the number of
pieces of data n+1 is larger and the codomain of the
frequency values stored in the list 851 is wider, the
improvement in the listening feeling is prioritized.
[0072] As described above, according to the inverter
15 control device according to the third embodiment, the
carrier wave generation unit includes the frequency
modulation unit that outputs the first frequency modulation
amount Δfcu, the second frequency modulation amount Δfcv,
and the third frequency modulation amount Δfcw. The first
20 frequency modulation amount Δfcu is an element selected one
by one in the first random order without overlapping from
elements stored in a list of a first phase. Furthermore,
the second frequency modulation amount Δfcv is an element
selected one by one in the second random order without
25 overlapping from elements stored in a list of a second
phase. The third frequency modulation amount Δfcw is an
element stored one by one in the third random order without
overlapping from elements stored in a list of a third phase.
These first frequency modulation amount Δfcu, the second
30 frequency modulation amount Δfcv, and the third frequency
modulation amount Δfcw are added to the carrier wave
frequency command on a one-to-one basis. Furthermore, when
the first frequency modulation amount Δfcu, the second
29
frequency modulation amount Δfcv, and the third frequency
modulation amount Δfcw are selected from the lists of the
respective phases and output, the time from when the i-th
element is selected to when the i-th element is switched to
5 the i+1-th element is the reciprocal of the i-th element.
These make it possible to achieve both of the reduction of
the common mode noise and the improvement in the listening
feeling.
[0073] Note that the number of pieces of data in the
10 list of each phase may be changed according to the electric
motor frequency. Furthermore, when a minimum value of the
elements stored in the list of each phase is set as a first
value and a maximum value is set as a second value, at
least one of the first and second values may be changed
15 according to the electric motor frequency. By changing the
number of pieces of data, the first value, or the second
value according to the electric motor frequency, it is
possible to perform control according to a priority between
the effect of reducing the common mode noise and the
20 improvement in the listening feeling.
[0074] Furthermore, it is desirable that the first value
and the second value in the list of each phase have equal
absolute values but have different signs and the respective
elements in the list have values at equal intervals. With
25 this setting, it is possible to perform the control
according to the priority between the reduction of the
common mode noise and the improvement in the listening
feeling without changing a total amount of a switching loss
caused by the inverter 4.
30 [0075] The configurations indicated in the above
embodiments indicate examples and can be combined with
other known technology, and the embodiments can be combined
with each other, and the configurations indicated in the
30
embodiments can be partially omitted or changed without
departing from the scope.
[0076] For example, the inverter control device has been
described as the device included in the electric motor
5 drive apparatus. However, the inverter control device is
not limited to this. It is sufficient that the inverter
control device be electrically connected to the inverter,
and the inverter control device may be configured as a
device external to the electric motor drive apparatus.
10
Reference Signs List
[0077] 1 electric motor drive apparatus; 2 filter
reactor; 3 filter capacitor; 4 inverter; 5 inverter
control device; 6 voltage command calculation unit; 7 PWM
15 control unit; 8, 8A, 8B, 8C carrier wave generation unit;
26U U-phase voltage command; 26V V-phase voltage command;
26W W-phase voltage command; 28 carrier wave; 28U U-phase
carrier wave; 28V V-phase carrier wave; 28W W-phase
carrier wave; 31 reference potential; 32 neutral point
20 potential; 33U U-phase voltage; 33V V-phase voltage; 33W
W-phase voltage; 34 stray capacitor; 35 leakage current;
81, 81A, 81B phase calculation unit; 82 carrier wave
output unit; 83, 85 frequency modulation unit; 84, 814,
817a, 817b, 817c adder; 101 overhead line; 102 current
25 collector; 103 wheel; 104 rail; 105 electric motor; 200
processor; 202 memory; 203 processing circuit; 204
interface; 811, 815, 816 integrator; 812 phase difference
calculation unit; 813 subtractor; 831 random number
generator; 832 amplifier; 851 list; 852 order control
30 unit; 853a, 853b, 853c switching unit; N negative-side
terminal; P positive-side terminal; UNI, UPI, VNI, VPI,
WNI, WPI semiconductor element.
WE CLAIM:
1. An inverter control device that controls an inverter
that drives a three-phase electric motor through pulse
width modulation, the inverter control device comprising:
5 a carrier wave generation unit to generate three-phase
carrier waves; and
a pulse width modulation control unit to control a
switching state of the inverter by comparing the carrier
wave with a modulated wave, wherein
10 the carrier wave generation unit includes
a phase calculation unit to calculate first to third
carrier wave phases on the basis of a carrier wave
frequency command and an electric motor frequency, and
a carrier wave output unit to output the three-phase
15 carrier waves on the basis of the first to the third
carrier wave phases,
the first to the third carrier wave phases have phase
differences from each other, and
the phase difference continuously changes according to
20 a change in the electric motor frequency.
2. The inverter control device according to claim 1,
wherein
the second and the third carrier wave phases have
25 phase differences with respect to the first carrier wave
phase that are equal in magnitude but have opposite signs.
3. The inverter control device according to claim 2,
wherein
30 the phase difference when the electric motor frequency
is zero is 120°.
4. The inverter control device according to any one of
32
claims 1 to 3, wherein
the carrier wave generation unit includes a frequency
modulation unit to calculate a frequency modulation amount
on the basis of an output of a random number generator and
5 adds the frequency modulation amount to all the carrier
wave frequency commands to be input to the phase
calculation unit.
5. The inverter control device according to any one of
10 claims 1 to 3, wherein
the carrier wave generation unit includes a frequency
modulation unit to calculate first to third frequency
modulation amounts,
the frequency modulation unit includes a list to store
15 frequency values of a plurality of numbers of pieces of
data,
each element stored in the list has a value equal to
or more than a first value and equal to or less than a
second value,
20 an element selected one by one in a first random order
without overlapping from the elements stored in the list is
output as the first frequency modulation amount,
an element selected one by one in a second random
order without overlapping from the elements stored in the
25 list is output as the second frequency modulation amount,
an element selected one by one in a third random order
without overlapping from the elements stored in the list is
output as the third frequency modulation amount,
when the number of pieces of data is set as n+1 and i
30 is set as an integer equal to or more than one and equal to
or less than n,
a time from when an i-th element is selected to when
the i-th element is switched to an i+1-th element is a
33
reciprocal of the i-th element, and
the first to the third frequency modulation amounts
are added to the carrier wave frequency command on a oneto-one basis.
5
6. The inverter control device according to claim 5,
wherein
the number of pieces of data in the list is changed
according to the electric motor frequency.
10
7. The inverter control device according to claim 5 or 6,
wherein
at least one of the first value or the second value is
changed according to the electric motor frequency.
15
8. The inverter control device according to any one of
claims 5 to 7, wherein
the first value and the second value in the list have
equal absolute values but have different signs, and
20 respective elements in the list have values at equal
intervals.
9. An electric motor drive apparatus comprising:
the inverter control device according to any one of
25 claims 1 to 8; and
an inverter controlled by the inverter control device.
| Section | Controller | Decision Date |
|---|---|---|
| # | Name | Date |
|---|---|---|
| 1 | 202227041351-IntimationOfGrant26-02-2024.pdf | 2024-02-26 |
| 1 | 202227041351.pdf | 2022-07-19 |
| 2 | 202227041351-PatentCertificate26-02-2024.pdf | 2024-02-26 |
| 2 | 202227041351-TRANSLATIOIN OF PRIOIRTY DOCUMENTS ETC. [19-07-2022(online)].pdf | 2022-07-19 |
| 3 | 202227041351-STATEMENT OF UNDERTAKING (FORM 3) [19-07-2022(online)].pdf | 2022-07-19 |
| 3 | 202227041351-ABSTRACT [06-04-2023(online)].pdf | 2023-04-06 |
| 4 | 202227041351-REQUEST FOR EXAMINATION (FORM-18) [19-07-2022(online)].pdf | 2022-07-19 |
| 4 | 202227041351-CLAIMS [06-04-2023(online)].pdf | 2023-04-06 |
| 5 | 202227041351-PROOF OF RIGHT [19-07-2022(online)].pdf | 2022-07-19 |
| 5 | 202227041351-COMPLETE SPECIFICATION [06-04-2023(online)].pdf | 2023-04-06 |
| 6 | 202227041351-POWER OF AUTHORITY [19-07-2022(online)].pdf | 2022-07-19 |
| 6 | 202227041351-DRAWING [06-04-2023(online)].pdf | 2023-04-06 |
| 7 | 202227041351-FORM 18 [19-07-2022(online)].pdf | 2022-07-19 |
| 7 | 202227041351-FER_SER_REPLY [06-04-2023(online)].pdf | 2023-04-06 |
| 8 | 202227041351-OTHERS [06-04-2023(online)].pdf | 2023-04-06 |
| 8 | 202227041351-FORM 1 [19-07-2022(online)].pdf | 2022-07-19 |
| 9 | 202227041351-FIGURE OF ABSTRACT [19-07-2022(online)].jpg | 2022-07-19 |
| 9 | 202227041351-FORM 3 [01-03-2023(online)].pdf | 2023-03-01 |
| 10 | 202227041351-DRAWINGS [19-07-2022(online)].pdf | 2022-07-19 |
| 10 | 202227041351-FORM 3 [21-02-2023(online)].pdf | 2023-02-21 |
| 11 | 202227041351-DECLARATION OF INVENTORSHIP (FORM 5) [19-07-2022(online)].pdf | 2022-07-19 |
| 11 | 202227041351-Information under section 8(2) [21-02-2023(online)].pdf | 2023-02-21 |
| 12 | 202227041351-COMPLETE SPECIFICATION [19-07-2022(online)].pdf | 2022-07-19 |
| 12 | 202227041351-FORM 3 [02-01-2023(online)].pdf | 2023-01-02 |
| 13 | 202227041351-FER.pdf | 2022-10-20 |
| 13 | 202227041351-MARKED COPIES OF AMENDEMENTS [22-07-2022(online)].pdf | 2022-07-22 |
| 14 | 202227041351-FORM 13 [22-07-2022(online)].pdf | 2022-07-22 |
| 14 | Abstract1.jpg | 2022-09-20 |
| 15 | 202227041351-AMMENDED DOCUMENTS [22-07-2022(online)].pdf | 2022-07-22 |
| 16 | 202227041351-FORM 13 [22-07-2022(online)].pdf | 2022-07-22 |
| 16 | Abstract1.jpg | 2022-09-20 |
| 17 | 202227041351-MARKED COPIES OF AMENDEMENTS [22-07-2022(online)].pdf | 2022-07-22 |
| 17 | 202227041351-FER.pdf | 2022-10-20 |
| 18 | 202227041351-FORM 3 [02-01-2023(online)].pdf | 2023-01-02 |
| 18 | 202227041351-COMPLETE SPECIFICATION [19-07-2022(online)].pdf | 2022-07-19 |
| 19 | 202227041351-DECLARATION OF INVENTORSHIP (FORM 5) [19-07-2022(online)].pdf | 2022-07-19 |
| 19 | 202227041351-Information under section 8(2) [21-02-2023(online)].pdf | 2023-02-21 |
| 20 | 202227041351-DRAWINGS [19-07-2022(online)].pdf | 2022-07-19 |
| 20 | 202227041351-FORM 3 [21-02-2023(online)].pdf | 2023-02-21 |
| 21 | 202227041351-FIGURE OF ABSTRACT [19-07-2022(online)].jpg | 2022-07-19 |
| 21 | 202227041351-FORM 3 [01-03-2023(online)].pdf | 2023-03-01 |
| 22 | 202227041351-FORM 1 [19-07-2022(online)].pdf | 2022-07-19 |
| 22 | 202227041351-OTHERS [06-04-2023(online)].pdf | 2023-04-06 |
| 23 | 202227041351-FER_SER_REPLY [06-04-2023(online)].pdf | 2023-04-06 |
| 23 | 202227041351-FORM 18 [19-07-2022(online)].pdf | 2022-07-19 |
| 24 | 202227041351-DRAWING [06-04-2023(online)].pdf | 2023-04-06 |
| 24 | 202227041351-POWER OF AUTHORITY [19-07-2022(online)].pdf | 2022-07-19 |
| 25 | 202227041351-PROOF OF RIGHT [19-07-2022(online)].pdf | 2022-07-19 |
| 25 | 202227041351-COMPLETE SPECIFICATION [06-04-2023(online)].pdf | 2023-04-06 |
| 26 | 202227041351-REQUEST FOR EXAMINATION (FORM-18) [19-07-2022(online)].pdf | 2022-07-19 |
| 26 | 202227041351-CLAIMS [06-04-2023(online)].pdf | 2023-04-06 |
| 27 | 202227041351-STATEMENT OF UNDERTAKING (FORM 3) [19-07-2022(online)].pdf | 2022-07-19 |
| 27 | 202227041351-ABSTRACT [06-04-2023(online)].pdf | 2023-04-06 |
| 28 | 202227041351-TRANSLATIOIN OF PRIOIRTY DOCUMENTS ETC. [19-07-2022(online)].pdf | 2022-07-19 |
| 28 | 202227041351-PatentCertificate26-02-2024.pdf | 2024-02-26 |
| 29 | 202227041351.pdf | 2022-07-19 |
| 29 | 202227041351-IntimationOfGrant26-02-2024.pdf | 2024-02-26 |
| 1 | 202227041351E_19-10-2022.pdf |