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Load Dump Protection Circuit

Abstract: “LOAD DUMP PROTECTION CIRCUIT” The present invention provides a load dump protection circuit which comprises a voltage divider circuit (308, 309); a voltage regulator circuit connected in series with the voltage divider circuit, the voltage regulator circuit comprising a first diode (306) and a resistor (307). The voltage regulator circuit is configured to receive at least a part of input voltage from the voltage divider circuit. A transistor (305) having a base, an emitter and a collector terminal, the base terminal of the of the transistor (305) is connected to a positive terminal of the first diode (306), wherein the transistor (305) is configured to receive a regulated voltage from the voltage regulator circuit. A resistor (304) having a first end connected to the collector terminal of the transistor (305), and the second end of the resistor (304) is connected to the at least one input terminal; a second diode (303) having a negative terminal connected to the first end of the resistor (304) and to the collector terminal of the transistor (305); a field-effect transistor, FET (301) having a gate, a source and a drain terminal, the source terminal of the FET (301) is connected to a positive terminal of the second diode, the gate terminal of the FET (301) is connected to the negative terminal of the second diode (303) and the drain terminal is connected to one of the output terminal; wherein the voltage regulator circuit is operational when an overvoltage is present, and configured to apply a voltage to the base terminal of transistor (305), sufficient to turn ON the transistor (305), which further causes the second diode (303) and FET (301) to turn OFF. [Fig. 3]

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
06 October 2018
Publication Number
15/2020
Publication Type
INA
Invention Field
ELECTRICAL
Status
Email
ipo@knspartners.com
Parent Application
Patent Number
Legal Status
Grant Date
2022-03-15
Renewal Date

Applicants

MINDA CORPORATION LIMITED
E-5/2, Chakan Industrial Area, Phase-III, M.I.D.C., Nanekarwadi,Tal: Khed, Dist.Pune-410 501, India

Inventors

1. M. Muthu Saravanan
SPARK MINDA TECHNICAL CENTRE MINDA CORPORATION LIMITED E-5/2, Chakan Industrial Area, Phase-III, M.I.D.C., Nanekarwadi,Tal:Khed, Dist.Pune-410 501 India
2. M. Muthu Meenakshi
SPARK MINDA TECHNICAL CENTRE MINDA CORPORATION LIMITED E-5/2, Chakan Industrial Area, Phase-III, M.I.D.C., Nanekarwadi,Tal:Khed, Dist.Pune-410 501 India

Specification

FORM 2
THE PATENTS ACT, 1970
(39 of 1970)
&
THE PATENTS RULES, 2003
PROVISIONAL SPECIFICATION (See section 10, rule 13)
“LOAD DUMP PROTECTION CIRCUIT”
MINDA CORPORATION LIMITED, of E-5/2, Chakan Industrial Area, Phase-III, M.I.D.C., Nanekarwadi,Tal: Khed, Dist.Pune-410 501, India
The following specification particularly describes the invention.

FIELD OF THE INVENTION
The present invention relates to a load dump protection circuit.
BACKGROUND
The information in this section merely provide background information related to the present disclosure and may not constitute prior art(s).
The designers of automotive electronics face many technical challenges during the system design process, including designing methods of protection against a variety of electrical hazards. The three major sources of electrical hazards in these systems are electrostatic discharge (ESD), lightning, and switching loads in power electronics circuits. Overcoming transient surges, e. g. load dump surges that can harm the vehicle’s electronics is one of the biggest challenges of the design process.
In modern automotive designs, all on-board electronics are connected to a battery and an alternator. As indicated in Fig. 1, sudden removal of a large load on a power bus (such as a disconnected battery, discharged battery, a blown power fuse, etc.) makes the output of the alternator unstable. Particularly, during powering or switching of inductive loads, the battery is disconnected, and unwanted spikes or transients are generated that makes alternator output to suddenly jump to 60 volt or higher. In such condition (s), the alternator output requires further conditioning before it can be used to power the vehicle’s other systems. If left uncorrected, these transients would be transmitted along the power line, causing individual electronics and sensors to malfunction or permanently damaging the vehicle’s electronic system, affecting overall reliability.
Currently employed popular solutions consists of a P-channel MOSFET along with a power supply disconnection logic circuitry (Fig. 2). However, these are still not sufficient as these solutions can be deployed vividly for low current applications only. This is because, for high current and high voltage applications, P-channel MOSFETS

are not available due to manufacturing constraints. Another constraint for using P-channel MOSFET in such solutions is its large size and cost.
Therefore, there is need of the art to provide to a load dump protection circuit that may attenuate load dump surges which can harm the vehicle’s electronics in the automotive over-voltage events as discussed above.
SUMMARY OF THE INVENTION
One or more shortcomings of the prior art are overcome, and additional advantages are provided by the present disclosure. Additional features and advantages are realized through the techniques of the present disclosure. Other embodiments and aspects of the disclosure are described in detail herein and are considered a part of the disclosure.
It is to be understood that the aspects and embodiments of the disclosure described above may be used in any combination with each other. Several of the aspects and embodiments may be combined together to form a further embodiment of the disclosure.
In an aspect, the present invention provides a load dump protection circuit (300) comprising at least one input terminal configured to receive an input voltage applied from a voltage source during operation, the protection circuit further comprising at least one output terminal configured to provide an output voltage to a regulator section during operation, the protection circuit comprising: a voltage divider circuit (308, 309); a voltage regulator circuit is connected in series with the voltage divider circuit, the voltage regulator circuit comprising a first diode (306) and a resistor (307), the first diode (306) having a positive terminal and a negative terminal, wherein the voltage regulator circuit is configured to receive at least a part of input voltage from the voltage divider circuit during operation; a transistor (305) having a base terminal, an emitter terminal and a collector terminal, the base terminal of the of the transistor (305) is connected to the positive terminal of the first diode (306), wherein the transistor (305)

is configured to receive a regulated voltage from the voltage regulator circuit for operation of the protection circuit; a resistor (304) having a first end and a second end, the first end of the resistor (304) is connected to the collector terminal of the transistor (305), and the second end of the resistor is connected to the at least one input terminal; a second diode (303) having a positive terminal and a negative terminal, the negative terminal of the second diode (303) is connected to the first end of the resistor (304) and to the collector terminal of the transistor (305); a field-effect transistor, FET (301) having a gate terminal, a source terminal and a drain terminal, the source terminal of the FET (301) is connected to a positive terminal of the second diode, the gate terminal of the FET (301) is connected to the negative terminal of the second diode (303) and the drain terminal is connected to one of the output terminal; wherein the voltage regulator circuit is operational when an overvoltage is present, and configured to apply a voltage to the base terminal of transistor (305), sufficient to turn ON the transistor (305), which further causes the second diode (303) and FET (301) to turn OFF.
In yet another aspect, the present disclosure provides a protection circuit wherein the voltage divider circuit comprising two resistors (308, 309).
In yet another aspect, the present disclosure provides a protection circuit wherein the first diode (306) and the second diode (303) are Zener diode.
In another aspect, the present disclosure provides a protection circuit further comprising a body diode (302) having a negative end and a positive end, wherein the negative end of the diode is connected to the drain terminal of the FET (301) and the positive terminal of the diode (302) is connected to the source terminal of the FET (301).
In yet another aspect, the present disclosure provides a protection circuit wherein the diode (302) is operational when a reverse voltage is present.

BREIF DESCRIPTION OF DRAWINGS
Further aspects and advantages of the present invention will be readily understood from the following detailed description with reference to the accompanying drawings. Reference numerals have been used to refer to identical or similar functionally similar elements. The figures together with a detailed description below, are incorporated in and form part of the specification, and serve to further illustrate the embodiments and explain various principles and advantages, in accordance with the present invention wherein:
Fig. 1 illustrates a load dump condition.
Fig. 2 illustrates a load dump logic according to prior art.
Fig. 3 illustrates a load dump protection circuit according to an aspect of the present invention.
DETAILED DESCRIPTION OF THE INVENTION
Referring now to the drawings, there is shown an illustrative embodiment of the invention a load dump protection circuit. It should be understood that the invention is susceptible to various modifications and alternative forms; specific embodiment thereof has been shown by way of example in the drawings and will be described in detail below. It will be appreciated as the description proceeds that the invention may be realized in different embodiments.
Before describing in detail embodiments, it may be observed that the novelty and inventive step that are in accordance with the present invention reside in construction of the load dump protection circuit, accordingly, the drawings are showing only those specific details that are pertinent to understanding the embodiments of the present invention so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having benefit of the description herein.

The terms “comprises”, “comprising”, or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a setup, device that comprises a list of components does not include only those components but may include other components not expressly listed or inherent to such setup or device. In other words, one or more elements in a system or apparatus proceeded by “comprises… a” does not, without more constraints, preclude the existence of other elements or additional elements in the system or apparatus or device. It could be noted with respect to the present disclosure that the terms like “a load dump protection circuit for buck converter”, “a load dump protection circuit”, “the circuit”, are interchangeably used throughout the description and refer to the same load dump protection circuit.
According to an aspect of the present invention, the load dump protection circuit is provided that effectively protects a high-performance power supply from the automotive over-voltage events. Particularly, an advantage of the present invention is that it may attenuate or remove the load dump surges in the vehicle’s electronic system, appearing in response to the sudden switching off of large users (e. g. inductive loads), thereby avoiding or reducing impending damage due to unwanted spikes or transients. This increases the overall reliability of the vehicle’s electronic system. Moreover, the present circuit presents a compact size with reduced manufacturing cost. The present disclosure achieves these advantage(s) as described below.
As previously discussed, Fig. 1 illustrates a load dump condition wherein during powering or switching of inductive loads, the battery is disconnected, and unwanted spikes or transients are generated. This makes alternator output to suddenly jump to 60 volt or higher. It can take as long as hundreds of milliseconds for the voltage to recover to normal tolerances and leads to product failure.
Fig. 2 illustrates a prior art circuit which consists of a P-channel MOSFET along with a power supply disconnection logic circuitry. As already discussed, such solutions are

still not sufficient as these solutions can be deployed vividly for low current applications only. This is because, for high current and high voltage applications, P-channel MOSFETS are not available due to manufacturing constraints. Another constraint for using P-channel MOSFET in such solutions is its large size and cost.
The present disclosure provides an effective solution to withstand such load dump power surges in automotive applications and thus can be employed for both low as well as high current applications. In the present invention, although, the circuit is described in connection with the load dump power surges in automotive applications, it should be noted that, the circuit can be applied to a variety of generic applications as well.
Fig. 3 illustrates a load dump protection circuit according to an aspect of the present invention. According to an exemplary aspect of the present invention, the load dump protection circuit (300) comprises at least one input terminal and at least one output terminal. The at least one input terminal receives an input voltage (Vin) applied from a voltage source when the circuit is operational. The at least one output terminal provides an output voltage to a regulator section/power module during operation of the circuit (300). The load dump protection circuit (300) further comprises at least four resistors (304, 307, 308, 309), at least two Zener diodes (303, 306), a transistor 305, a N-MOSFET (301) and a body diode (302).
The circuit is now described with reference to these components which are also shown in Fig. 3. As shown in this fig., a voltage regulator circuit is formed by a combination of a first diode (306) having a positive terminal (anode) and a negative terminal (cathode), and a resistor (307). The voltage divider regulator circuit is connected in series with a voltage divider circuit formed by a combination of the resistors (308, 309), wherein the voltage regulator circuit is configured to receive at least a part of input voltage (Vin) from the voltage divider circuit during operation. A transistor (305) having a base terminal, an emitter terminal and a collector terminal, the base terminal of the of the transistor (305) is connected to the positive terminal of the first diode

(306), wherein the transistor (305) is configured to receive a regulated voltage from the voltage regulator circuit for operation of the protection circuit. A resistor (304) having a first end and a second end, the first end of the resistor (304) is connected to the collector terminal of the transistor (305), and the second end of the resistor (304) is connected to the at least one input terminal; a second diode (303) having a positive terminal and a negative terminal, the negative terminal of the second diode (303) is connected to the first end of the resistor (304) and to the collector terminal of the transistor (305); a field-effect transistor, N-MOSFET (301) having a gate terminal, a source terminal and a drain terminal, the source terminal of the N-MOSFET (301) is connected to a positive terminal of the second diode, the gate terminal of the N-MOSFET (301) is connected to the negative terminal of the second diode (303) and the drain terminal is connected to one of the output terminal.
Mode of operation:
In operation, when a load dump condition occurs, the Zener diode (306) is turned ON which further turns ON transistor (305). This causes Zener diode (303) to turn OFF. Finally, the N-MOSFET (301) connected to the Zener diode (303) is also turned OFF. Turning OFF of N-MOSFET (301) disconnects the power supply line, thereby preventing transmission of transients or power surges along the power supply line and protecting the vehicle’s electronic system.
In another scenario, when the battery voltage rises above certain voltage, the Zener diode (306) turns ON which further turns ON transistor (305). This causes Zener diode (303) and N-MOSFET (301) to turn OFF, protecting the vehicle’s electronic system from over voltage.
In a normal operation, if the battery voltage drops down below certain voltage, the Zener diode (306) turns OFF which further turns OFF transistor (305). This causes Zener diode (303) and N-MOSFET (301) to turn ON, providing power supply to the vehicle’s electronic system.

The above operations can be clearly understood from the below table:

Load dump scenario (200V @ B+ node)
(To Power module/regulator section:
OFF / Disconnects) OR
Over voltage scenario Normal operation scenario (< 35V*) (To Power module/regulator section: ON)
B+ (or) V/IN >36V* B+ (or) V/IN <35V*
Zener diode 306 ON Zener diode 306 OFF
Transistor 305 ON Transistor 305 OFF
Zener diode 303 OFF Zener diode 303 ON
N-MOSFET 301 OFF N-MOSFET 301 ON
*this value varies.
Further, in case when a reverse output voltage is present, the body diode (302) is operational.
It should be noted that, the components used in the load dump protection circuit are the preferred components for performing the present disclosure. However, these components should not be construed as limiting examples and can be selected from available group the components.
Accordingly, from the above disclosure, it may be worth noted that the present invention provides a load dump protection circuit that effectively protects the high-performance power supply from the automotive over-voltage events.
The foregoing description of the various embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from

the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein, and instead the claims should be accorded the widest scope consistent with the principles and novel features disclosed herein.
While the invention has been described with reference to a preferred embodiment, it is apparent that variations and modifications will occur without departing the spirit and scope of the invention. It is therefore contemplated that the present disclosure covers any and all modifications, variations or equivalents that fall within the scope of the basic underlying principles disclosed above.

We claim:
1. A load dump protection circuit (300) comprising at least one input terminal configured to receive an input voltage applied from a voltage source during operation, the protection circuit further comprising at least one output terminal configured to provide an output voltage to a regulator section during operation, the protection circuit comprising:
a voltage divider circuit (308, 309);
a voltage regulator circuit is connected in series with the voltage divider circuit, the voltage regulator circuit comprising a first diode (306) and a resistor (307), the first diode (306) having a positive terminal and a negative terminal, wherein the voltage regulator circuit is configured to receive at least a part of input voltage from the voltage divider circuit during operation;
a transistor (305) having a base terminal, an emitter terminal and a collector terminal, the base terminal of the of the transistor (305) is connected to the positive terminal of the first diode (306), wherein the transistor (305) is configured to receive a regulated voltage from the voltage regulator circuit for operation of the protection circuit;
a resistor (304) having a first end and a second end, the first end of the resistor (304) is connected to the collector terminal of the transistor (305), and the second end of the resistor (304) is connected to the at least one input terminal;
a second diode (303) having a positive terminal and a negative terminal, the negative terminal of the second diode (303) is connected to the first end of the resistor (304) and to the collector terminal of the transistor (305);
a field-effect transistor, FET (301) having a gate terminal, a source terminal and a drain terminal, the source terminal of the FET (301) is connected to a positive terminal of the second diode, the gate terminal of the FET (301) is connected to the negative terminal of the second diode (303) and the drain terminal is connected to one of the output terminal;

wherein the voltage regulator circuit is operational when an overvoltage is present, and configured to apply a voltage to the base terminal of transistor (305), sufficient to turn ON the transistor (305), which further causes the second diode (303) and FET (301) to turn OFF.
2. The load dump protection circuit as claimed in claim 1, wherein the voltage divider circuit comprising two resistors (308, 309).
3. The load dump protection circuit as claimed in claim 1, wherein the first diode (306) and the second diode (303) are Zener diode.
4. The load dump protection circuit as claimed in claim 1, further comprising a body diode (302) having a negative end and a positive end, wherein the negative end of the diode is connected to the drain terminal of the FET (301) and the positive terminal of the diode (302) is connected to the source terminal of the FET (301).
5. The protection circuit as claimed in claim 1, wherein the diode (302) is operational when a reverse voltage is present.

Documents

Application Documents

# Name Date
1 201821035630-STATEMENT OF UNDERTAKING (FORM 3) [21-09-2018(online)].pdf 2018-09-21
2 201821035630-PROVISIONAL SPECIFICATION [21-09-2018(online)].pdf 2018-09-21
3 201821035630-POWER OF AUTHORITY [21-09-2018(online)].pdf 2018-09-21
4 201821035630-FORM 1 [21-09-2018(online)].pdf 2018-09-21
5 201821035630-DRAWINGS [21-09-2018(online)].pdf 2018-09-21
6 201821035630-DECLARATION OF INVENTORSHIP (FORM 5) [21-09-2018(online)].pdf 2018-09-21
7 201821035630-PostDating-(20-09-2019)-(E-6-245-2019-MUM).pdf 2019-09-20
8 201821035630-APPLICATIONFORPOSTDATING [20-09-2019(online)].pdf 2019-09-20
9 201821035630-DRAWING [04-10-2019(online)].pdf 2019-10-04
10 201821035630-CORRESPONDENCE-OTHERS [04-10-2019(online)].pdf 2019-10-04
11 201821035630-COMPLETE SPECIFICATION [04-10-2019(online)].pdf 2019-10-04
12 Abstract1.jpg 2019-10-22
13 201821035630-FORM 18 [30-01-2020(online)].pdf 2020-01-30
14 201821035630-FER.pdf 2020-07-14
15 201821035630-PETITION UNDER RULE 137 [07-12-2020(online)].pdf 2020-12-07
16 201821035630-OTHERS [07-12-2020(online)].pdf 2020-12-07
17 201821035630-FER_SER_REPLY [07-12-2020(online)].pdf 2020-12-07
18 201821035630-COMPLETE SPECIFICATION [07-12-2020(online)].pdf 2020-12-07
19 201821035630-ABSTRACT [07-12-2020(online)].pdf 2020-12-07
20 201821035630-PatentCertificate15-03-2022.pdf 2022-03-15
21 201821035630-IntimationOfGrant15-03-2022.pdf 2022-03-15
22 201821035630-FORM 4 [12-07-2022(online)].pdf 2022-07-12

Search Strategy

1 SearchstrategyE_10-07-2020.pdf
2 AmendedSearchstrategyAE_25-02-2021.pdf

ERegister / Renewals

3rd: 13 Jul 2022

From 06/10/2020 - To 06/10/2021

4th: 13 Jul 2022

From 06/10/2021 - To 06/10/2022

5th: 13 Jul 2022

From 06/10/2022 - To 06/10/2023

6th: 11 Aug 2023

From 06/10/2023 - To 06/10/2024

7th: 30 Sep 2024

From 06/10/2024 - To 06/10/2025

8th: 11 Sep 2025

From 06/10/2025 - To 06/10/2026