Loss Correction Encoding Device And Loss Correction Encoding Method
Abstract:
A loss correction encoding device having an improved capability
of loss correction using LDPC-CC is disclosed. In the loss correction
encoding device (120), a rearranging unit (122) rearranges information
data contained in n information packets according to the constraint length
Kmax and the encoding rate (q-l)/q of a check polynomial of the loss
correction code used in a loss correction encoding unit (123).
Specifically, the rearranging unit (122) rearranges the information data in
such a way that continuous Kmax X(q-1) pieces of information data after
rearrangement are contained in different information packets. The
rearranging unit (122) distributes the information data to information
blocks from n information packets (n satisfies formula (I))-
Kmax *(q-l)
Get Free WhatsApp Updates!
Notices, Deadlines & Correspondence
1006, OAZA KADOMA,
KADOMA- SHI
OSAKA
JAPAN 571-8501
Inventors
1. MURAKAMI, YUTAKA
C/O PANASONIC CORPORATI0N ,
1006, OAZA KADOMA,
KADOMA- SHI
OSAKA
JAPAN 571-8501
2. OKAMURA, SHUTAI
C/O PANASONIC CORPORATI0N ,
1006, OAZA KADOMA,
KADOMA- SHI
OSAKA
JAPAN 571-8501
Specification
FORM 2
THE PATENTS ACT, 1970 (39 of 1970)
& THE PATENTS RULES, 2003
COMPLETE SPECIFICATION
[See section. 10, Rule 13]
LOSS CORRECTION ENCODING DEVICE AND LOSS CORRECTION ENCODING METHOD;
PANASONIC CORPORATION, A CORPORATION ORGANIZED AND EXISTING UNDER THE LAWS OF JAPAN, WHOSE ADDRESS IS 1006, OAZA KADOMA, KADOMA-SHI, OSAKA 5718501, JAPAN.
THE FOLLOWING SPECIFICATION
PARTICULARLY DESCRIBES THE INVENTION AND THE MANNER IN WHICH IT IS TO BE PERFORMED.
DESCRIPTION
Technical Field
The present invention relates to an erasure correction coding apparatus and erasure correction coding method that perform erasure correction using, for example, a low-density parity-check convolutional code (LDPC-CC).
Background Art
In applications such as moving image streaming, in a case where an intolerably large number of packets are erased in an application level. an error correction code is used to secure quality. For example. Patent Literature 1 discloses creating redundant packets using a Reed-Solomon code for a plurality of information packets, adding these redundant packets to the information packets and transmitting these packets. By this means. even in a case where packets are erased, it is possible to decode erased packets if these packets are within a range of error correction capability of a Reed-Solomon code.
However, in a case where the number of packets erased exceeds the correction performance of a Reed-Solomon code or where packets are sequentially erased over a relatively long period due to fading in a radio communication path and burst erasure is caused, a case is possible where erasure correction is not performed effectively. In a case of using a Reed-Solomon code, although it is possible to improve correction performance by increasing the block length of a Reed-Solomon code, there is a problem that the amount of calculations in encoding and decoding processing and the circuit scale increase.
Regarding such a problem, attention has been attracted to a low-density parity-check (LDPC) code as an error correction code for packet erasure. An LDPC code refers to a code defined by a very sparse parity check matrix, and enables encoding and decoding processing with feasible time and calculation cost even in a case where a codebook length is the order of several to tens of thousands.
FIG. 1 is a conceptual diagram showing a communication system
utilizing LDPC code erasure correction coding, In FIG. I. the
communication apparatus on the encoding side performs LDPC coding on information packets 1 to 4 to transmit, and generates parity packets a and b. A higher layer processing section outputs coding packets found by adding parity packets to information packets, to a lower layer (physical layer in the example of FIG. 1), and a physical layer processing section in the lower layer converts the coding packets in a form that can be transmitted in the communication channel, and outputs the result to the communication channel. FIG. I shows an example case where the communication channel is a radio communication channel.
The communication apparatus on the decoding side performs reception processing in a physical layer processing section in the lower layer, At this time, presume that bit error occurs in the lower layer. Due to this bit error, a case is possible where packets including corresponding bits are not decoded correctly in the higher layer and where a packet is erased. In the example of FIG. I, a case is shown where information packet 3 is erased. A higher layer processing section decodes erased information packet 3 by applying LDPC decoding processing to a received packet sequence. As LDPC decoding, for example, a sum-product algorithm utilizing belief propagation (BP) (see Non-Patent Literature 1) is used.
A low-density parity-check block (hereinafter "LDPC-BC") code is a block code (e.g. see Non-Patent Literature 1 and Non-Patent Literature 2) and has a very higher flexibility in a code configuration than a Reed-Solomon code, and can support various code lengths and coding rates by using different parity check matrixes. However, a system supporting a plurality of coding lengths and coding rates needs to hold a plurality of parity check matrixes.
In contrast to this kind of LDPC code of block code, LDPC-CC (Low-Density Parity-Check Convolutional Code) allowing encoding and decoding of information sequences of arbitrary length have been investigated (e.g. see Non-Patent Literature 3).
An LDPC-CC is a convolutional code defined by a low-density parity-check matrix. As an example, parity check matrix HT[0,n] of an LDPC-CC in a coding rate of R=l/2 is shown in FIG.2. Here, element h,(m)(t) of HT[0,n] has a value of 0 or 1. All elements other than h1(m)(t) are 0. M represents the LDPC-CC memory length, and n represents the
length of an LDPC-CC codeword. As shown in FIG.2, a characteristic of an LDPC-CC parity check matrix is that it is a parallelogram-shaped matrix in which 1 is placed only in diagonal terms of the matrix and neighboring elements, and in which the bottom-left and top-riglu elements of the matrix are zero.
FIG-3 shows a configuration example of an encoder of an LDPC-CC defined by parity check matrix ,HT[0,n] when h[(0)(t)=l and h2(0)(t)=l. As shown in FIG.3. an LDPC-CC encoder is provided with M+l shift registers and a modulo-2 (exclusive OR) adder. Consequently, a characteristic of an LDPC-CC encoder is that it can be implemented with extremely simple circuitry in comparison with a circuit that performs generator matrix multiplication or an LDPC-BC encoder that performs computation based on backward (forward) substitution. Also, since the encoder shown in FIG.3 is a convolutional code encoder, it is not necessary to divide an information sequence into fixed-length blocks when encoding, and an information sequence of any length can be encoded.
Citation List Patent Literature
[PTL 1]
Japanese Patent Application Laid-Open N0.HEI8-1 86570
Non-Patent Literature
[NPL 1]
D. J. C. Mackay, "Good error-correcting codes based on very sparse
matrices,'' IEEE Trans. Inform. Theory, vol.45, no.2. pp399-431, March
1999.
[NPL 2]
R. G. Gallager, "Low-density parity check codes." IRE Trans. Inform.
Theory, IT-8, pp-21-28, 1962.
[NPL 3]
A. J. Felstorom, and K. Sh. Zigangirov, "Time-Varying Periodic
Convolutional Codes With Low-Density Parity-Check Matrix." IEEE
Transactions on Information Theory, Vol.45, No.6,pp2 1 8 1 -2 1 9 1,
September 1 999.
[NPL 4]
R. D. Gallager. "Low-Density Parity-Check Codes." Cambridge. MA: MIT
Press, 1963.
[NPL 5]
M. P. C. Fossorier, M. Mihaljevic, and H. Imai, "Reduced complexity
iterative decoding of low density parity check codes based on belief
propagation," IEEE Trans. Commun.. vol.47., no.5. pp.673-680. May 1999.
[NPL 6]
J. Chen. A. Dholakia. E. Eleftheriou, M. P. C. Fossorier. and X.-Yu Hu,
"Reduced-complexity decoding of LDPC codes," IEEE Trans. Commun.,
vol.53., no.8, pp. I 288-1 299, Aug. 2005.
Summary of Invention Technical Problem
However, an encoding apparatus and erasure correction coding method using an LDPC-CC for erasure correction, have not been sufficiently investigated.
It is therefore an object of the present invention to provide an erasure correction coding apparatus and erasure correction coding method for improving the erasure correction capability in erasure correction using an LDPC-CC.
Solution to Problem
The erasure correction coding apparatus of the present invention that is applied to a communication apparatus that performs packet communication, employs a configuration having; an arranging section that arranges information data included in a plurality of information packets according to constraint length Kmax and coding rate (q-l)/q of a parity check polynomial of a low-density parity-check convolutional code; and an encoding section that applies erasure correction coding to arranged information data using the parity check polynomial and generates parity packets.
The erasure correction coding method of the present invention
that is applied to packet communication, includes the steps of: arranging
•information data included in a plurality of information packets according
to constraint length Kmax and coding rate (q-I)/q of a parity check
polynomial of a low-density parity-check convolutional code; and
applying erasure correction coding to arranged information data using the parity check polynomial and generating parity packets includes:
Advantageous Effect of Invention
According to the present invention, it is possible to improve the erasure correction capability in erasure correction using an LDPC-CC.
Brief Description of Drawings
FIG. I is a conceptual diagram showing a communication system utilizing LDPC-CC code erasure correction coding;
FJG.2 shows an LDPC-CC parity check matrix;
FIG.3 shows a configuration of an LDPC-CC encoder;
FIG.4 shows the overall configuration of an encoder according to Embodiment 1 of the present invention;
FIG.5 shows a packet sequence generated from a packet generating section according to Embodiment 1;
FIG.6 is a block diagram showing the main configuration oi an erasure correction coding apparatus according to Embodiment I;
FIG.7 shows input or output packets of a dummy data inserting section according to Embodiment I;
FIG.8 is a drawing for explaining an arranging section and arrangement processing according to Embodiment !:
FIG.9 is a drawing for explaining erasure correction coding processing in an erasure correction coding section according to Embodiment 1;
FIG. 10 is a block diagram showing the main configuration of an erasure correction decoding apparatus according to Embodiment 1:
FIG. 11 shows parity check polynomials of an LDPC-CC of a time varying period of 3 and the configuration of parity check matrix H of this LDPC-CC;
FIG.12 is a drawing for explaining an arranging section and arrangement processing according to Embodiment I;
FIG.13 is a drawing for explaining erasure correction coding processing in an erasure correction decoding section according to Embodiment 1 ;
FIG.14 is a drawing for explaining arrangement processing in a
case where the number of information packets is less than number of coding processing unit packets n in an erasure correction coding section;
FIG.15 is a block diagram showing the main configuration of an erasure correction coding apparatus according to Embodiment 2 of the present invention;
FIG. 16 is a block diagram showing the main configuration of an erasure correction decoding apparatus according to Embodiment 2;
FIG. 17 is a drawing for explaining an arranging section and arrangement processing according to Embodiment 2;
FIG. 1 8 is a diagram showing an arranging section and arrangement processing according to Embodiment 2;
F!G. I 9 is a diagram showing parity check matrix H defined using a parity check polynomial represented by equation 4;
FIG.20 is a block diagram showing the main configuration of a server according to Embodiment 3 of the present invention;
FIG.21 is a block diagram showing the main configuration of a terminal apparatus according to Embodiment 3;
FIG.22 shows an example of a communication system according to Embodiment 3;
FIG.23 is a diagram showing sequences between a content server and terminal apparatuses #1 to #n;
FIG.24 is a diagram showing sequences between a content server and terminal apparatuses #1 to #n;
FIG.25 shows an example of the configuration of an LDPC-CC parity check matrix of a time varying period of 4;
FIG.26A shows parity check polynomials of an LDPC-CC of a time varying period of 3 and the configuration of parity check matrix H of this LDPC-CC;
FJG.26B shows the belief propagation relationship of terms relating to X(D) of "check equation #1" to "check equation #3" in FIG.26A:
FIG.26C shows the belief propagation relationship of terms relating to X(D) of "check equation #1" to "check equation #6";
F1G.27 shows a parity check matrix of a (7, 5) convolutiona) code;
FIG.28 shows an example of the configuration of parity check matrix H about an LDPC-CC of a coding rate of 2/3 and a time varying period of 2;
FIG.29 shows an example of the configuration of an LDPC-CC parity check matrix of a coding rate of 2/3 and a time varying period of m;
FIG.3 0 shows an example of the configuration of an LDPC-CC parity check matrix of a coding rate of (n-1 )/n and a time varying period of m:
FIG.31 shows an example of the configuration of an LDPC-CC encoding section;
FIG.32 is a conceptual diagram showing a communication system utilizing LDPC code erasure correction coding;
FIG.33 shows the overall configuration of a communication system shown in FIG.32:
F1G.34A shows a specific configuration of an erasure correction coding related processing section shown in FIG,32;
FIG.34B shows another specific configuration of an erasure correction coding related processing section shown in FIG.32;
FIG.35 shows a specific configuration of an erasure correction decoding related processing section shown in FIG.32;
FIG.36 shows a configuration example of an erasure correction encoder that can change the erasure correction code coding rate according to communication quality;
FIG.37 showing the overall configuration of a communication system according to Embodiment 4 of the present invention;
F1G.38A shows a specific configuration of an erasure correction coding related processing section according to Embodiment 4:
FIG.38B shows another specific configuration of an erasure correction coding related processing section according to Embodiment 4;
FIG.39 shows a specific configuration of an erasure correction decoding related processing section according to Embodiment 4:
FIG.40 shows relationships between the limit performance of bit error rates in coding rates of 1/2, 2/3, 3/4, 4/5 and 5/6 and erasure rates;
FIG.41 shows an example of relationships between packet sizes and usable coding rates for an erasure correction code;
FIG.42 shows another example of relationships between packet sizes and usable coding rates for an erasure correction code:
FIG.43 shows an another example of relationships between packet sizes and usable coding rates for an erasure correction code;
FIG.44 shows another example of relationships between packet
sizes and usable coding rates for an erasure correction code;
FIG.45 shows an example of relationships between packet sizes and usable block sizes;
FIG.46 shows another example of relationships between packet sizes and usable block sizes:
FIG.47 shows another example of relationships between packet sizes and usable block sizes;
FIG.48 shows another example of relationships between packet sizes and usable block sizes;
FIG.49 is a drawing for explaining a packet generating method (for a packet size of 64 bits), according to Embodiment 5 of the present invention;
FIG.50 is a drawing for explaining a packet generating method (for a packet size of 512 bits), according to Embodiment 5:
FIG.5 1 is a drawing for explaining a packet generating method (for a packet size of 512 bits), according to Embodiment 5;
FIG.52 shows a specific configuration of an erasure correction coding related processing section according to Embodiment 5;
FIG.53 shows a specific configuration of an erasure correction decoding related processing section according to Embodiment 5;
FIG.54 shows packet structure #1 according to Embodiment 6 of the present invention:
FIG.55 shows packet structure #2 according to Embodiment 6;
FIG.56 shows a specific configuration of an erasure correction coding related processing section according to Embodiment 6:
FIG.57 shows a specific configuration of an erasure correction decoding related processing section according to Embodiment 6;
FIG.58 shows packet structure #3 according to Embodiment 7 of the present invention;
FIG.59 shows a specific configuration of an erasure correction coding related processing section according to Embodiment 7;
FIG.60 is a drawing for explaining a method of information-zero-termination;
FIG.61 shows an example of the configuration of an erasure correction coding section when using a non-systematic code;
FIG.62 shows an example of the configuration of an erasure correction decoding section when using a non-systematic code; and
FIG.63 shows a packet structure method of FIG.54 by another expression method.
Description of Embodiments
Now, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
(Embodiment 1)
FIG.4 shows the overall configuration of a communication system according to Embodiment 1 of the present invention. In FJG.4. the communication system is provided with packet generating section 110. erasure correction coding apparatus 120, transmitting apparatus 130, communication channel 140. receiving apparatus 150. erasure correction decoding apparatus 160 and packet decoding section 170. In the figure, packet generating section 110, erasure correction coding apparatus 120 and transmitting apparatus 130 correspond to the encoding side, and receiving apparatus 150. erasure correction decoding apparatus 160 and packet decoding section 170 correspond to the decoding side.
Packet generating section 110 converts information data outputted from a transmission information source into information packets by adding a header to the information data. For example, as shown in FIG.5, in a case where TS's (Transport Streams) of an MPEG (Moving Picture Expert Group) given as information data are converted into IP packets, packet generating section 110 generates an IP packet by grouping seven MPEG-TS's and adding an IP header to the head. Packet generating section 1 10 outputs the generated information packet to erasure correction coding apparatus 120 and transmitting apparatus 130.
Erasure correction coding apparatus 120 performs erasure correction coding processing on the information packet outputted from packet generating section 110. and generates a parity packet. Erasure correction coding apparatus 120 outputs the generated parity packet to transmitting apparatus 130. Also, the configuration and operations of erasure correction coding apparatus 120 will be described later.
Transmitting apparatus 130 converts the information packet and parity packet outputted from erasure correction coding apparatus 120 into a form that can be transmitted, according to the medium to use as the communication channel, and transmits the result to communication channel 140.
Communication channel 140 represents the route through which a signal transmitted from transmitting apparatus 130 passes before receiving apparatus 150 receives the signal. As a communication channel, it is possible to use an Ethernet (registered trademark), power line. metaJ cable, optica] fiber, radio, light (such as visible light and infrared) or combinations of these.
Receiving apparatus 150 receives a signal reached from transmitting apparatus 130 via communication channel 140,. and converts the signal into a form of packets. Receiving apparatus 150 outputs the converted received packets to erasure correction decoding apparatus 160.
If there is a packet (erased packet) erased in the received packets, erasure correction decoding apparatus 160 performs erasure correction using a parity packet added by erasure correction coding apparatus 120 on the encoding side. Erasure correction decoding apparatus 160 extracts only information packets from the received packets subjected to erasure correction, and outputs the extracted information packets to packet decoding section 170. [n contrast, if there is no erased packet in the received packets, erasure correction is not performed, and only information packets of the received packets are outputted to packet decoding section 170. The configuration and operations of erasure correction decoding apparatus 160 will be described later.
Packet decoding section 170 converts packetized information data into a form that can be decoded by a received information source processing section (not shown), and outputs the result to received information source processing section. In the example of FIG.5, seven MPEG-TS's are extracted from IP packet data and outputted to the received information source processing section.
FIG.6 is a block diagram showing the main configuration of an erasure correction coding apparatus 120 according to Embodiment 1 of the present invention. Jn the present embodiment, erasure correction coding apparatus 120 uses an LDPC-CC (Low-Density Parity-Check Convolutional Code) as an erasure correction code. Also, an LDPC-CC having good erasure correction capability will be described later.
Erasure correction coding apparatus 120 is provided with dummy data inserting section 121, arranging section 122, erasure correction coding section 123 and erasure correction coding parameter storage section 1 24.
Erasure correction coding parameter storage section 124 stores LDPC-CC parameters to use in erasure correction coding. To be more specific, as LDPC-CC parameters, erasure correction coding parameter storage section 124 stores, for exampfe. an LDPC-CC pan'Cy check polynomial, number of LDPC-CC coding processing unit packets n and information about constraint length Kmax and coding rate (q-I )/q of an LDPC-CC parity check polynomial. Erasure correction coding parameter storage section 1 24 outputs number of coding processing unit packets n to dummy data inserting section 121, outputs information about constraint length Kmax and coding rate (q-l)/q of an LDPC-CC to arranging section 122. and outputs an LDPC-CC parity check polynomial to erasure correction coding section 123. Here, the definition of Kmax will be described later in detail.
Dummy data inserting section 12 1 compares the number of information packets outputted from packet generating section 110 and number of coding processing unit packets n in erasure correction coding section 123, and, if the number of information packets equals number of coding processing unit packets n. outputs the information packets as is (o arranging section 122. In contrast, if the number of packets is less than n, dummy data inserting section 121 generates n packets by adding dummy packets known between the encoding side and the decoding side, to the information packets,, and outputs n packets to which the dummy packets have been added, to arranging section 122 as information packets.
FIG.7 shows an input or output packet sequence in dummy data inserting section 121. In a case where number of coding processing unit packets n is 5 in erasure correction coding section 123. if three information packets are received as input from packet generating section 110 to dummy data inserting section 121 (see FIG.7A). dummy data inserting section 121 adds two dummy packets to the end part of the three information packets outputted from packet generating section 110 (see FIG.7B).
Arranging section 122 arranges information data included in n information packets, according to constraint length Kmax and coding rate (q-l)/q of a parity check polynomial of the erasure correction code used in erasure correction coding section 123. To be more specific, arranging section 122 performs arrangement such that Kmaxx(q-1) consecutive items of information data arranged are formed with information data included in
different information packets.
Arrangement processing in arranging section 122 will be explained below using F1G.S. In FIG.8, first to n-th information packets refer to information packets outputted from dummy data inserting section 121. The k-th information packet (k=l, .... n) includes s items of information data of x#k,.l, xirk,2, x#k,3, ..., x#k,s-l and x#k,s. Also, an example case will be explained with the present embodiment where the relationship of m=s holds true.
First, arranging section 122 sorts information data included in each information packet into a plurality of information blocks. For example, as shown in FIG.8, among data x#l.ls x#l,2, x#l,3, .... x#l,s-l and s#l,s included in the first information packet, arranging section 122 sorts data x#l,l into the first information block, data x#l,2 into a second information block; data \# 1.3 into a third information block, .... and data x#l,s into an m-th information block.
Thus, arranging section 122 sorts each information data included in each information packet into a plurality of information blocks. As a result, the first information block is designed to include information data of a plurality of information packets, x#l,l. x#2,l, x#3,l, ..., x#n-l,1 and x#n, I.
At this time, from n information packets satisfying equation I, arranging section 122 sorts each information data into a plurality of information blocks. By doing so, in each information block, Kmaxx(q-l) consecutive items of information data are forced with information data included in different information packets. Arranging section 122 arranges sorted information data in each information block.
[1]
KmaxX(q-1 )) is satisfied in an LDPC-CC of a time varying period of 6 and a coding rate of (n-l)/n (where n is an integer equal to or greater than 2) represented by parity check polynomials of equations 11-1 to 11-6.
In an LDPC-CC of a time varying period of 6 and a coding rate of (n-l)/n (where n is an integer equal to or greater than 2), parity and information at time i are represented by Pi and X,1. Xl,2, ..., X,?ln.i respectively. ]f i%6 = k (where k=0, I, 2. 3. 4, 5) is assumed at this time. a parity check polynomial of equation 1 l-(k+l) holds true. For example, if i = 8, 1%6=2 (k=2), and therefore equation 12 holds true. [12]
In equations 11-1 to 11-6, combinations of orders of X1(D), X2(D), ..., Xn-l(D), and P(D) satisfy the following condition:
(a#1.1.1%3, a#1.1.2%3, a#1.1.3%3), (a#1.1.2%3, a#1.2.2%3 a#1.2.3%3), .... (a#1.k.1%3, a#1.k.2%3 a#1.k.3%3), ..., (a#1.n-1.1%3, (a#1.n-1.2%3, (a#1.n-1.3%3,) and ( (b#1.1%3,,b#1.1%3, b#1.1%3) are any of (0, 1, 2), (0, 2._ I), (1, 0, 2). (1, 2, 0), (2, 0, 1). or (2, 1, 0) (where k=L 2, 3, ..... n-1);
(a#2.1.1%3, a#2.1.2%3, a#2.1.3%3, (a#2.2.1%3 a#2.2.1%3
a#2.2.1%3), ..., (a#2k1%3,a#2k1%3, a#2k1%3), ..., (a#2_2,1%3, a#2_2,1%3, a#2_21,3%3) and (b#2,1,1%3,b#2k,1%3, b#2k,1%3) are any of (0. 1, 2), (0, 2, J), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where k=l, 2, 3, ..., n-1):
(a#3.1,1%3, a#3.1,2%3, a#3.1,31%3), (a#3.2,1%3 a#3.2,2%3,
a#3.2,3%3), ..., (a#3.k,1%3, a#3.k,1%3, a#3.k,1%3),, ..., (a#3.n-1,1%3 a#3.n-1,2%3, a#3.n-1,3%3) and (b#3,1%3, b#3,2%3, b#3.3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, I, 0) (where k=l, 2, 3, ..., n-1);
(a#4,1,1%3, a#4,1,1%3, a#4,1,1%3), (a#4,2,1%3, a#4,2,2%3,
av4,2.3%3)- ..., (a#4.k.1%3, a#4,k,2%3, a#4,k,3%3)5 ..., (a#4.n-1,1 %3, a#4,n-1.2%3, a#4,n.1:3%3) and (b#4,1%3, b#4,2%3, b#4,3%3) are any of (0, I, 2), (0, 2, 1),
(I, 0, 2), (1, 2, 0). (2, 0, 1), or (2, 1, 0) (where k=lr 2, 3S ..... n-1);
(a-5.1,,%3. a = 5,1.2%3, a = 5.1,3%3), (a«5,2,1%3, a#5,2.2%3. a-5>3.3%3), ..., (a#5,k.1%3, a = 5A,2%3, a = 5.k,3%3): ..., (a≠5.n-1 ,1%3, a#5,„.1:2%3, as5,n-1.3%3) and (b#5.1%3; ba5.2%3: b.3%3) are any of (0; 1, 2), (0, 2, I), (1, 0, 2% (I, 2, 0), (2, 0, 1). or (2, 1, 0) (where k = l, 2, 3, .... n-1); and
(a#6.1,1%3, a#6[1i2%3J a«6!1,3%3). (a# instead of , that is, using in addition to . Orders ofXl(D) of equations 17-1 to 17-3g satisfy the following condition: all values other than multiples of 3 (that is, 0. 3, 6, ..., 3g-3) from among integers from 0 to 3g-l (0, !, 2, 3, 4, .... 3g-2, 3g-l) are present in the following 6g values of (a#1,1,1%3g, as1,1 ,2%3g), (a92.1,1%3g, a#2.1,2%3g), .... (a#p1,1,%3g, a#p.1,2%3g)s .... and (a*3g.11 %3g, aS3„ ,,2%3g) (where p=l, 2. 3, ..., 3g);
orders of X2(D) ofequations 17-1 to 1 7-3 g satisfy the following
condition: all values other than multiples of 3 (that is, 0, 3, 6, .... 3g-3) from among integers from 0 to 3g-l (0, 1. 2. 3. 4. .... 3g-2, 3g-l) are present in the following 6g values of (a#1,.2,1 %3g, ak\,2,2%3g), (a#2,2,1 %3g. as2.2.2%3g), ..,, (a#p,2.1%3g. a#,p,2,2%3g). ..., and (a#.lg.2.1%3g: a#3g.2.2%3g) (where p = l, 2, 3, ..., 3g);
orders of X3(D) of equations 17-1 to 1 7-3g satisfy the following condition: all values other than multiples of 3 (that is. 0. 3, 6, .... 3g-3) from among integers from 0 to 3g-l (0. I. 2, 3, 4. .... 3g-23 3g-l) are present in the following 6g values of (a#1,3.1%3g. a#1,3,2%3g), (a#2,31%3g: a#2.3.2%3g)5 .... (a#p,3.1%3g, aSp,3,2%3g), -•-, and (a#3tl,3.1%3g, a#3g,3,2%3g) (where p=l, 2, 3, ...; 3g)
. . . ,
orders of Xk(D) of equations 17-1 to 1 7-3g satisfy the following condition: all values other than multiples of 3 (that is. 0. 3. 6, .... 3g-3) from among integers from 0 to 3g-l (0. 1, 2, 3. 4, .... 3g-2, 3g-1 ) are present in the following 6g values of (a11,k,1g, a#1,k,2%3g), (a#2,.k.1 %3g, a#2.k,2%3g), .... (a#p,k1,1%3g. #1,k,2%3g). ..., and (a#3g.k.1%3g, a/ns,k,2%3g) (where p=l, 2, 3, .... 3g, and k=l, 2, 3, ..., n-l)
orders ofXn-l(D) of equations 17-1 to 1 7-3g satisfy the following condition: all values other than multiples of 3 (that is, 0. 3, 6, ..., 3g-3) from among integers from 0 to 3g-1 (0. I, 2, 3. 4, .... 3g-2, 3g-l) are present in the following 6g values of (a#1 ,n.1,1%3g, a#1,n-1,2%3g), (a#2,n-1.1%3g, a#2.n-1.2%3g), .... (asp,n.1,1%3g. a#p,n.1 12%3g), ..., and (a#3g.n.1,1%3g, as3g,n-1,2%3g) (where p=l, 2. 3, ..., 3g); or
orders of P(D) of equations 17-1 to 17-3g satisfy the following condition: all values other than multiples of 3 (that is, 0. 3, 6, ..., 3g-3) from among integers from 0 to 3g-l (0, 1, 2, 3, 4. ..., 3g-2, 3g-l) are present in the following 6g values of (b#1,1%3g. b#1.2%3g), (b#2.L%3g, btf2.2%3g), (b#3.i%3g, b,3,2%3g)3 ..., (b«k,i%3g, b#k,2%3g}3 ..., (b#3E.2.i%3g, b#3g-2,2%3g), (b#3g.|.i%3g, b#3g-i ,2%3g) and (b#3g1%3g, b#3g,2%3g) (where k=l, 2, 3. ..., 3g).
The above description relates to an LDPC-CC of a time varying .period of 3g and a coding rate of (n-l)/n (where n is an integer equal to or greater than 2). Below, conditions are described for orders of an LDPC-CC of a time varying period of 3g and a coding rate of 1/2 (n=2).
Consider equations 19-1 to 19-3g as parity check polynomials
At this time, X(D) is a polynomial representation of data (information) X and P(D) is a polynomial representation of parity. Here. in equations 19-1 to 1 9-3g, parity check polynomials are assumed such that there are three terms in X(D) and P(D) respectively.
Thinking in the same way as in the case of an LDPC-CC of a time varying period of 3 and an LDPC-CC of a time varying period of 6, the possibility of being able to obtain higher error correction capability is increased if the condition below () is satisfied in an LDPC-CC of a time varying period of 3g and a coding rate of 1/2 (n=2) represented by parity check polynomials of equations 19-1 to 19-3g.
In an LDPC-CC of a time varying period of 3g and a coding rate of 1/2 (n=2), parity and information at time i are represented by Pi and i, 1 respectively. If 1%3g = k (where k=0, 1, 2, ..., 3g-l) is assumed at this time, a parity check polynomial of equation l9-(k+l) holds true. For
example, if i = 2. i%3g=2 (k = 2). and therefore equation 20 holds true, [20]
In equations 19-1 to 1 9-3g, it is assumed that a#k1,1, a#t1,2. and a#k.1 ,3 are integers (where a#k1,1≠a#k,1,2≠ask.1 ..0 (where k=l, 2, 3, ..., 3g). Also, it is assumed that b«k.i. buk.2, and b«k,3 are integers (where b#k;,1≠b#k,2≠b#k,3)- A parity check polynomial of equation 19-k (k=l, 2. 3, ..., 3g) is called "check equation #k and a sub-matrix based on the parity check poiynomia! of equation 19-k is designated k-th sub-matrix Hk. Next, an LDPC-CC of a time varying period of 3g is considered that is generated from first sub-matrix Ht. second sub-matrix H2; third sub-matrix H3, ..., and 3g-th sub-matrix H3g,
In equations 19-1 to 19-3g. combinations of orders of X(D) and P(D) satisfy the following condition:
(a≠1,1,1%3, as1,1.2%3. a≠1J%3%3) and (bS1,1%3, b#1,2%3, b≠#3%3) are any of (0, l', 2), (0, 2, 1 ), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1,0):
(a#2,1,1%3, a#2.1.2%3, a#2,1,3%3) and (b#2 ,%3,bja2,2%3,b12,3%3) are any of (0, I, 2), (0, 2, 1), (I, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0);
(as31.1%3, a1#1.2%3. a#3.1.%3} and (b#3,1%3,b#3.2%3,b1-3 3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1,0);
... j
(aSk,11%3, aSk.1,2%3, a#M.3%3) and (bSk,,%3, bSk,2%3, b#i!.3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (I, 2, 0), (2, 0, 1), or (2, 1, 0) (where k=l, 2, 3, ..., 3g);
(a#3g-2,1,1%3, ae1E-2,1,2%3. a#3s-2,1,3%3) and (ba3,2,1 %3. b#3g-2,2%3, b#3g-2,3%3) are any of (0.. 1, 2)r (0., 2, 1), (1, 07 2).. (1, 2.. 0), (2, 0, 1), or (2, I, 0);
(a#3g-1,1,1%3, a*3g-1,1,2%3, a#3g-1,1,3%3) and (b#3g1,1%3, b#3g-1.2%3, bs3g_,,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, I, 0); and
(a#3g,1,1%3, a*3S,1,2%3, a«1it\._1%3) and (b#3g,(%3, b#3K,2%3; b*3gi3%3) are any of (0, 1, 2), (0, 2, I), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0).
Here, as described with other parts than the present embodiment,
taking ease of performing encoding into consideration, it is desirable for one "01" to be present among the three items (b#k,1%3, b#k,2%3. b#k,1,%3) (where k=l, 2, .... 3g) in equations 19-1 to 19-3g.
Also, in order to provide relevancy between parity bits and data bits of the same point in time, and to facilitate a search for a code having high correction capability. it is desirable for one "0,: to be present among the three items (ak1,1%3, a#k1,2%3, a#k1.3%3) (where k=l. 2, ..., 3g).
Next, an LDPC-CC of a time varying period of 3g (where g=2, 3. 4, 5, ...) that takes ease of encoding into account is considered. At this time, if the coding rate is 1/2 (n=2), LDPC-CC parity check polynomials can be represented as shown below. [21]
At this time, X(D) is a polynomial representation of data (information) X and P(D) is a polynomial representation of parity. Here, in equations 21-1 to 21-3g, parity check polynomials are assumed such that there are three terms in X(D) and P(D) respectively. In an LDPC-CC of a time varying period of 3g and a coding rate of 1/2 (n = 2), parity and
information at time i are represented by Pi and X,.i-1 respectively. [f i%3g=k (where k = 0, 1, 2, ...: 3g-l) is assumed at this time, a parity check polynomial of equation 2 1-(k+l) holds true. For example, if i = 2, i%3g = 2 (k = 2), and therefore equation 22 holds true. [22]
If and are satisfied at this time, the possibility of being able to create a code having higher error correction capability is increased.
In equations 21-1 to 21-3g, combinations of orders ofX(D) satisfy the following condition:
(a#,1,1%3, aH1,2%3, a#1,1,3%3) are any of (0, 1, 2), (0, 2, 1), (1 , 0; 2), (1. 2, 0), (2, 0, 1), or (2, I, 0);
(a#2,1,1%3, a#2,K2%3, a#1,3%3) are any of (0, I, 2), (0, 2, 1), (1, 0, 2), (L, 2, 0), (2, 0, 1), or (2, I, 0);
(aS31,1%3, a#3Jj2%3, aS3,1.3%3) are any of (0.. 1 2), (0. 2, 1), (1, 0.. 2), (I, 2, 0), (2, 0, 1), or (2, 1, 0);
(a#k,1,1%3, a#k,1,2%3, a#k1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where k=l, 2, 3, ..., 3g);
* ' * »
(af(3g-2,1,1%3, aS3g-2,1,2%3, a#3g-2,1,3%3) are any of (0, 1. 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, I, 0);
(a#3g-1,1,1%3, ae3s-1,1.2%3, a#3g-1,1,3%3) are any of (0, 1. 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0); and
{a#3g.1,1%3, a«3g,1.2%3, a«3?,i.3%3) are any of (0,1, 2), (0, 2, 1), (1 : 0, 2), (1, 2, 0), (2, 0, 1), or (2, I, 0).
In addition, in equations 21-1 to 21-3g, combinations of orders of P(D) satisfy the following condition:
(b#,,1%3, b*,,2%3), (bS2,1%3, b.2,2%3), (b#3,1%3, bs3,2%3), ..., (bflk.,%3, b#k,2%3), .... (b#3K-2.1%3, b#3B.2.2%3)s (bog-1.1%3, b«3E-1.2%3), and (b#3g1.%3, b#3,1,2%3) are any of (1, 2), or (2, I) (k=l, 2, 3, ..., 3g).
has a similar relationship with respect to equations 21-1 to 21-3g as has with respect to equations 19-1 to 19-3g. If the condition below () is added for
equations 21-1 to 21-3g in addition to , the possibility of being able to create an LDPC-CC having higher error correction capability is increased.
Orders of P(D) of equations 21-1 to 2 I -3g satisfy the foMowing condition:
all values other than multiples of 3 (that is. 0, 3, 6, .... 3g-3) from
among integers from 0 to 3g-l (0, 1, 2. 3, 4, ..., 3g-2, 3g-l) are present in
the following 6g values of (bs1,1%3g. b«i,2%3g). (b#2,!%3g, b<-2,2°/o3g).
(bS3.i%3g? b#3.2%3g), .... (bSk,1%3g; bSk.2%3g). ..., (b«3g-2.1%3g,
bs1g-2.2%3g), (b*3l,.1,1%3g! b*3E-1,2%3g), and (bfi3g.!%3g: b#3c,2%3g).
The possibility of obtaining good error correction capability is high if there is also randomness while regularity is maintained for positions at which ';l"s are present in a parity check matrix. With an LDPC-CC for which the time varying period is 3g (where g-2, 3, 4, 5, ...) and the coding rate is 1/2 (n=2) that has parity check polynomials of equations 21-1 to 21-3g. if a code is created in which is applied in addition to . it is possible to provide randomness while maintaining regularity for positions at which "l"s are present in a parity check matrix, and therefore the possibility of obtaining better error correction capability is increased.
Next, an LDPC-CC of a time varying period of 3g (where g=2. 3, 4, 5, ...) is considered that enables encoding to be performed easily and provides relevancy to parity bits and data bits of the same point in time. At this time, if the coding rate is 1/2 (n=2), LDPC-CC parity check polynomials can be represented as shown below. [23]
At this time, X(D) is a polynomial representation of data (information) X and P(D) is a polynomial representation of parity. In equations 23-1 to 23-3g. parity check polynomials are assumed such that there are three terms in X(D) and P(D) respectively, and a D° term is present in X(D) and P(D) (where k=l, 2, 3, ..., 3g).
In an LDPC-CC of a time varying period of 3g and a coding rate of 1/2 (n = 2), parity and information at time i are represented by Pi and X,j respectively. If 1%3g = k (where k=0, 1, 2, ..., 3g-l) is assumed at this time, a parity check polynomial of equation 23-{k-H) holds true. For example, if i=2, i%3g=2 (k=2), and therefore equation 24 holds true. [24]
If following and are satisfied at this time, the possibility of being able to create a code having higher error correction capability is increased. In equations 23-1 to 23-3g, combinations of orders of X(D) satisfy the following condition:
(aglili,%3, a#11,2%3) is (K 2) or (2, J); (a*2.1,1%3, a*2.1,2%3) is (1, 2) or (2, 1); (a#3.11%3, ao1,2%3) is (1 2) or (2, 1);
... j
(aSM,1%3, a#k1,2%3) is (1, 2) or (2, 1) (where k=l, 2, 3, ..., 3g); (a#3g-2,1,1%3, a#3g-2.1.2%3) is (1, 2) or (2, 1),
65
In addition, in equations 23-1 to 23-3g, combinations of orders of P(D) satisfy the following condition:
has a similar relationship with respect to equations 23-1 to 2 3 - 3 g as has with respect to equations 19-1 to 19-3g. If the condition below () is added for equations 23-1 to 23-3g in addition to . the possibility of being able to create an LDPC-CC having higher error correction capability is increased.
Orders of P(D) of equations 23-1 to 23-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6. ..., 3g-3) from among integers from 0 to 3g-l (0. 1, 2. 3, 4, ..., 3g-2, 3g-1) are present in the following 6g values of (a#1,1,1%3g, a#\i\i2%2g), (a#2.1,1%3g, a#2,1,2%3g). ..., (a#p1,1%3g, a#p,1.2%3g), ..., and (a#3s,1,1%3g, a#3g.1.2%3g) (where p = l, 2, 3. .... 3g); and
orders of P(D) of equations 23-1 to 23-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, ..., 3g-3) from among integers from 0 to 3g-l (0. 1, 2, 3, 4, .... 3g-2, 3g-l) are present in the following 6g(3gx2) values of (b#1,1%3g, b1,12%3g). (b#21%3g, b#2.2%3g), (bS31%3g. b#3.2%3g), ..., (b#k,,%3g, bSk,2%3g), .... (bs3g-2,1%3g, b#3g.2,2%3g), (b#3g-1,1%3g, b#3g-1,2%3g); and (b#s.1%3gJ b#3g.2%3g) (where k=l, 2( 3, ... 3g).
The possibility of obtaining good error correction capability is high if there is also randomness while regularity is maintained for positions at which "l"s are present in a parity check matrix. With an LDPC-CC for which the time varying period is 3g (where g=2. 3, 4, 5, ...) and the coding rate is 1/2 that has parity check polynomials of equations 23-1 to 23-3g, if a code is created in which is applied in addition to , it is possible to provide randomness while maintaining regularity for positions at which "l"s are present in a parity check matrix, so that the possibility of obtaining better error correction
capability is increased.
The possibility of being able to create a code having higher error correction capability is also increased if a code is created using instead of , that is. using in addition to .
Orders of X(D) of equations 23-1 to 23-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6. .... 3g-3) from among integers from 0 to 3g-l (0, I, 2, 3, 4. .... 3g-2, 3g-l) are present in the following 6g values of (a#11.1%3g, a#1m,1 , 2 % 3 g). (a#21,1%3g, as2,1,2%3g), ..., (aSp11%3g, a#P12%3g), ..., and (a#3e,1,1 %3 g, a-3g1,2%3g) (where p=l, 2, 3. ..., 3g); or
orders of P(D) of equations 23-1 to 23-3g satisfy the following
condition: all values other than multiples of 3 (that is, 0. 3. 6, ..., 3g-3)
from among integers from 0 to 3g-l (0, 1, 2, 3. 4, ...: 3g-2, 3g-l) are
present in the following 6g values of (b#1,1%3g, b#1,22%3g), (b»2.1%3g,
b#7,2%3g)s (b#3.1%3g, b = 3,2%3g); ..., (bHk,1%3g, bak,2%3g); ..., (b,3B_2.1%3g,
b=3e-2.2%3g), (b«35-1,1%3g, b#3g-1,2%3g) and (b«3g,1%3g, bs13g,2%3g) (where
k=l, 2, 3 3g).
Examples of LDPC-CCs of a coding rate of 1/2 and a time varying period of 6 having good error correction capability are shown in Table 4.
fTahlp 41
An LDPC-CC of a time varying period of g with good characteristics has been described above. Also, in a case of using the above LDPC-CC in the erasure correction coding section in Embodiments 1 to 3. upon drawing a Tanner graph, it is confirmed that good characteristics are provided when there are no loop 4 (which is a round circuit starting from a certain node and ending at that node (i.e. a rounding path), and which has a length of 4) and loop 6 (which is a loop having a length of 6 (also referred to as "cycle of length 6")).
Also, for an LDPC-CC, it is possible to provide encoded data (codeword) by multiplying information vector n by generator matrix G. That is, encoded data (codeword) c can be represented by c=n*G. Here, generator matrix G is found based on parity check matrix II designed in advance. To be more specific, generator matrix G refers to a matrix satisfying G=Rb when Arb when Arb f" = " is not adopted) when AB (including a case of A=B) in a case where the maximum value of the packet size supported by coding rate Ra is A and the maximum value of the packet size supported by coding rate Rb is B, the erasure rate when one packet is erased is taken into account, so that it is possible to realize further improvement in the received quality of the communicating party and in the transmission speed of data (information),
Similar to FIG.42, FIG.43 shows an example case where the packet size between 64 bytes and 1024 bytes is supported. FIG.43 shows an association example where: a coding rate of 1/2 is supported when the packet size is equaf to or above 384 bytes and equal to or below 1024 bytes; a coding rate of 2/3 is supported when the packet size is equal to or above 128 bytes and equal to or below 384 bytes; and a coding rate of 3/4 is supported when the packet size is equal to or above 64 bytes and equal to or below 128 bytes.
Thus, when coding rate Ra and coding rate Rb hold RaB (including a case of A = B) in a case where the maximum value of the packet size supported by coding rate Ra is A and the maximum value of the packet size supported by coding rate Rb is B, the erasure rate when one packet is erased is taken into account, so that it is possible to realize further improvement in the received quality of the communicating party and in the transmission speed of data (information). Also, as clear from FIG.43, there is a characteristic that, if the packet size is designated, the erasure correction code coding rate is uniquely determined, so that the communication apparatus can provide an advantage of simplifying determination of the erasure correction code coding rate.
Similar to FIG.42 and FIG.43, FIG.44 shows an example case where the packet size between 64 bytes and 1024 bytes is supported. FIG,44 shows an association example where: a coding rate of 1/2 is supported when the packet size is equal to or above 256 bytes and equal to or below 1024 bytes; a coding rate of 2/3 is supported when the packet size is equal to or above 64 bytes and equal to or below 384 bytes; and a coding rate of 3/4 is supported when the packet size is equal to or above 64 bytes
and equal to or below 128 bytes.
Thus, when coding rate Ra and coding rate Rb hold RaB (including a case of A = B) in a case where the maximum value of the packet size supported by coding rate Ra is A and the maximum value of the packet size supported by coding rate Rb is B; and further hold a>b in a case where the minimum value of the packet size supported by coding rate Ra is "a" and the minimum value of the packet size supported by coding rate Rb is "b," the erasure rate when one packet is erased is taken into account, so that it is possible to realize further improvement in the received quality of the communicating party and in the transmission speed of data (information).
As described above, by changing the coding rate according to the packet size or making a supporting coding rate different according to the packet size, it is possible to improve the received quality of the communicating party and change the coding rate to a more suitable one. By this means, it is possible to provide an advantage of being able to improve the transmission speed of data (information). However, the relationships between packet sizes and coding rates are not limited to FIG.41 to FIG.44, and, by setting rules as described above, it is possible to provide the same advantage.
Also, although the erasure correction code information size is fixed and association examples between packet sizes and coding rates are created in FIG.42 to FIG.44, even in a case where the erasure correction code block size (or processing unit) is fixed, it is possible to set the coding rate according to the packet size in the same way as in FIG.42 to FIG.44.
The method has been described above in which the received quality of the communicating party and the transmission speed of data (information) are further improved by changing the erasure correction code coding rate using, as one parameter, the size of packets (packet size) to insert an error detection code (e.g. CRC).
Next, the method will be explained in detail, in which the received quality of the communicating party and the transmission speed of data (information) are further improved by changing the erasure correction code block size using the packet size as one parameter. Here, the block size refers to the number of bits of one block of a block code (also referred to as "processing unit"), and is determined by the information length and
coding rate of the block code.
For example, consider a case where a block code like an LDPC code is used as an erasure correction code, the coding rate is 2/3 and the packet size is 1024 bytes. At this time, the erasure rate when one packet is erased is as follows:
(Case 1) when the block code information length is 8192 bits (block size: 6144 bits) and one packet is erased, the erasure rate is 0.66666;
(Case 2) when the block code information length is 16384 bits (block size: 24576 bits) and one packet is erased, the erasure rate is 0.33333; and
(Case 3) when the block code information length is 32768 bits (block size: 49152 bits) and one packet is erased, the erasure rate is 0.16666. Therefore, especially in case 1 and case 2, if the coding rate R is 2/3. it is difficult to provide good erasure correction capability.
In view of the above, by changing the erasure correction code coding rate using, as one parameter, information of the size of packets (packet size) to insert an error detection code (e.g. CRC), it is possible to improve the received quality of the communicating party, and, depending on this, provide an advantage of improving transmission speed of data (information).
FIG.45 shows an example of relationships between packet sizes and usable block sizes in a case where a communication system can use a plurality of sizes as the block size. Here, FIG,45 shows an example case where the erasure correction code to use in the communication system is 2/3 and where block codes such as an LDPC code, trellis codes such as a turbo code and convolutional code (LDPC convolutional code) or Raptor codes (Fountain codes or LT (Luby-Transform) codes), are used as an erasure correction code. Also, FIG.45 shows an example case where the communication system can designate three kinds of 64 bytes, 256 bytes and 1024 bytes as the packet size.
In FIG.45, as described above, examples 1 to 3 show association examples between packet sizes and block sizes prepared taking into account the erasure rate when one packet is erased. [Example I] In example I, when the packet size is 64 bytes, a usable block size (or processing unit) is 6144 bits. Also, when the packet size is 256 bytes, •
a usable block size (or processing unit) is 24576 bits. Also, when the packet size is 1024 bytes, a usable block size (or processing unit) is 49152. Thus, example 1 is designed such that each block size (or processing unit) supports only one packet size. By this means, if the packet size is designated by setting signal 42, the erasure correction code block size (or processing unit) is uniquely determined, so that there is an advantage of simplifying control of the communication apparatus. However, in example I, it is necessary to set associations between packet sizes and coding rates so as to obey the rule that the erasure correction block size (or processing unit) is made larger when the packet size is larger. [Example 2] In example 2, when the packet size is 64 bytes, usable block sizes (or processing units) are 6144, 24576 and 49152 bits. Also, when the packet size is 256 bytes, usable block sizes (or processing units) are 24576 ana1 49iS2 bits. A/so, wfien the pacfcet si'ze fs !024 bytes, a usafefe block size (or processing unit) is 49152 bits. In example 2, there is a characteristic that, when the packet size is larger, the minimum block size (or processing unit) among supported block sizes (or processing units) becomes larger. By this means, the erasure rate when one packet is erased is taken into account, so that it is possible to realize further improvement in the received quality of the communication party and in the transmission speed of data (information).
Here, in a case where the minimum size is na among erasure correction code block sizes (or processing units) when the packet size is A and the minimum size is nb among erasure correction code block sizes (or processing units) when the packet size is B, "=" may be adopted so that na