Abstract: The present disclosure generally relates to a mechanism for input line phase loss for LV drive that includes a control mechanism (CM) 115 that can receive DC link Voltage (VDC), wherein the CM 115 can include a DC calculation stage (DCS) that can be configured to take into account one or more ADC samples of the VDC so as to ascertain VDC ripple voltage (delta DC) 117 and VDC ripple frequency (delta F) 119; and a threshold triggering stage (TTS) that can be configured to compare the values of the delta DC 117 and the delta F 119 with pre-set values of reference voltage (ref DC) and reference frequency (ref F) so as to invert a result to a logic circuit.
Claims:1. A mechanism for input line phase loss for LV drive, comprising:
a control mechanism (CM) that receives DC link Voltage (VDC), wherein the CM comprising:
a DC calculation stage (DCS) configured to take into account one or more ADC samples of the VDC so as to ascertain VDC ripple voltage (delta DC) and VDC ripple frequency (delta F); and
a threshold triggering stage (TTS) configured to compare the values of the delta DC and the delta F with pre-set values of reference voltage (ref DC) and reference frequency (ref F) so as to invert a result to a logic circuit, which triggers a shut down operation for any of the delta DC and the delta F crossing the pre-set values.
2. The mechanism as claimed in claim 1, wherein the logic circuit triggers the shut down by disabling delivery of switching pulses to an inverter operatively configured with the CM.
3. The mechanism as claimed in claim 1, wherein the delta DC is ascertained using root mean square (RMS) calculation of the VDC.
4. The mechanism as claimed in claim 1, wherein the delta DC is interfaced through human machine interface (HMI).
5. The mechanism as claimed in claim 1, wherein the pre-set value of the ref DC is based upon a user input that takes into account the DC link Voltage (VDC).
6. The mechanism as claimed in claim 1, wherein the pre-set value of the ref F is about 100 Hz.
7. The mechanism as claimed in claim 1, wherein the mechanism further comprises a capacitor configured to execute a tripping action, in the event of phase loss, for delta DC crossing a safe-limit zone.
8. A method for a mechanism for input line phase loss for LV drive, the method consisting the steps of:
performing, by a DC calculation stage (DCS) of a control mechanism (CM), RMS calculation by taking into account one or more ADC samples of DC link Voltage (VDC) so as to ascertain VDC ripple voltage (delta DC) and VDC ripple frequency (delta F); and
triggering, by a threshold triggering stage (TTS) of the CM, a shut down operation for any of the delta DC and the delta F crossing a pre-set values of reference voltage (ref DC) and reference frequency (ref F), wherein the TSS is configured to compare the values of the delta DC and the delta F with the pre-set values.
9. The method of claim 7, wherein the step of triggering the shut down operation is performed by a logic circuit of the TTS, wherein the logic circuit disables delivery of switching pulses to an inverter operatively configured with the CM.
10. The method of claim 7, wherein the method further comprises the step of warning to a human machine interface (HMI) in case of the shut down operation for the input line phase loss.
, Description:TECHNICAL FIELD
[0001] The present disclosure generally relates to the field of electrical drive systems. In particular, the present disclosure pertains to LV drive systems. More specifically, the present disclosure relates to protection of LV drive systems from damage due to loss of input phase.
BACKGROUND
[0002] Background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.
[0003] Three phase LV drives find wide industrial applications such as, but need not necessarily, for driving induction motors couples with pumps, fans, elevators etc. Their applications has been jeopardized, more often than not, due to situations wherein loss (or disconnection) of even a single phase leads the drive to remain powered with two phases of the input only. As evident, persistence of such situations, for prolonged periods or even non-detection thereof, can result in serious damages such as intermediate dc link capacitor failure, motor insulation breakdown, inverter fault etc.
[0004] There have been efforts of various magnitudes and degrees to address aforementioned problems. But such efforts make use of complex and expensive hardware(s) such as sensors that additionally require signal conditioning among other demerits pertinent to their application. It is therefore desirable to measure and detect input voltage or detect line loss for input phase, while obviating sensor cost and associated signal conditioning costs.
[0005] There is, therefore, a need in the art to provide a simple and efficient mechanism to enhance protection from input line loss of LV drive so as to obviate damage thereof. It would be an added benefit to limit need of any expensive and/or additional hardware in implementation of said mechanism.
[0006] All publications herein are incorporated by reference to the same extent as if each individual publication or patent application were specifically and individually indicated to be incorporated by reference. Where a definition or use of a term in an incorporated reference is inconsistent or contrary to the definition of that term provided herein, the definition of that term provided herein applies and the definition of that term in the reference does not apply.
[0007] In some embodiments, the numbers expressing quantities of ingredients, properties such as concentration, reaction conditions, and so forth, used to describe and claim certain embodiments of the invention are to be understood as being modified in some instances by the term “about.” Accordingly, in some embodiments, the numerical parameters set forth in the written description and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by a particular embodiment. In some embodiments, the numerical parameters should be construed in light of the number of reported significant digits and by applying ordinary rounding techniques. Notwithstanding that the numerical ranges and parameters setting forth the broad scope of some embodiments of the invention are approximations, the numerical values set forth in the specific examples are reported as precisely as practicable. The numerical values presented in some embodiments of the invention may contain certain errors necessarily resulting from the standard deviation found in their respective testing measurements.
[0008] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0009] The recitation of ranges of values herein is merely intended to serve as a shorthand method of referring individually to each separate value falling within the range. Unless otherwise indicated herein, each individual value is incorporated into the specification as if it were individually recited herein. All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g. “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
[0010] Groupings of alternative elements or embodiments of the invention disclosed herein are not to be construed as limitations. Each group member can be referred to and claimed individually or in any combination with other members of the group or other elements found herein. One or more members of a group can be included in, or deleted from, a group for reasons of convenience and/or patentability. When any such inclusion or deletion occurs, the specification is herein deemed to contain the group as modified thus fulfilling the written description of all groups used in the appended claims.
OBJECTS OF THE INVENTION
[0011] A general object of the present disclosure is to provide for a simple, efficient mechanism that obviates performance and operational issues encountered with conventional line loss protection systems.
[0012] An object of the present disclosure is to provide a mechanism to detect input line phase loss for LV drive with minimum or no additional hardware costs.
[0013] An object of the present disclosure is to obviate need of sensor(s) for line loss detection for LV drives mainly from economic and operational point of view.
[0014] Yet another object of the present disclosure is to provide enhanced life and damage-free working of LV drives by timely action for events related to line phase loss.
SUMMARY
[0015] Aspects of the present disclosure generally relate to the field of electrical drive systems. In particular, the present disclosure pertains to LV drive systems. More specifically, the present disclosure relates to protection of LV drive systems from damage due to loss of input phase.
[0016] In an aspect, the present disclosure provides a mechanism for input line phase loss for LV drive that includes a control mechanism (CM) that can receive DC link Voltage (VDC), wherein the CM can include a DC calculation stage (DCS) that can be configured to take into account one or more ADC samples of the VDC so as to ascertain VDC ripple voltage (delta DC) and VDC ripple frequency (delta F); and a threshold triggering stage (TTS) that can be configured to compare the values of the delta DC and the delta F with pre-set values of reference voltage (ref DC) and reference frequency (ref F) so as to invert a result to a logic circuit, which triggers a shut down operation for any of the delta DC and the delta F crossing the pre-set values.
[0017] In an aspect, logic circuit can trigger shut down by disabling delivery of switching pulses to an inverter operatively configured with CM.
[0018] In an aspect, delta DC can be ascertained using root mean square (RMS) calculation of VDC, wherein the delta DC can be interfaced through a human machine interface (HMI).
[0019] In an aspect, pre-set value of ref DC the pre-set value of the ref DC can be based upon a user input that takes into account the DC link Voltage (VDC), and ref F can be about 100 Hz.
[0020] In an aspect, mechanism of the present disclosure can further comprise a capacitor that can be configured to execute a tripping action, in the event of phase loss, for delta DC crossing a safe-limit zone.
[0021] In an aspect, the present disclosure provides a method for a mechanism for input line phase loss for LV drive, the method can include the steps of: (i) performing, by a DC calculation stage (DCS) of a control mechanism (CM), RMS calculation by taking into account one or more ADC samples of DC link Voltage (VDC) so as to ascertain VDC ripple voltage (delta DC) and VDC ripple frequency (delta F); and (ii) triggering, by a threshold triggering stage (TTS) of the CM, a shut down operation for any of the delta DC and the delta F crossing a pre-set values of reference voltage (ref DC) and reference frequency (ref F), wherein the TSS is configured to compare the values of the delta DC and the delta F with the pre-set values. Further, the method can comprise the step of warning to a human machine interface (HMI) in case of the shut down operation for the input line phase loss.
[0022] In an aspect, step of triggering shut down operation can be performed by a logic circuit of TTS, wherein the logic circuit can disable delivery of switching pulses to an inverter operatively configured with CM.
[0023] Various objects, features, aspects and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components
BRIEF DESCRIPTION OF THE DRAWINGS
[0024] The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.
[0025] FIG. 1 illustrates an exemplary layout of LV drive with three-phase input and control mechanism in accordance to an embodiment of the present disclosure.
[0026] FIG. 2 illustrates an exemplary layout control mechanism of LV drive in accordance to an embodiment of the present disclosure.
[0027] FIG. 3 illustrates exemplary flowchart for input line loss protection for LV drive in accordance to an embodiment of the present disclosure.
[0028] FIG. 4 illustrates exemplary waveforms for input rectifier current and DC link voltage ripple, without phase loss, for LV drive in accordance to an embodiment of the present disclosure.
[0029] FIG. 5 illustrates exemplary waveforms for input rectifier current and DC link voltage ripple, with phase loss, for LV drive in accordance to an embodiment of the present disclosure.
DETAILED DESCRIPTION
[0030] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. However, the amount of detail offered is not intended to limit the anticipated variations of embodiments; on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present disclosure as defined by the appended claims.
[0031] Each of the appended claims defines a separate invention, which for infringement purposes is recognized as including equivalents to the various elements or limitations specified in the claims. Depending on the context, all references below to the "invention" may in some cases refer to certain specific embodiments only. In other cases it will be recognized that references to the "invention" will refer to subject matter recited in one or more, but not necessarily all, of the claims.
[0032] Various terms as used herein are shown below. To the extent a term used in a claim is not defined below, it should be given the broadest definition persons in the pertinent art have given that term as reflected in printed publications and issued patents at the time of filing.
[0033] Embodiments of the present disclosure generally relate to the field of electrical drive systems. In particular, the present disclosure pertains to LV drive systems. More specifically, the present disclosure relates to protection of LV drive systems from damage due to loss of input phase.
[0034] FIG. 1 illustrates an exemplary layout of LV drive 100 with three-phase input and control mechanism in accordance to an embodiment of the present disclosure. As illustrated, input grid 125 can be a three phase grid with R, S, and T as 3 lines, which can be rectified and the DC voltage can be fed to three phase inverter 105 so as to provide power to motor 130 that can be coupled with pump load. Control mechanism 115 can be a digital signal processor (DSP) and can provide switching pulses 150 to the inverter 105 for the events when three-phase input grid 125 is healthy.
[0035] In an aspect, mechanism of the present disclosure can further comprise a capacitor 145 that can be configured to execute a tripping action, in the event of phase loss, for delta DC 117 (or even for delta F 119) crossing a safe-limit zone. From similar considerations, the capacitor 145 can be designed within safe limits of ripple voltage (delta DC), in a preferred embodiment permitting only 3-5 % fluctuation of the ripple voltage before performing desired tripping action.
[0036] In an aspect, for a three-phase input 125, 415V, 50Hz, DC link Voltage (VDC) can be nearly 1.35 times of the AC voltage so as to receive 560 VDC while frequency for the instant input can be 6 times the input frequency i.e. 6*50 = 300Hz.
[0037] FIG. 2 illustrates an exemplary layout of a control mechanism 115 of LV drive 100 in accordance to an embodiment of the present disclosure. In an aspect, the present disclosure provides a mechanism for input line phase loss for LV drive 100 that can include control mechanism (CM) 115 that can receive DC link Voltage (VDC), wherein the CM 115 can include a DC calculation stage (DCS) that can be configured to take into account one or more ADC samples of the VDC so as to ascertain VDC ripple voltage (delta DC) 117 and VDC ripple frequency (delta F) 119; and a threshold triggering stage (TTS) that can be configured to compare the values of the delta DC and the delta F with pre-set values of reference voltage (ref DC) and reference frequency (ref F) so as to invert a result to a logic circuit, which triggers a shut down operation for any of the delta DC 117 and the delta F 119 crossing the pre-set values.
[0038] In an aspect, logic circuit of the present disclosure can trigger shut down by disabling delivery of switching pulses 150 (alternatively, PWM pulses) to an inverter 105 operatively configured with CM 115.
[0039] In an aspect, delta DC 117 can be ascertained using root mean square (RMS) calculation of VDC, wherein the delta DC 117 can be interfaced through a human machine interface (HMI).
[0040] In an aspect, pre-set value of the ref DC can be based upon a user input that takes into account the DC link Voltage (VDC). In an exemplary case, it can be set in percentage value of the VDC say 15% i.e. 15% ripple can be triggering point i.e. reference point (for effectuating tripping action) and ref F can be about 100 Hz in accordance with a preferred implementation of the present disclosure.
[0041] FIG. 3 illustrates exemplary flowchart 300 for input line loss protection for LV drive in accordance to an embodiment of the present disclosure. In an aspect, the present disclosure provides a method for a mechanism for input line phase loss for LV drive, the method can include the steps of: (i) (at step 302) performing, by a DC calculation stage (DCS) of a control mechanism (CM) 115, RMS calculation by taking into account one or more ADC samples of DC link Voltage (VDC) so as to ascertain VDC ripple voltage (delta DC) 117 and VDC ripple frequency (delta F) 119; and (ii) (at step 304) triggering, by a threshold triggering stage (TTS) of the CM 115, a shut down operation for any of the delta DC 117 and the delta F 119 crossing a pre-set values of reference voltage (ref DC) and reference frequency (ref F), wherein the TSS is configured to compare the values of the delta DC and the delta F with the pre-set values. Further, the method can comprise, (at step 306) warning to a human machine interface (HMI) in case of the shut down operation for the input line phase loss.
[0042] In an aspect, flowchart 300 for input line loss protection for LV drive can follow an iterative process, as would be evident to a person having knowledge in the relevant art, so as to check and/or compare values of delta DC and/or delta F with ref DC and/or ref F at regular intervals of time (pre-fixed from design or any other considerations) in order to ensure healthy working of the LV drive.
[0043] In an aspect, step of triggering shut down operation can be performed by a logic circuit of TTS, wherein the logic circuit can disable delivery of switching pulses to an inverter 105 operatively configured with CM 115.
[0044] FIG. 4 illustrates exemplary waveforms for input rectifier current and DC link voltage ripple, without phase loss, for LV drive in accordance to an embodiment of the present disclosure.
[0045] In an aspect, ref F for a 50Hz, 400V system with the ripple frequency (delta F) about 300Hz in healthy condition is about 100Hz for the phase loss event.
[0046] FIG. 5 illustrates exemplary waveforms for input rectifier current and DC link voltage ripple, with phase loss, for LV drive in accordance to an embodiment of the present disclosure.
[0047] In an aspect, mechanism of the present disclosure provides a two-level trip protection, on account of both voltage amplitude and frequency thresholds being utilized for enhanced protection.
[0048] Thus, the present disclosure provides a mechanism to check input line loss/phase loss for LV drives that works while relying on minimum or no external hardware, and increases productivity, while resulting in an overall reduction in the cost of maintenance and implementation losses.
[0049] While the foregoing describes various embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof. The scope of the invention is determined by the claims that follow. The invention is not limited to the described embodiments, versions or examples, which are included to enable a person having ordinary skill in the art to make and use the invention when combined with information and knowledge available to the person having ordinary skill in the art.
ADVANTAGES OF THE INVENTION
[0050] The present disclosure provides a simple, efficient mechanism that obviates performance and operational issues encountered with conventional line loss protection systems.
[0051] The present disclosure provides a mechanism to detect input line phase loss for LV drive with minimum or no additional hardware costs.
[0052] The present disclosure obviates need of sensor(s) for line loss detection for LV drives mainly from economic and operational point of view.
[0053] The present disclosure provides enhanced life and damage-free working of LV drives by timely action for events related to line phase loss.
| # | Name | Date |
|---|---|---|
| 1 | 201721011266-FER.pdf | 2019-10-28 |
| 1 | Form 5 [29-03-2017(online)].pdf | 2017-03-29 |
| 2 | Form 3 [29-03-2017(online)].pdf | 2017-03-29 |
| 2 | Abstract1.jpg | 2018-08-11 |
| 3 | Form 18 [29-03-2017(online)].pdf_129.pdf | 2017-03-29 |
| 3 | 201721011266-ORIGINAL UNDER RULE 6 (1A)-10-07-2017.pdf | 2017-07-10 |
| 4 | PROOF OF RIGHT [05-07-2017(online)].pdf | 2017-07-05 |
| 4 | Form 18 [29-03-2017(online)].pdf | 2017-03-29 |
| 5 | Drawing [29-03-2017(online)].pdf | 2017-03-29 |
| 5 | Form 26 [29-06-2017(online)].pdf | 2017-06-29 |
| 6 | Description(Complete) [29-03-2017(online)].pdf | 2017-03-29 |
| 6 | Description(Complete) [29-03-2017(online)].pdf_128.pdf | 2017-03-29 |
| 7 | Description(Complete) [29-03-2017(online)].pdf | 2017-03-29 |
| 7 | Description(Complete) [29-03-2017(online)].pdf_128.pdf | 2017-03-29 |
| 8 | Drawing [29-03-2017(online)].pdf | 2017-03-29 |
| 8 | Form 26 [29-06-2017(online)].pdf | 2017-06-29 |
| 9 | Form 18 [29-03-2017(online)].pdf | 2017-03-29 |
| 9 | PROOF OF RIGHT [05-07-2017(online)].pdf | 2017-07-05 |
| 10 | Form 18 [29-03-2017(online)].pdf_129.pdf | 2017-03-29 |
| 10 | 201721011266-ORIGINAL UNDER RULE 6 (1A)-10-07-2017.pdf | 2017-07-10 |
| 11 | Form 3 [29-03-2017(online)].pdf | 2017-03-29 |
| 11 | Abstract1.jpg | 2018-08-11 |
| 12 | Form 5 [29-03-2017(online)].pdf | 2017-03-29 |
| 12 | 201721011266-FER.pdf | 2019-10-28 |
| 1 | 2019-10-2516-41-47_25-10-2019.pdf |