Description: FIELD

The present disclosure generally relates to the field of electronics. More particularly, some embodiments of the invention generally relate to memory latency management.

BACKGROUND

Some memory systems may be implemented using local, fast-access memory which is frequently embodied as a volatile memory and which may function as a cache memory and one or more remote memory devices which may comprise nonvolatile memory, e.g., e.g., phase change memory, NAND memory or the like or even magnetic or optical memory.

Remote memory devices have higher latency than local cache memory, which negatively affects system performance. Accordingly, techniques to improve latency may find utility.

BRIEF DESCRIPTION OF THE DRAWINGS

The detailed description is provided with reference to the accompanying figures. In the figures, the left-most digit(s) of a reference number identifies the figure in which the reference number first appears. The use of the same reference numbers in different figures indicates similar or identical items.

Fig. 1 is a schematic, block diagram illustration of components of apparatus to implement memory latency management in accordance with various embodiments discussed herein.

Fig. 2 is a flowchart illustrating operations in a method to implement memory latency management in accordance with various embodiments discussed herein.

Figs. 3-5 are schematic illustrations of time lines depicting operations in a method implement memory latency management in accordance with various embodiments discussed herein.

Figs. 6-10 are schematic, block diagram illustrations of electronic devices which may be adapted to implement memory latency management in accordance with various embodiments discussed herein.

DETAILED DESCRIPTION

Some memory systems may be implemented using local, fast-access memory which is frequently embodied as a volatile memory and which may function as a cache memory and one or more remote memory devices which may comprise nonvolatile memory, e.g., dynamic random access memory or even magnetic or optical memory. By way of example, remote memory devices may comprise one or more direct in-line memory modules (DIMMs), each of which may comprise one or more memory ranks which in turn may comprise one or more Dynamic Random Access Memory (DRAM) chips or may include nonvolatile memory, e.g., phase change memory, NAND memory or the like. Some electronic devices (e.g., smart phones, , C , Claims: 1. An electronic device, comprising:
a central processing unit (CPU) package (100), further comprising:
a processor (110);
a local memory (130);
a memory interface (124); and
an integrated memory controller (122), further comprising logic to:
receive (210) a request for data from the processor;
send (215) the request for the data from the integrated memory controller to a remote controller (142) of a remote nonvolatile memory device (140);
receive (270), at the integrated memory controller, the data from the remote controller of the remote non-volatile memory device;
store the data in the local memory on the CPU package;
receive (270) an error correction code indicator associated with the data;
determine (275) that the error correction code indicator indicates that the data retrieved from the remote controller was error free; and
in response to the determination that the data was error free, send (285) the data from the local memory to the processor.