METHOD AND APPARATUS OF ADAPTIVELY CANCELING A FUNDAMENTAL FREQUENCY OF AN ANALOG SIGNAL BACKGROUND Field The disclosed concept pertains generally to filters and, more particularly, to filters for removing a fundamental frequency from an analog signal, such as, for example, a motor current The disclosed concept also pertains to methods of removing a fundamental frequency from an analog signal. The disclosed concept further pertains to systems for removing a fundamental frequency from an analog signal. Background Information In many situations, current components indicative of system faults are of a much smaller magnitude than the magnitude of a line frequency component. When implemented on low-cost digital signal processors, the performance of fault detection algorithms is significantly impaired by the loss of resolution of such current components after the anaiog-to-digital conversion (ADC) process. This problem can be alleviated by removing the line frequency component prior to ADC and by utilizing the full dynamic range of the ADC for the current components indicative of system faults. Known conventional techniques involving the removal of sinusoidal components often utilize notch filters set at the particular frequency of interest. However, these notch filters, in addition to canceling the desired frequency component, often remove or attenuate signal components of interest that are sufficiently close to the desired frequency. This is primarily due to the fact that the supply frequency from the utility can vary from the nominal value (e.g., without limitation, 50 Hz; 60 Hz). The conventional filters also cannot be used in applications where variable frequency motor drives are employed. There is room for improvement in filters for removing a fundamental frequency from an analog signal. There is also room for improvement in methods of removing a fundamental frequency from an analog signal. There is further room for improvement in systems for removing a fundamental frequency from an analog signal. SUMMARY These needs and others are met by embodiments of the disclosed concept, which provide a high-resolution, fundamental frequency cancellation apparatus and method. In accordance with one aspect of the disclosed concept, a system comprises: a first powered apparatus including a first analog signal having a fundamental frequency; and a second apparatus structured to provide load diagnostics or power quality assessment of the first powered apparatus from a second digital signal, the second apparatus comprising: an input structured to input the first analog signal, an output structured to output the second digital signal, a processor, an adaptive filter routine executed by the processor, a digital-to-analog converter comprising an input and an output, and an analog-to-digital converter comprising an input and an output, wherein the adaptive filter routine is structured to output a third digital signal as a function of the second digital signal and a plurality of adaptive weights, wherein the digital-to-analog converter is structured to input the third digital signal and output a fourth analog signal representative of an estimate of a fundamental frequency component of the first analog signal, and wherein the analog-to-digital converter is structured to input a fifth analog signal, which is a difference between the first analog signal and the fourth analog signal, and output the second digital signal representative of the first analog signal with the fundamental frequency component removed. The second apparatus may be a fundamental frequency cancellation apparatus; and the adaptive filter routine may be structured to cancel the fundamental frequency from the first analog signal without corrupting spectral content proximate the fundamental frequency. The first powered apparatus may be a motor; the fundamental frequency may be a line frequency; and the first analog signal may be supply current to the motor. The first powered apparatus may receive power; the fundamental frequency may be a line frequency; the first analog signal may be supply current to the first powered apparatus; and the second apparatus may be a power sensing apparatus structured to sense power from the supply current to the first powered apparatus. The function may be a gain value times a difference between the first analog signal and the fourth analog signal. As another aspect of the disclosed concept, a method of canceling a fundamental frequency from an analog signal comprises: inputting a first analog signal from a powered apparatus; outputting a second digital signal; employing a digital-to-analog converter comprising an input and an output; employing an analog- to-digital converter comprising an input and an output; outputting a third digital signal from an adaptive filter as a function of the second digital signal and a plurality of adaptive weights; inputting the third digital signal to and outputting a fourth analog signal representative of an estimate of a fundamental frequency component of the first analog signal from the digital-to-analog converter; inputting a fifth analog signal to the analog-to-digital converter and outputting from the analog-to-digital converter the second digital signal representative of the first analog signal with the fundamental frequency component removed; providing the fifth analog signal as a function of a difference between the first analog signal and the fourth analog signal; and providing load diagnostics or power quality assessment of the powered apparatus from the second digital signal. As another aspect of the disclosed concept, a system comprises; a first apparatus including a first analog signal having a fundamental frequency; and a second apparatus comprising: an input structured to input the first analog signal, an output structured to output a second digital signal, a processor, a routine executed by the processor, a digital-to-analog converter (DAC) comprising an input, an output and a delay between the input and the output of the digital-to-analog converter, and an analog-to-digital converter (ADC) comprising an input, an output and a delay between the input and the output of the analog-to-digital converter, wherein the digital-to- analog converter is structured to input a third digital signal and output a fourth analog signal representative of an estimate of a fundamental frequency component of the first analog signal, wherein the analog-to-digital converter is structured to input a fifth analog signal and output the second digital signal representative of the first analog signal with the fundamental frequency component removed, wherein the routine is structured to provide the third digital signal being y(n) = ws(n)*sin(co0n) + wc(n)*cos(o)0n), wherein the routine is further structured to provide a first adaptive weight being ws(n) = Ws(n -1) + \xch(n - l)xs(n - A -1), wherein the routine is further structured to provide-a second adaptive weight being wc(n) = wc(n - 1) + ykh(& - l)xc(n - A -1), wherein co0 is frequency of the fundamental frequency component, wherein n is an integer representative of a sample number, wherein p,c is a positive constant, wherein lF(n - 1) is the second digital signal for the sample number represented by n -1, wherein xs(n - A -1) = sin(©0(n - A - I)), wherein xc(n - A -1) = cos(©0(n - A - 1)), wherein A is a sum of the delay of the analog-to-digital converter and the delay of the digital-to-analog converter, and wherein the routine is further structured to provide the fifth analog signal being a function of a difference between the first analog signal and the fourth analog signal. As another aspect of the disclosed concept, a fundamental frequency cancellation filter comprises: a processor comprising: an input structured to input a first analog signal, an output structured to output a second digital signal, a routine, a digital-to-analog converter comprising an input, an output and a delay between the input and the output of the digital-to-analog converter, and an analog-to-digital converter comprising an input, an output and a delay between the input and the output of the analog-to-digital converter, the digital-to-analog converter is structured to input a third digital signal and output a fourth analog signal representative of an estimate of a fundamental frequency component of the first analog signal, wherein the analog-to- digital converter is structured to input a fifth analog signal and output the second digital signal representative of the first analog signal with the fundamental frequency component removed, wherein the routine is structured to provide the third digital signal being y(n) = ws(n)*sin(©on) + wc(n)*cos(©0n), wherein the routine is further structured to provide a first adaptive weight being ws(n) - ws(n -1) + ficIp(n - l)xs(n - A - 1), wherein the routine is further structured to provide a second adaptive weight being wc(n) = wc(n -1) + p.cIF(n - l)xc(n - A -1), wherein ©0 is frequency of the fundamental frequency component, wherein n is an integer representative of a sample number, wherein p,c is a positive constant, wherein Ip(n - 1) is the second digital signal for the sample number represented by n — 1, wherein xs(n - A - 1) = sin(©0(n - A -1)), wherein xc(n - A - 1) = cos(co0(n - A - 1)), wherein A is a sum of the delay of the analog-to-digital converter and the delay of the digital-to-analog converter, and wherein the routine is further structured to provide the fifth analog signal being a function of a difference between the first analog signal and the fourth analog signal The routine may be further structured to scale xs(n) by the first adaptive weight and to scale xc(n) by the second adaptive weight to provide the third digital signal. As another aspect of the disclosed concept, a method cancels a fundamental frequency from an analog signal. The method comprises: inputting a first analog signal; outputting a second digital signal; employing a digital-to-analog converter comprising an input and an output; employing an analog-to-digital converter comprising an input and an output; inputting a third digital signal to and outputting a fourth analog signal representative of an estimate of a fundamental frequency component of the first analog signal from the digital-to-analog converter; inputting a fifth analog signal to the anaiog-to-digital converter and outputting from the anaiog-to-digital converter the second digital signal representative of the first analog signal with the fundamental frequency component removed; providing a first adaptive filter weight, ws(n), and a second adaptive filter weight, wc(n); providing a first digital sine signal, xs(n) = sin(©0n)» and a second digital cosine signal, xc(n) = eos(©0n); providing the third digital signal being y(n) = ws(n)*sin(o0n) + wc(n)*cos(©0n); employing eo0 as frequency of the fundamental frequency component; employing n as an integer representative of a sample number; and providing the fifth analog signal as a function of a difference between the first analog signal and the fourth analog signal. The method may further comprise providing an optimum value of the first adaptive filter weight as being ws = (A / Goac(<»o))cos(0a - 0oac(g>o)); providing an optimum value of the second adaptive filter weight as being wc* = (A / GDAc(G>o))sino) as phase of the transfer function of the digital-to-analog converter at the frequency of the fundamental frequency component. BRIEF DESCRIPTION OF THE DRAWINGS A full understanding of the disclosed concept can be gained from the following description of the preferred embodiments when read in conjunction with the accompanying drawings in which: Figure 1 is a block diagram of a fundamental frequency cancellation filter in accordance with embodiments of the disclosed concept. Figure 2 is a block diagram of a simplified fundamental frequency cancellation filter in accordance with another embodiment of the disclosed concept. Figure 3 is a block diagram in schematic form of a system including the fundamental frequency cancellation filter of Figure 1. DESCRIPTION OF THE PREFERRED EMBODIMENTS As employed herein, the term "number" shall mean one or an integer greater than one (i.e., a plurality). As employed herein, the term "processor" means a programmable analog and/or digital device that can store, retrieve, and process data; a computer; a workstation; a personal computer; a digital signal processor (DSP); a microprocessor; a microcontroller; a microcomputer; a central processing unit; a mainframe computer; a mini-computer; a server; a networked processor; or any suitable processing device or apparatus. The disclosed concept is described in association with an adaptive filter implemented by a digital signal processor (DSP) to remove a line frequency of a line current from a motor supply current of a motor, although the disclosed concept is applicable to a wide range of processors to remove a fundamental frequency of an analog signal of a wide range of apparatus. Referring to Figure I, the cancellation of a fundamental frequency, to0, can be achieved through the use of an adaptive filter 2 comprising two adaptive weights 4,6. H 8 is an estimate (in the digital domain) of an unknown analog domain transfer function, Hs (not shown). The Hs analog domain transfer function can be considered to exist between an analog-to-digital converter (ADC) 10 and an optional gain function (G) 12. The optional gain function (G) 12 can be disposed after a difference 14 between analog signal I(t) 16 and analog signal I0est(t) 18. Here, t is the time portion of an analog signal. Analog signal I(t) 16 represents, for example and without limitation, analog motor supply current. A digital-to-analog converter (DAC) 20 and the ADC 10 represent respective digital-to-analog conversion and analog-to- digital conversion processes on a suitable processor, such as the example digital signal processor (DSP) 22 of Figure 3. The adaptive filter weights are ws(n) 4 and wc(n) 6, where n is a sample number of a digital domain signal or value. The two inputs to the filter, signal xs(n) 24 and signal xc(n) 26, are respective digital sine and digital cosine signals with a frequency equal to the fundamental frequency of analog signal I(t) 16, co0, given by xs(n) = sin(o0n) and xc(n) = cos(co0n), respectively. The noise-free sinusoidal signals 24,26 are typically unavailable and can be generated on the example DSP 22 (Figure 3). These signals 24,26 can be efficiently computed using a conventional coupled-form digital oscillator (not shown) based on an estimate of the fundamental frequency (or by using a look-up table (not shown) or by any other suitable method). The digital oscillator can be implemented using a pair of recursive equations: xs(n) = [sin(©0)]xc(n-l) + [cos(co0)]xs(n-l), and Xc(n) = [cos(co0)]xc(n-1) - [sin(co0)]xs(n-1). The recursive generation employs the initial conditions: Xs(-l) = -sin(©0), an(i xc(-l) = cos(a>o). The basic operation of the adaptive filter 2 is as follows. The inputs 24,26 are scaled by the respective adaptive weights 4,6 and are combined to form the signal y(n) 28 as shown by Equation 1. y(n) = ws(n)*sin(©0n) + wc(n)*cos(co0n) (Eq. 1) The signal y(n) 28 is converted by the DAC 20 providing the analog signal, I0est(t) 18, that is an estimate of the fundamental frequency component of analog signal I(t) 16, which can be, for example and without limitation, a motor supply current. The estimate I0est(t) 18 is subtracted from the analog signal I(t) 16 to produce an example current signal 30 with the fundamental frequency component removed. This example current signal 30, which can be amplified by the gain function (G) 12, is digitized by the ADC 10 to produce a digital output signal Ip(n) 32, and which can be further processed by the DSP 22 (Figure 3) for fault detection purposes. For example, the digital output signal Ip(n) 32 can also be employed as an error or correction signal to adapt the filter weights 4,6. The cancellation of the fundamental frequency component occurs when the filter weights 4,6 are set such that the filter output, y(n) 28, consists of a sinusoid with magnitude and phase exactly equal to magnitude and phase of the fundamental frequency component of analog signal I(t) 16. The weight values resulting in optimal cancellation are derived as follows. The fundamental frequency component, I0(t), of the example analog signal I(t) 16 is defined by Equation 2. Io(t) = A sin(co0t + 0a) (Eq.2) wherein: A is a constant; 0a is phase. Using Equation 1, the estimated fundamental frequency component I0est(t) 18 is given by Equation 2. I0est(t) = GDAc(o>o)ws{t)sin(e)0t + 9Dac(©q)) + GDAc(©0)wc(t)cos((o0t + eDAc(t0o)) (Eq. 3) wherein: Gdac(Co) and 9dacOo) are the respective magnitude and phase of the DAC transfer function at frequency, co = co0, ws(t) is the time domain equivalent of the digital domain adaptive weight ws(n) 4, and wc(t) is the time domain equivalent of the digital domain adaptive weight wc(n) 6. In Equations 1 and 3, the optimum weight values are adjusted to their optimum values using a filtered least-mean-square (Filtered-X LMS as is defined, below, after Equation 5) algorithm, and simplified in some of the following equations. In a typical setup, the input to the LMS algorithm (Equations 4A and 4B, below) is labeled 'x' and "filtered-x" refers to the fact that you need to filter the input, or 'x', before using it to update the adaptive weights. In Equations 2 and 3, the discrete time index, n, is replaced by the continuous time variable, t, since these components are after the DAC 20 and, therefore, are analog signals. If the fundamental frequency component I0(t) of the example supply current is represented in the equivalent form: I0(t) = Asin([©0t + eDAc(G>o)J + [6a - 0dac(©o)]X then by using trigonometric identities it can be expressed as: I0(t) = Acos(0A - 0DAc(©o))sin{fflot + 6dac(g>0)) + Asin(8A - eDAc(t»o))cos((D0t + 9dac(cd0)). Therefore, applying Equation 3, the optimum weight values resulting in cancellation of the fundamental frequency component I0(t) are: ws* = (A / GDAc(©o))cos(eA - eDAc(©o)), and wc* = (A / GDAc(G>0))sin(eA - ©dacC«>o)). The magnitude and phase can be represented directly in terms of the filter weights 4,6 by: 9A = tan"'(wc* / ws*) + 0dac(g>o). Since the magnitude and phase of I0(t) are not known and may vary over time, the filter weights 4,6 can be adapted according to a conventional least- mean-square (LMS) algorithm. The LMS algorithm is a stochastic gradient-based algorithm where the updated value of the filter weights 4,6 at time n + 1 are computed using the recursive relations: (Eq.4A) (Eq. 4B) wherein: fi is a positive step-size constant that controls the size of the incremental correction applied to the weight at each iteration; J(n) is the squared-error signal at time n given by J(n) = |IF(n)|2; and dJ(n)/dws(n) and 5J(n)/dwc(n) are the partial derivatives of the squared-error signal J(n) with respect to the filter weight ws(n) and wc(n), respectively. The update rule for the filter weight, ws, is derived as follows. First, Ip(n) 32 can be expressed using Equations 2 and 3 as follows: IF(n) = GADc(c0o)Asm(G)on + 0a + SadcOo)) - GADc(o)o)GDAc(©o)ws(n)sin({o0n + OdacOo) + 0adc(©o)) - GADc(tOo)GDAc(co0)wc(n)cos((»0n + 9Dac(g>o) + 6adc(«0)) wherein: Gadc(©o) and 8adc(<»o) are the respective magnitude and phase of the transfer function of ADC 10 at frequency co = co0. The partial derivative of J(n) with respect to ws(n) equals 5J(n)/5ws(n) = 2IF(n)(dIF(n)/aws(n)) = -2IF(n)GADc(cOo)GDAc(G>o)sm(a>0n + 0dac(g><>) + 6adc(©0)) Therefore, the update rule for ws(n) 4 is given by Equation 5. ws(n + 1) = ws(n) + p.GADc(0))cos(8a - Qdac(Wo)); providing an optimum value of the second adaptive filter weight as being wc* = (A / GDAc(©o))sin(8A - ©dacOo)); employing 0A = tan" (wc / ws) + 9DAc(a>0); employing Gdac(©o) as magnitude of a transfer function of the digital-to-analog converter at the frequency of the fundamental frequency component; and employing 9dac(g>o) as phase of the transfer function of the digital-to-analog converter at the frequency of the fundamental frequency component. 10. The method of Claim 8 further comprising: determining the first adaptive filter weight, ws(n), as being equal to ws(n - 1) + uGADc(©o)GDAc(cDo)lF(n - l)sin(co0(n - 1) + eDAc(»o) + 6adc(co0)); determining the second adaptive filter weight, wc(n), as being equal to wc(n -1) + uGADc(roo)GDAc(cOo)lF(n - l)sin(a>0(n - 1) + OdacOo) + 8adc(g>0)); employing Gdac(*»0) as gam of said digital-to-analog converter versus the frequency of the fundamental frequency component; employing Gadc(«o) as gain of said analog-to-digital converter versus the frequency of the fundamental frequency component; employing Odac(©0) as phase of said digital-to-analog converter versus the frequency of the fundamental frequency component; employing 6Adc(co0) as phase of said analog-to-digital converter versus the frequency of the fundamental frequency component; and employing |j. as a positive constant. 11. The method of Claim 8 further comprising: providing said function as being a gain value (12) times said difference. 12. The method of Claim 8 further comprising: employing DAC(co) as a transfer function of the digital-to- analog converter as a function of frequency, co, of the fundamental frequency component; employing ADC(co) as a transfer function of the analog-to- digital converter as a function of the frequency of the fundamental frequency component; employing said digital-to-analog converter and said analog-to- digital converter having a uniform gain and a linear phase over a predetermined range of frequencies; setting DAC(co) = GDAce~Jaw; setting ADC(co) = GADce~jpw; employing Gdac as the uniform gain of said digital-to-analog converter; employing Gadc as the uniform gain of said analog-to-digital converter; employing a as a delay between the input and the output of the digital-to-analog converter; employing P as a delay between the input and the output of the analog-to-digital converter; employing [i as a positive constant; employing [ic = [iGADCGDAC; providing ws(n) = ws(n - 1) + (J,clp(n - l)xs(n - A -1); and providing wc(n) = wc(n - 1) + u^n - l)xc(n - A -1). 13. The method of Claim 12 further comprising: providing the first adaptive filter weight, ws(n), being equal to ws(n - 1) + u.cIF(n " l)xs(n - A - 1); providing the second adaptive filter weight, wc(n), being equal to wc(n - 1) + u.elF(n - l)xc(n - A - 1); employing u.c as a positive constant; employing Ip(n - 1) as the second digital signal for the sample number being n - 1; employing xs(n - A - 1) = sin(co0(n - A - 1)); employing xc(n - A - 1) = cos(co0(n - A - 1)); employing A as a sum of a delay (a) between the input and the output of the digital-to-analog converter and a delay (p) between the input and the output of the analog-to-digital converter; and providing the fifth analog signal as a function of a difference between the first analog signal and the fourth analog signal. 14. The method of Claim 8 further comprising: updating the first and second adaptive weights employing a recursive least squares (RLS) algorithm. 15. The method of Claim 8 further comprising: employing a motor current (16) as said first analog signal; and employing a line frequency (?o) as the frequency of the fundamental frequency component. A system (40) includes a first powered apparatus (42) having a first analog signal (16) with a fundamental frequency (?o); and a second apparatus (44) providing load diagnostics or power quality assessment of the first apparatus (42) from a second digital signal (If(n)). The second apparatus (44) includes an input (46) of the first analog signal, an output (48) of the second digital signal (If(n)), a processor (22), an adaptive filter (50) executed by the processor, a digital-to-analog converter (20), and an analog-to-digital converter (10). The adaptive filter routine outputs a third digital signal (y(n)) as a function of the second digital signal (If(n)) and plural adaptive weights (4,6). The digital-to-analog converter inputs the third digital signal (y(n)) and outputs a fourth analog signal (Ioest(t)) representative of an estimate of a fundamental frequency component (Io(t)) of the first analog signal (16). The analog-to-digital converter inputs a difference (I(t) - Ioest(t)) between the first and the fourth analog signals (Ioest(t)), and outputs the second digital signal (If(n)) representative of the first analog signal with the fundamental frequency component removed.