1. A method of synchronizing power converter signals with grid signals, comprising: receiving, by a sync unit, a grid signal from a grid connected to a power converter and, internal impedances of the power converter; determining, by the sync unit, a sync signal based on a fundamental frequency of the grid signal, wherein the sync signal comprises a phase (f) determined based on a phase difference (?) between the grid signal and the sync signal, and a phase delay (fd) determined using the internal impedances of the power converter, wherein the sync signal is synchronized with a positive sequence component of the fundamental frequency of the grid signal, wherein the power converter is operated according to the sync signal to synchronize power converter signals with the grid signal.

2. The method as claimed in claim 1, wherein the fundamental frequency of the grid signal is isolated from harmonic frequencies in the grid signal based on low order harmonic frequencies present in grid voltage.

3. The method as claimed in claim 1, further comprising determining a power to be transferred to the power converter using the grid signal and the sync signal.

4. The method as claimed in claim 3, wherein until the power to be transferred to the power converter is less than a power threshold, the method further comprises: adjusting the phase (f) of the sync signal; and determining the power to be transferred to the power converter using the grid signal and the sync signal having the adjusted phase.

5. The method as claimed in claim 1, wherein the phase (f) of the sync signal is determined using a relationship f = ? + fd+ 1.5Ts(Rad), wherein 1.5Ts is a delay caused due to hardware components in the power and Ts is the sampling interval.

6. The method as claimed in claim 1, wherein the phase delay (fd) is determined using a relationship fd = 1/ (1 + ?), wherein ? is a delay caused in the power converter due to the internal impedances.

7. The method as claimed in claim 1, further comprising providing the determined sync signal to a Phase Locked Loop (PLL) circuit for verifying whether the phase of the sync signal matches the phase of the grid signal, wherein the PLL has a constant gain, wherein the sync signal is generated by and provided to the power converter after the phase of the sync signal is verified.

8. A sync unit synchronizing power converter signals with grid signals, comprising: an input interface configured to receive a grid signal from a grid connected to a power converter and, internal impedances of the power converter; and a processor configured to determine a sync signal based on a fundamental frequency of the grid signal, wherein a phase (f) of the sync signal is determined based on a phase difference (?) between the grid signal and the sync signal and a phase delay (fd) determined using the internal impedances of the power converter, wherein the sync signal is synchronized with a positive sequence component of the fundamental frequency of the grid signal, wherein the power converter is operated according to the sync signal to synchronize power converter signals with the grid signal.

9. The sync unit as claimed in claim 8, wherein the processor is further configured to isolate the fundamental frequency of the grid signal from harmonic frequencies in the grid signal based on the low order harmonic frequencies present in grid voltage.

10. The sync unit as claimed in claim 8, wherein the processor is further configured to determine a power to be transferred to the power converter using the grid signal and the sync signal.

11. The sync unit as claimed in claim 10, wherein until the power to be transferred to the power converter is less than a power threshold, the processor is further configured to: adjust the phase (f) of the sync signal; and determine the power to be transferred to the power converter using the grid signal and the sync signal having the adjusted phase.

12. The sync unit as claimed in claim 8, wherein the processor is configured to determine the phase (f) of the sync signal using a relationship f = ? + fd + 1.5Ts(Rad), wherein 1.5Ts is a delay caused due to hardware components in the power and Ts is the sampling interval.

13. The sync unit as claimed in claim 8, wherein the processor is configured determine the phase delay (fd) using a relationship ? = 1/ (1 + ?), wherein ? is a delay caused in the power converter due to the internal impedances.

14. The sync unit as claimed in claim 8, wherein the processor is configured to provide the determined sync signal to a Phase Locked Loop (PLL) circuit for verifying whether the phase of the sync signal matches the phase of the grid signal, wherein the PLL has a constant gain, wherein the sync signal is generated by and provided to the power converter after the phase of the sync signal is verified.

15. An Uninterruptible Power Supply (UPS) system comprising: a power converter connected to a grid; and a Digital Signal Processor (DSP) comprising a sync unit as claimed in any of the claims 8-14. Date: R Ramya Rao, INPA-1607 Of K&S Partners Agent for the Applicant , Description:FORM 2 THE PATENTS ACT 1970 [39 OF 1970] & THE PATENTS RULES, 2003 COMPLETE SPECIFICATION [See section 10 and Rule 13] TITLE: “METHOD AND DEVICE FOR SYNCHRONIZING POWER CONVERTER SIGNALS WITH GRID SIGNAL” Name and Address of the Applicant: HITACHI LTD, 6-6, Marunouchi 1-chome, Chiyoda-ku, Tokyo, Japan Nationality: Japan The following specification particularly describes the invention and the manner in which it is to be performed. TECHNICAL FIELD [001] The present disclosure relates to grid connected converter system. More particularly, the present disclosure relates to method and device for synchronizing power converter signals with grid signals. BACKGROUND [002] Uninterrupted Power Supply (UPS) systems are essential in various fields ranging from home computer systems to industrial systems. Nowadays, the UPS system is not only used to provide power backup, but is also used to regulate the power fluctuations during power supply to load from a grid. Hence, even when the grid is operational, the grid signals are provided to the load via the UPS system. It is essential for the UPS system to sync with the grid for proper operation of a grid connected power rectifier (converter) unit of the UPS system. Various techniques are developed conventionally to effectively match the power converter modulating signals with the grid signal. [003] Currently due to presence of increased power electronics based non-linear loads in industries, the quality of grid is degraded. This poses a great challenge to the operation of grid connected converter (present in the UPS). Often, crossover distortions occur in grid signals due to fast switching of the non-linear loads. When the grid has a large length of zero crossover distortion, it becomes difficult to for the UPS to maintain the sync between converter and the grid. The loss of sync generates a large current peak through the power converter, which disconnects the power converter connection with the grid. Further, the large current peaks damages the converter power devices. Hence, there is a need for a power converter system that generates signals in sync with the grid signals even in case of zero crossover distortions. The information disclosed in this background of the disclosure section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art. SUMMARY [004] In an embodiment, the present disclosure relates to a method of synchronizing power converter signals with grid signals. The method comprises receiving, by a sync unit, a grid signal from a grid connected to a power converter and, internal impedances of the power converter. Further, the method comprises determining a sync signal based on a positive sequence of a fundamental frequency of the grid signal. The sync signal comprises a phase (f) determined based on a phase difference (?) between the grid signal and the sync signal, and a phase delay (fd) determined using the internal impedances of the power converter. The sync signal is synchronized with a positive sequence component of the fundamental frequency of the grid signal, and the power converter is operated according to the sync signal to synchronize power converter signals with the grid signal. [005] In an embodiment, the present disclosure relates to a sync unit comprising an input interface and a processor. The input interface is configured to receive a grid signal from a grid connected to a power converter and internal impedances of the power converter. The processor is configured to determine a sync signal based on a positive sequence of a fundamental frequency of the grid signal. The sync signal comprises a phase (f) determined based on a phase difference (?) between the grid signal and the sync signal, and a phase delay (fd) determined using the internal impedances of the power converter. The sync signal is synchronized with a positive sequence component of the fundamental frequency of the grid signal, and the power converter is operated according to the sync signal to synchronize power converter signals with the grid signal. [006] The foregoing summary is illustrative only and is not intended to be in any way limiting. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description. BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS [007] The novel features and characteristic of the disclosure are set forth in the appended claims. The disclosure itself, however, as well as a preferred mode of use, further objectives and advantages thereof, will best be understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying figures. One or more embodiments are now described, by way of example only, with reference to the accompanying figures wherein like reference numerals represent like elements and in which: [008] Fig. 1 shows an exemplary diagram of a UPS connected to a grid for synchronizing power converter signals with grid signals, in accordance with some embodiments of the present disclosure; [009] Fig. 2 shows an exemplified block diagram of a sync unit for synchronizing power converter signals with grid signals, in accordance with some embodiments of the present disclosure; [0010] Fig. 3 shows an exemplary flow chart illustrating method steps for synchronizing power converter signals with grid signals, in accordance with some embodiments of the present disclosure; [0011] Fig. 4 shows an exemplary flow chart illustrating method steps for adjusting phase of sync signals for synchronizing power converter signals with grid signals, in accordance with some embodiments of the present disclosure; [0012] Fig. 5 shows an illustration of crossover distortions in grid signals, in accordance with embodiments of the present disclosure; and [0013] Fig. 6A shows a graph illustrating converter current value by implementing conventional solutions; and [0014] Fig. 6B shows an exemplary graph illustrating converter current value by implementing proposed solution in presence of crossover distortions in grid signals, in accordance with embodiments of the present disclosure. [0015] It should be appreciated by those skilled in the art that any block diagrams herein represent conceptual views of illustrative systems embodying the principles of the present subject matter. Similarly, it will be appreciated that any flow charts, flow diagrams, state transition diagrams, pseudo code, and the like represent various processes which may be substantially represented in computer readable medium and executed by a computer or processor, whether or not such computer or processor is explicitly shown. DETAILED DESCRIPTION [0016] In the present document, the word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment or implementation of the present subject matter described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. [0017] While the disclosure is susceptible to various modifications and alternative forms, specific embodiment thereof has been shown by way of example in the drawings and will be described in detail below. It should be understood, however that it is not intended to limit the disclosure to the particular forms disclosed, but on the contrary, the disclosure is to cover all modifications, equivalents, and alternative falling within the scope of the disclosure. [0018] The terms “comprises”, “comprising”, or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a setup, device or method that comprises a list of components or steps does not include only those components or steps but may include other components or steps not expressly listed or inherent to such setup or device or method. In other words, one or more elements in a system or apparatus proceeded by “comprises… a” does not, without more constraints, preclude the existence of other elements or additional elements in the system or apparatus. [0019] Few existing systems have proposed using internal impedance of power converter of Uninterrupted Power Supply (UPS) system and grid impedance to calculate phase of sync signals to match grid signals. However, such systems are dependent on grid impedance to calculate accurate phase values of the sync signals. Further, such systems suffer losses in phase calculation due to the effect of harmonics present in the grid signals. Further, a Phase Locked Loop (PLL) gain is varied to match phase. Hence, the existing systems are complex for the reasons that grid impedance is not readily available and repeated calculation of PLL gain leads to increased processing. [0020] Embodiments of the present disclosure relate to a method and a device for synchronizing power converter signals with grid signals. The power converter may be a part of an Uninterrupted Power Supply (UPS) system. A sync unit associated with the power converter receives grid signals from a grid, and internal impedances of the power converter. Further, the sync unit determines initial sync signals based on positive sequence component of fundamental frequencies of the grid signals. The phase of the initial sync signal is calculated based on a phase difference between the grid signal and the sync signal, and a phase delay determined using the internal impedances of the power converter. Therefore, the proposed method is not based on grid impedance, and also the sync signal is in phase with the grid signal as harmonics are removed from the grid signal while calculating the phase of the sync signal. Therefore, current spikes are reduced, and the UPS system is operational throughout. [0021] Fig. 1 shows an exemplary diagram of an Uninterrupted Power Supply (UPS) system (100) connected to a grid for synchronizing power converter signals with grid signals. As shown, the UPS system (100) comprises a power converter (101), and a DSP controller (102). A person skilled in the art will appreciate that UPS system (100) comprises other parts (e.g., A2D converter, battery) which are not shown in the Fig.1. The parts shown in the Fig. 1 are only to illustrate the proposed invention and Fig. 1 should not be considered as a limitation. The Fig. 1 also shows a grid terminal which is connected to the grid (not shown), a grid impedance (Lg), internal impedances (L1, L2), a capacitor (Cf) and a capacitor (C). The DSP controller (102) comprises a Pulse Width Modulator (PWM) (103), a converter closed loop control (104) and sync unit (105). The sync unit (105) receives a grid signal from the grid terminal. The sync unit (105) may receive digital signal of the grid signal from an analog-to-digital converter (not shown). The sync unit (105) determines a sync signal having a phase, frequency and amplitude which matches the grid signal. When the phase, and frequency of the sync signal matches the grid signal, the sync signal is synchronized with the grid signal. The synchronized sync signal is provided to the controller closed loop control (104) for determining a modulation scheme for the synchronized sync signal. The sync signal along with modulation scheme details are provided to the PWM (103). The PWM (103) generates the sync signal in the determined modulation scheme and provides the generated sync signal to the power converter (101). The power converter (103) may convert the digital signal to analog signal and power a load (not shown). The determination of the sync signal is descried further in the present disclosure. [0022] Fig. 2 shows an exemplified block diagram of the sync unit (105) for synchronizing power converter signals with grid signals. The sync unit (105) comprises, a harmonic frequency eliminator (201), a fundamental frequency extractor (202), a positive sequence calculator (203), a power calculator (204), a phase delay calculator (205), a phase adjuster (206), a sync signal determinator (207) and a Phase Locked Loop (PLL) circuit (208). The components of the sync unit (105) may be specific circuitry having a combination of software and hardware modules. In an embodiment, the modules of the sync unit (105) may be part of a memory (not shown) and may be executed by a processor (not shown). The memory and the processor may reside inside the sync unit (105). In an embodiment, the processor may be a general purpose processor or a specific processor designed to perform the functions of the sync unit (105). For example, the processor may be a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), a System on Chip (SoC) a Digital Signal Processor (DSP), or a microcontroller. It will be appreciated that any electronic device capable of performing the functions of the modules are covered under the meaning of processor. In an embodiment, the sync unit (105) comprises an input interface to receive inputs. [0023] In an embodiment, the harmonic frequency eliminator (201) receives the grid signal from the grid terminal. Harmonics are sinusoids of the fundamental frequency. Hence, more amount of processing is required to match phase and frequency of the sync signal with the grid signal due to the presence of harmonics in the grid signal. The harmonic frequency eliminator (202) eliminates harmonic frequencies from the grid signal. In an embodiment, the harmonic frequency eliminator (202) may use frequency elimination filters to eliminate the harmonic frequencies. For example, the harmonic frequency eliminator (201) may be implemented as Second Order Generalized Integrator (SOGI) to eliminate the harmonics from the grid signal. In an embodiment, the harmonic frequency eliminator (201) may be implemented as a notch filter, a moving average based digital filter, and the like. [0024] In an embodiment, the fundamental frequency extractor (201) receives the grid signal. The fundamental frequency extractor (201) extracts fundamental frequency from the grid signal. In an embodiment, the fundamental frequency is the main (dominant) frequency of the grid signal having a lowest frequency value. In an embodiment, a spectrum is generated using Fourier Transform. Further, the fundamental frequency extractor (201) determines a periodic wave and identifies a frequency of highest amplitude. The frequency of the determined wave is considered as the fundamental frequency of the grid signal. [0025] In an embodiment, the positive sequence calculator (203) receives the fundamental frequency of the grid signal from the fundamental frequency extractor (201). The positive sequence calculator calculates the positive sequence component from the fundamental frequency. The positive sequence components may have positive values of the sinusoidal waveform. For example, a spectrum of the fundamental frequency is used to determine the negative sequence components and positive sequence components. The positive sequence components are extracted from the spectrum rejecting the negative sequence components, as the phase of the fundamental frequency can be determined using one of the positive or negative sequence components. In an embodiment, the positive sequence components can be rejected and the negative sequence components are extracted. [0026] In an embodiment, the power calculator (204) calculates power transferred from the grid to the UPS (100). In an embodiment, the power transferred from the grid to the UPS (100) is calculated using the grid signal and the sync signal. Particularly, a phase difference between the sync signal and the grid signal is determined by the power calculator (204). The phase difference is used to calculate the transferred power. Further, the power calculator verifies if the calculated power is below a threshold value. The verification is performed to safeguard the load and the UPS (100) from high power surge caused due to crossover distortions in the grid. Typically, when crossover distortions occur in the grid signal, current spikes occur and the UPS (100) and /or the power converter (101) power devices may be destroyed. Hence, the verification ensures that the transferred power is always below the threshold value and ensures safety to the load. When the transferred power is more than the threshold value, phase of the sync signal is adjusted such that the transferred power reduces below the threshold value. In an embodiment, the threshold value may be determined based on rating parameters of the power converter (101). [0027] In an embodiment, the phase delay calculator (205) calculates a phase delay in the sync signal using the internal impedances (L1 and L2) of the power converter (101). The phase delay calculator (205) may receive the internal impedances (L1 and L2) via a user interface (not shown). For example, an operator may input the internal impedances (L1 and L2) into the user interface. The phase delay in the sync signal is used to reduce the phase difference between the sync signal and the grid signal. [0028] In an embodiment, the phase adjuster (206) receives the phase difference between the sync signal and the grid signal from the power calculator (204). Also, the phase adjuster (206) receives the phase delay from the phase delay calculator (205). Using the phase difference and the phase delay, the phase adjuster (206) adjusts the phase of the sync signal such that the transferred power is less than the threshold value. When a new phase for the sync signal is calculated by the phase adjuster (206), the new phase is provided to the power calculator (204) to verify if the power is less than the threshold value. When the transferred power is less than the threshold value, corresponding phase of the sync signal is selected as the suitable phase of the sync signal. [0029] In an embodiment, the sync signal determinator (207) determines the sync signal with the selected phase. The determined sync signal has a phase value such that, when there is crossover distortion in the grid signal, the power of the sync signal is below the threshold value. [0030] In an embodiment, the PLL (208) receives the sync signal with the selected phase and compares the sync signal with the grid signal. The PLL (208) is used to verify if the phase and frequency of the sync signal matches with the phase and frequency of the grid signal respectively. The PLL (208) may loop the verification step, and the PLL (208) may lock the loop when the phase and frequency of the sync signal matches the phase and frequency of the grid signal. Further, the PLL (208) determines a grid synchronized signal once the phase and frequency of the sync signal are matched with the phase and frequency of the grid signal. The grid synchronized signal is provided to the converter closed loop control (104), which determines a modulating scheme, and thereafter, the PWM (103) generates a modulated grid synchronized signal. [0031] Fig. 3 shows an exemplary flow chart illustrating method steps for synchronizing power converter signals with grid signals. As illustrated in Fig. 3, the method (300) may comprise one or more steps. The method (300) may be described in the general context of computer executable instructions. Generally, computer executable instructions can include routines, programs, objects, components, data structures, procedures, modules, and functions, which perform particular functions or implement particular abstract data types. [0032] The order in which the method (300) is described is not intended to be construed as a limitation, and any number of the described method blocks can be combined in any order to implement the method. Additionally, individual blocks may be deleted from the methods without departing from the scope of the subject matter described herein. Furthermore, the method can be implemented in any suitable hardware, software, firmware, or combination thereof. [0033] At step (301), the harmonic frequency eliminator (201) receives the grid signal from the grid terminal and the phase delay calculator (205) receives the power converter impedances (L1 and L2) via the user interface. In an embodiment, the harmonic frequency eliminator (201) may receive a digitized sample of the grid signal. In an embodiment, the harmonic frequency eliminator (201) eliminates low order harmonics from the grid signal. The low order harmonics may affect phase matching of the sync signal with the grid signal. Hence, elimination of the low order harmonics from the grid signal enables better phase matching of the sync signal with the grid signal. In an embodiment, the harmonic frequency eliminator (201) may determine a spectrum of the frequencies in the grid signal. As described previously, the harmonics are sinusoids of the fundamental frequency. For example, if the fundamental frequency is 50Hz, the harmonics may be 100Hz, 150z, 200Hz and the like. The harmonic frequency eliminator (201) may use filters such as sine filters and cosine filters to remove the sinusoids. Therefore, the fundamental frequency is isolated from the harmonic frequencies in the grid signal. [0034] In an embodiment, the grid signal void of the harmonic frequencies comprises fundamental frequency and noise. The fundamental frequency extractor (202) extracts the fundamental frequency from the grid signal. In an embodiment, the fundamental frequency extractor (202) may determine a frequency spectrum of the grid signal and identify periodic waveform having frequency corresponding to highest amplitude. In an embodiment, the fundamental frequency extractor (202) may use Fast Fourier Transform (FFT) or Discrete Fourier Transform (DFT) to determine the fundamental frequency from the grid signal. [0035] In an embodiment, the positive sequence calculator (203) calculates the positive sequence components of the fundamental frequency. In an embodiment, the positive sequence components as phase of the grid signal can be determined using only positive sequence components. [0036] In an embodiment, the sync signal is generated based on the positive sequence components of the grid signal. In an embodiment, the sync signal is out of phase from the grid signal. In an embodiment, the grid signal may be denoted as E1 = VmSin (?t1) and the sync signal may be denoted as E2 = VmSin (?t2), where ? is the frequency (? = 2pf) of the signal in radian/second and t is the time in seconds. [0037] In an embodiment, the phase delay (fd) is determined using the internal impedances (L1 and L2) of the power converter (101). The internal impedances (L1 and L2) may be input in the user interface by the operator. In an embodiment, the user interface may be provided on a surface of the UPS (100). The phase delay is calculated using equation 1: (fd) = 1 / 1+ ? (1) where, ? = phase delay caused by L-C filter (L1, L2 and Cf) in the power converter (101). [0038] In an embodiment, the power calculator (204) calculates the power transferred from the grid to the UPS (100) using the grid signal (E1) and the sync signal (E2). The transferred power is calculated using equation 2: P = E1E2Sin (?) (2) where, ? = ?t2 ~ ?t1. The phase difference (?) is used to calculate the transferred power. Further, the power calculator verifies if the calculated power is below a threshold value. When the transferred power is more than the threshold value, phase of the sync signal is adjusted such that the transferred power reduces below the threshold value. In an embodiment, the threshold value may be determined based on rating parameters of the power converter (101). [0039] Reference is now made to Fig. 4 showing an exemplary flow chart illustrating method steps for adjusting phase of sync signals for synchronizing power converter signals with grid signals. [0040] At step (401), the phase adjuster (206) receives the phase difference (?) from the power calculator (204). Also, the phase adjuster (206) receives the phase delay (fd) from the phase delay calculator (205). Using the phase difference (?) and the phase delay (fd), the phase adjuster (206) adjusts the phase (f) of the sync signal such that the transferred power is less than the threshold value. In an embodiment, the phase (f) of the sync signal is determined using equation 3: f = ? + fd + 1.5Ts(Rad) (3) where, 1.5Ts is a delay caused due to hardware and software components in the power converter (101) and Ts is the sampling interval. [0041] At step (402), the power calculator (204) calculates the power (P) of the sync signal having the adjusted phase (f). When the transferred power (P) is less than the threshold value, corresponding phase value of the sync signal is selected as the suitable phase (f) of the sync signal. [0042] Referring back to the Fig. 3, at step (302), the sync signal generator (207) determines the sync signal based on the selected phase (f). The determined sync signal has a phase value such that, when there is crossover distortion in the grid signal, the power of the sync signal is below the threshold value. [0043] In an embodiment, the PLL (208) receives the sync signal with the selected phase and compares the sync signal with the grid signal. The PLL (208) is used to verify if the phase and frequency of the sync signal matches with the phase and frequency of the grid signal. The PLL (208) may loop the verification step, and the PLL (208) may lock the loop when the phase and frequency of the sync signal matches the phase and frequency of the grid signal. Further, the PLL (208) determines a grid synchronized signal once the phase and frequency of the sync signal matches the phase and frequency of the grid signal. The grid synchronized signal is provided to the converter closed loop control (104), which determines a modulating scheme, and thereafter, the PWM (103) generates a modulated grid synchronized signal. Reference is now made to Fig. 5 showing the waveform illustrating the crossover distortion. As shown in the Fig. 5, the red curve shows the distorted grid signal and the green curve shows the modulated waveform. As seen, the modulated waveform has a smooth curve even when the grid signal has crossover distortions. [0044] Fig. 6A shows the converter current value by implementing conventional solutions. In the graph, the blue waveform represents converter current, the yellow waveform represents grid voltage and the pink waveform represents threshold current value. When the crossover distortion in the grid voltage is more than 20 degrees, the conventional methods fail and the converter current increases beyond the threshold current value, therefore destroying components of the power converter (101) and disconnecting load connected to the power converter (101). The increased converter current value is identified by the circle in the Fig. 6A. [0045] Fig. 6B shows an exemplary graph illustrating converter current value by implementing proposed solution in presence of crossover distortions in grid signals. As indicated by the circle in the Fig. 6B, the converter current value is well under the threshold current value for the crossover distortions above 20 degrees. In an embodiment, the converter current value stays below the threshold current value for crossover distortions up to 40 degrees. As a result, even when crossover distortions occur above 20 degrees in the grid voltage, the converter current value remains below the threshold voltage, thus protecting the power converter (101) and powering the load. [0046] In an embodiment, the PLL (208) receives the sync signal with the selected phase (f) and compares the sync signal with the grid signal. The PLL (208) is used to verify if the phase and frequency of the sync signal matches with the frequency and phase of the grid signal. The PLL (208) may loop the verification step, and the PLL (208) may lock the loop when the phase and frequency of the sync signal matches the phase and frequency of the grid signal. Further, the PLL (208) determines a grid synchronized signal once the using the matched phase and frequency. The grid synchronized signal is provided to the converter closed loop control (104), which determines a modulating scheme, and thereafter, the PWM (103) generates a modulated grid synchronized signal. [0047] In an embodiment, the proposed invention is not dependent on the grid impedance (Lg). Further, the proposed invention enables the sync signal to have the phase (f) close to the phase of the grid signal even during crossover distortions, as harmonic frequencies are removed from the grid signal. [0048] The terms "an embodiment", "embodiment", "embodiments", "the embodiment", "the embodiments", "one or more embodiments", "some embodiments", and "one embodiment" mean "one or more (but not all) embodiments of the invention(s)" unless expressly specified otherwise. [0049] The terms "including", "comprising", “having” and variations thereof mean "including but not limited to", unless expressly specified otherwise. [0050] The enumerated listing of items does not imply that any or all of the items are mutually exclusive, unless expressly specified otherwise. The terms "a", "an" and "the" mean "one or more", unless expressly specified otherwise. [0051] A description of an embodiment with several components in communication with each other does not imply that all such components are required. On the contrary a variety of optional components are described to illustrate the wide variety of possible embodiments of the invention. [0052] When a single device or article is described herein, it will be readily apparent that more than one device/article (whether or not they cooperate) may be used in place of a single device/article. Similarly, where more than one device or article is described herein (whether or not they cooperate), it will be readily apparent that a single device/article may be used in place of the more than one device or article or a different number of devices/articles may be used instead of the shown number of devices or programs. The functionality and/or the features of a device may be alternatively embodied by one or more other devices which are not explicitly described as having such functionality/features. Thus, other embodiments of the invention need not include the device itself. [0053] The illustrated operations of Fig. 3 show certain events occurring in a certain order. In alternative embodiments, certain operations may be performed in a different order, modified or removed. Moreover, steps may be added to the above described logic and still conform to the described embodiments. Further, operations described herein may occur sequentially or certain operations may be processed in parallel. Yet further, operations may be performed by a single processing unit or by distributed processing units. [0054] Finally, the language used in the specification has been principally selected for readability and instructional purposes, and it may not have been selected to delineate or circumscribe the inventive subject matter. It is therefore intended that the scope of the invention be limited not by this detailed description, but rather by any claims that issue on an application based here on. Accordingly, the disclosure of the embodiments of the invention is intended to be illustrative, but not limiting, of the scope of the invention, which is set forth in the following claims. [0055] While various aspects and embodiments have been disclosed herein, other aspects and embodiments will be apparent to those skilled in the art. The various aspects and embodiments disclosed herein are for purposes of illustration and are not intended to be limiting, with the true scope being indicated by the following claims. Referral Numerals: 100 – UPS 101 – Power converter 102 – DSP controller 103 – PWM 104 – Converter closed loop control 105 – Sync unit 201 – Harmonic frequency eliminator 202 – Fundamental frequency extractor 203 – Positive sequence calculator 204 – Power calculator 205 – Phase delay calculator 206 – Phase adjuster 207 – Sync signal determinator 208 - PLL

Claims:We claim:

1. A method of synchronizing power converter signals with grid signals, comprising:
receiving, by a sync unit, a grid signal from a grid connected to a power converter and, internal impedances of the power converter;
determining, by the sync unit, a sync signal based on a fundamental frequency of the grid signal, wherein the sync signal comprises a phase (f) determined based on a phase difference (?) between the grid signal and the sync signal, and a phase delay (fd) determined using the internal impedances of the power converter, wherein the sync signal is synchronized with a positive sequence component of the fundamental frequency of the grid signal, wherein the power converter is operated according to the sync signal to synchronize power converter signals with the grid signal.

2. The method as claimed in claim 1, wherein the fundamental frequency of the grid signal is isolated from harmonic frequencies in the grid signal based on low order harmonic frequencies present in grid voltage.

3. The method as claimed in claim 1, further comprising determining a power to be transferred to the power converter using the grid signal and the sync signal.

4. The method as claimed in claim 3, wherein until the power to be transferred to the power converter is less than a power threshold, the method further comprises:
adjusting the phase (f) of the sync signal; and
determining the power to be transferred to the power converter using the grid signal and the sync signal having the adjusted phase.

5. The method as claimed in claim 1, wherein the phase (f) of the sync signal is determined using a relationship f = ? + fd+ 1.5Ts(Rad), wherein 1.5Ts is a delay caused due to hardware components in the power and Ts is the sampling interval.

6. The method as claimed in claim 1, wherein the phase delay (fd) is determined using a relationship fd = 1/ (1 + ?), wherein ? is a delay caused in the power converter due to the internal impedances.

7. The method as claimed in claim 1, further comprising providing the determined sync signal to a Phase Locked Loop (PLL) circuit for verifying whether the phase of the sync signal matches the phase of the grid signal, wherein the PLL has a constant gain, wherein the sync signal is generated by and provided to the power converter after the phase of the sync signal is verified.

8. A sync unit synchronizing power converter signals with grid signals, comprising:
an input interface configured to receive a grid signal from a grid connected to a power converter and, internal impedances of the power converter; and
a processor configured to determine a sync signal based on a fundamental frequency of the grid signal, wherein a phase (f) of the sync signal is determined based on a phase difference (?) between the grid signal and the sync signal and a phase delay (fd) determined using the internal impedances of the power converter, wherein the sync signal is synchronized with a positive sequence component of the fundamental frequency of the grid signal, wherein the power converter is operated according to the sync signal to synchronize power converter signals with the grid signal.

9. The sync unit as claimed in claim 8, wherein the processor is further configured to isolate the fundamental frequency of the grid signal from harmonic frequencies in the grid signal based on the low order harmonic frequencies present in grid voltage.

10. The sync unit as claimed in claim 8, wherein the processor is further configured to determine a power to be transferred to the power converter using the grid signal and the sync signal.

11. The sync unit as claimed in claim 10, wherein until the power to be transferred to the power converter is less than a power threshold, the processor is further configured to:
adjust the phase (f) of the sync signal; and
determine the power to be transferred to the power converter using the grid signal and the sync signal having the adjusted phase.

12. The sync unit as claimed in claim 8, wherein the processor is configured to determine the phase (f) of the sync signal using a relationship f = ? + fd + 1.5Ts(Rad), wherein 1.5Ts is a delay caused due to hardware components in the power and Ts is the sampling interval.

13. The sync unit as claimed in claim 8, wherein the processor is configured determine the phase delay (fd) using a relationship ? = 1/ (1 + ?), wherein ? is a delay caused in the power converter due to the internal impedances.

14. The sync unit as claimed in claim 8, wherein the processor is configured to provide the determined sync signal to a Phase Locked Loop (PLL) circuit for verifying whether the phase of the sync signal matches the phase of the grid signal, wherein the PLL has a constant gain, wherein the sync signal is generated by and provided to the power converter after the phase of the sync signal is verified.

15. An Uninterruptible Power Supply (UPS) system comprising:
a power converter connected to a grid; and
a Digital Signal Processor (DSP) comprising a sync unit as claimed in any of the claims 8-14.

Date:
R Ramya Rao, INPA-1607
Of K&S Partners
Agent for the Applicant
, Description:FORM 2
THE PATENTS ACT 1970
[39 OF 1970]
&
THE PATENTS RULES, 2003

COMPLETE SPECIFICATION
[See section 10 and Rule 13]

TITLE: “METHOD AND DEVICE FOR SYNCHRONIZING POWER CONVERTER SIGNALS WITH GRID SIGNAL”

Name and Address of the Applicant: HITACHI LTD, 6-6, Marunouchi 1-chome, Chiyoda-ku, Tokyo, Japan

Nationality: Japan

The following specification particularly describes the invention and the manner in which it is to be performed.

TECHNICAL FIELD
[001] The present disclosure relates to grid connected converter system. More particularly, the present disclosure relates to method and device for synchronizing power converter signals with grid signals.

BACKGROUND
[002] Uninterrupted Power Supply (UPS) systems are essential in various fields ranging from home computer systems to industrial systems. Nowadays, the UPS system is not only used to provide power backup, but is also used to regulate the power fluctuations during power supply to load from a grid. Hence, even when the grid is operational, the grid signals are provided to the load via the UPS system. It is essential for the UPS system to sync with the grid for proper operation of a grid connected power rectifier (converter) unit of the UPS system. Various techniques are developed conventionally to effectively match the power converter modulating signals with the grid signal.

[003] Currently due to presence of increased power electronics based non-linear loads in industries, the quality of grid is degraded. This poses a great challenge to the operation of grid connected converter (present in the UPS). Often, crossover distortions occur in grid signals due to fast switching of the non-linear loads. When the grid has a large length of zero crossover distortion, it becomes difficult to for the UPS to maintain the sync between converter and the grid. The loss of sync generates a large current peak through the power converter, which disconnects the power converter connection with the grid. Further, the large current peaks damages the converter power devices. Hence, there is a need for a power converter system that generates signals in sync with the grid signals even in case of zero crossover distortions.

The information disclosed in this background of the disclosure section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.

SUMMARY
[004] In an embodiment, the present disclosure relates to a method of synchronizing power converter signals with grid signals. The method comprises receiving, by a sync unit, a grid signal from a grid connected to a power converter and, internal impedances of the power converter. Further, the method comprises determining a sync signal based on a positive sequence of a fundamental frequency of the grid signal. The sync signal comprises a phase (f) determined based on a phase difference (?) between the grid signal and the sync signal, and a phase delay (fd) determined using the internal impedances of the power converter. The sync signal is synchronized with a positive sequence component of the fundamental frequency of the grid signal, and the power converter is operated according to the sync signal to synchronize power converter signals with the grid signal.

[005] In an embodiment, the present disclosure relates to a sync unit comprising an input interface and a processor. The input interface is configured to receive a grid signal from a grid connected to a power converter and internal impedances of the power converter. The processor is configured to determine a sync signal based on a positive sequence of a fundamental frequency of the grid signal. The sync signal comprises a phase (f) determined based on a phase difference (?) between the grid signal and the sync signal, and a phase delay (fd) determined using the internal impedances of the power converter. The sync signal is synchronized with a positive sequence component of the fundamental frequency of the grid signal, and the power converter is operated according to the sync signal to synchronize power converter signals with the grid signal.

[006] The foregoing summary is illustrative only and is not intended to be in any way limiting. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description.

BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS
[007] The novel features and characteristic of the disclosure are set forth in the appended claims. The disclosure itself, however, as well as a preferred mode of use, further objectives and advantages thereof, will best be understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying figures. One or more embodiments are now described, by way of example only, with reference to the accompanying figures wherein like reference numerals represent like elements and in which:

[008] Fig. 1 shows an exemplary diagram of a UPS connected to a grid for synchronizing power converter signals with grid signals, in accordance with some embodiments of the present disclosure;

[009] Fig. 2 shows an exemplified block diagram of a sync unit for synchronizing power converter signals with grid signals, in accordance with some embodiments of the present disclosure;

[0010] Fig. 3 shows an exemplary flow chart illustrating method steps for synchronizing power converter signals with grid signals, in accordance with some embodiments of the present disclosure;

[0011] Fig. 4 shows an exemplary flow chart illustrating method steps for adjusting phase of sync signals for synchronizing power converter signals with grid signals, in accordance with some embodiments of the present disclosure;

[0012] Fig. 5 shows an illustration of crossover distortions in grid signals, in accordance with embodiments of the present disclosure; and

[0013] Fig. 6A shows a graph illustrating converter current value by implementing conventional solutions; and

[0014] Fig. 6B shows an exemplary graph illustrating converter current value by implementing proposed solution in presence of crossover distortions in grid signals, in accordance with embodiments of the present disclosure.

[0015] It should be appreciated by those skilled in the art that any block diagrams herein represent conceptual views of illustrative systems embodying the principles of the present subject matter. Similarly, it will be appreciated that any flow charts, flow diagrams, state transition diagrams, pseudo code, and the like represent various processes which may be substantially represented in computer readable medium and executed by a computer or processor, whether or not such computer or processor is explicitly shown.

DETAILED DESCRIPTION
[0016] In the present document, the word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment or implementation of the present subject matter described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.

[0017] While the disclosure is susceptible to various modifications and alternative forms, specific embodiment thereof has been shown by way of example in the drawings and will be described in detail below. It should be understood, however that it is not intended to limit the disclosure to the particular forms disclosed, but on the contrary, the disclosure is to cover all modifications, equivalents, and alternative falling within the scope of the disclosure.

[0018] The terms “comprises”, “comprising”, or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a setup, device or method that comprises a list of components or steps does not include only those components or steps but may include other components or steps not expressly listed or inherent to such setup or device or method. In other words, one or more elements in a system or apparatus proceeded by “comprises… a” does not, without more constraints, preclude the existence of other elements or additional elements in the system or apparatus.

[0019] Few existing systems have proposed using internal impedance of power converter of Uninterrupted Power Supply (UPS) system and grid impedance to calculate phase of sync signals to match grid signals. However, such systems are dependent on grid impedance to calculate accurate phase values of the sync signals. Further, such systems suffer losses in phase calculation due to the effect of harmonics present in the grid signals. Further, a Phase Locked Loop (PLL) gain is varied to match phase. Hence, the existing systems are complex for the reasons that grid impedance is not readily available and repeated calculation of PLL gain leads to increased processing.

[0020] Embodiments of the present disclosure relate to a method and a device for synchronizing power converter signals with grid signals. The power converter may be a part of an Uninterrupted Power Supply (UPS) system. A sync unit associated with the power converter receives grid signals from a grid, and internal impedances of the power converter. Further, the sync unit determines initial sync signals based on positive sequence component of fundamental frequencies of the grid signals. The phase of the initial sync signal is calculated based on a phase difference between the grid signal and the sync signal, and a phase delay determined using the internal impedances of the power converter. Therefore, the proposed method is not based on grid impedance, and also the sync signal is in phase with the grid signal as harmonics are removed from the grid signal while calculating the phase of the sync signal. Therefore, current spikes are reduced, and the UPS system is operational throughout.

[0021] Fig. 1 shows an exemplary diagram of an Uninterrupted Power Supply (UPS) system (100) connected to a grid for synchronizing power converter signals with grid signals. As shown, the UPS system (100) comprises a power converter (101), and a DSP controller (102). A person skilled in the art will appreciate that UPS system (100) comprises other parts (e.g., A2D converter, battery) which are not shown in the Fig.1. The parts shown in the Fig. 1 are only to illustrate the proposed invention and Fig. 1 should not be considered as a limitation. The Fig. 1 also shows a grid terminal which is connected to the grid (not shown), a grid impedance (Lg), internal impedances (L1, L2), a capacitor (Cf) and a capacitor (C). The DSP controller (102) comprises a Pulse Width Modulator (PWM) (103), a converter closed loop control (104) and sync unit (105). The sync unit (105) receives a grid signal from the grid terminal. The sync unit (105) may receive digital signal of the grid signal from an analog-to-digital converter (not shown). The sync unit (105) determines a sync signal having a phase, frequency and amplitude which matches the grid signal. When the phase, and frequency of the sync signal matches the grid signal, the sync signal is synchronized with the grid signal. The synchronized sync signal is provided to the controller closed loop control (104) for determining a modulation scheme for the synchronized sync signal. The sync signal along with modulation scheme details are provided to the PWM (103). The PWM (103) generates the sync signal in the determined modulation scheme and provides the generated sync signal to the power converter (101). The power converter (103) may convert the digital signal to analog signal and power a load (not shown). The determination of the sync signal is descried further in the present disclosure.

[0022] Fig. 2 shows an exemplified block diagram of the sync unit (105) for synchronizing power converter signals with grid signals. The sync unit (105) comprises, a harmonic frequency eliminator (201), a fundamental frequency extractor (202), a positive sequence calculator (203), a power calculator (204), a phase delay calculator (205), a phase adjuster (206), a sync signal determinator (207) and a Phase Locked Loop (PLL) circuit (208). The components of the sync unit (105) may be specific circuitry having a combination of software and hardware modules. In an embodiment, the modules of the sync unit (105) may be part of a memory (not shown) and may be executed by a processor (not shown). The memory and the processor may reside inside the sync unit (105). In an embodiment, the processor may be a general purpose processor or a specific processor designed to perform the functions of the sync unit (105). For example, the processor may be a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), a System on Chip (SoC) a Digital Signal Processor (DSP), or a microcontroller. It will be appreciated that any electronic device capable of performing the functions of the modules are covered under the meaning of processor. In an embodiment, the sync unit (105) comprises an input interface to receive inputs.

[0023] In an embodiment, the harmonic frequency eliminator (201) receives the grid signal from the grid terminal. Harmonics are sinusoids of the fundamental frequency. Hence, more amount of processing is required to match phase and frequency of the sync signal with the grid signal due to the presence of harmonics in the grid signal. The harmonic frequency eliminator (202) eliminates harmonic frequencies from the grid signal. In an embodiment, the harmonic frequency eliminator (202) may use frequency elimination filters to eliminate the harmonic frequencies. For example, the harmonic frequency eliminator (201) may be implemented as Second Order Generalized Integrator (SOGI) to eliminate the harmonics from the grid signal. In an embodiment, the harmonic frequency eliminator (201) may be implemented as a notch filter, a moving average based digital filter, and the like.

[0024] In an embodiment, the fundamental frequency extractor (201) receives the grid signal. The fundamental frequency extractor (201) extracts fundamental frequency from the grid signal. In an embodiment, the fundamental frequency is the main (dominant) frequency of the grid signal having a lowest frequency value. In an embodiment, a spectrum is generated using Fourier Transform. Further, the fundamental frequency extractor (201) determines a periodic wave and identifies a frequency of highest amplitude. The frequency of the determined wave is considered as the fundamental frequency of the grid signal.

[0025] In an embodiment, the positive sequence calculator (203) receives the fundamental frequency of the grid signal from the fundamental frequency extractor (201). The positive sequence calculator calculates the positive sequence component from the fundamental frequency. The positive sequence components may have positive values of the sinusoidal waveform. For example, a spectrum of the fundamental frequency is used to determine the negative sequence components and positive sequence components. The positive sequence components are extracted from the spectrum rejecting the negative sequence components, as the phase of the fundamental frequency can be determined using one of the positive or negative sequence components. In an embodiment, the positive sequence components can be rejected and the negative sequence components are extracted.

[0026] In an embodiment, the power calculator (204) calculates power transferred from the grid to the UPS (100). In an embodiment, the power transferred from the grid to the UPS (100) is calculated using the grid signal and the sync signal. Particularly, a phase difference between the sync signal and the grid signal is determined by the power calculator (204). The phase difference is used to calculate the transferred power. Further, the power calculator verifies if the calculated power is below a threshold value. The verification is performed to safeguard the load and the UPS (100) from high power surge caused due to crossover distortions in the grid. Typically, when crossover distortions occur in the grid signal, current spikes occur and the UPS (100) and /or the power converter (101) power devices may be destroyed. Hence, the verification ensures that the transferred power is always below the threshold value and ensures safety to the load. When the transferred power is more than the threshold value, phase of the sync signal is adjusted such that the transferred power reduces below the threshold value. In an embodiment, the threshold value may be determined based on rating parameters of the power converter (101).

[0027] In an embodiment, the phase delay calculator (205) calculates a phase delay in the sync signal using the internal impedances (L1 and L2) of the power converter (101). The phase delay calculator (205) may receive the internal impedances (L1 and L2) via a user interface (not shown). For example, an operator may input the internal impedances (L1 and L2) into the user interface. The phase delay in the sync signal is used to reduce the phase difference between the sync signal and the grid signal.

[0028] In an embodiment, the phase adjuster (206) receives the phase difference between the sync signal and the grid signal from the power calculator (204). Also, the phase adjuster (206) receives the phase delay from the phase delay calculator (205). Using the phase difference and the phase delay, the phase adjuster (206) adjusts the phase of the sync signal such that the transferred power is less than the threshold value. When a new phase for the sync signal is calculated by the phase adjuster (206), the new phase is provided to the power calculator (204) to verify if the power is less than the threshold value. When the transferred power is less than the threshold value, corresponding phase of the sync signal is selected as the suitable phase of the sync signal.

[0029] In an embodiment, the sync signal determinator (207) determines the sync signal with the selected phase. The determined sync signal has a phase value such that, when there is crossover distortion in the grid signal, the power of the sync signal is below the threshold value.

[0030] In an embodiment, the PLL (208) receives the sync signal with the selected phase and compares the sync signal with the grid signal. The PLL (208) is used to verify if the phase and frequency of the sync signal matches with the phase and frequency of the grid signal respectively. The PLL (208) may loop the verification step, and the PLL (208) may lock the loop when the phase and frequency of the sync signal matches the phase and frequency of the grid signal. Further, the PLL (208) determines a grid synchronized signal once the phase and frequency of the sync signal are matched with the phase and frequency of the grid signal. The grid synchronized signal is provided to the converter closed loop control (104), which determines a modulating scheme, and thereafter, the PWM (103) generates a modulated grid synchronized signal.

[0031] Fig. 3 shows an exemplary flow chart illustrating method steps for synchronizing power converter signals with grid signals. As illustrated in Fig. 3, the method (300) may comprise one or more steps. The method (300) may be described in the general context of computer executable instructions. Generally, computer executable instructions can include routines, programs, objects, components, data structures, procedures, modules, and functions, which perform particular functions or implement particular abstract data types.

[0032] The order in which the method (300) is described is not intended to be construed as a limitation, and any number of the described method blocks can be combined in any order to implement the method. Additionally, individual blocks may be deleted from the methods without departing from the scope of the subject matter described herein. Furthermore, the method can be implemented in any suitable hardware, software, firmware, or combination thereof.

[0033] At step (301), the harmonic frequency eliminator (201) receives the grid signal from the grid terminal and the phase delay calculator (205) receives the power converter impedances (L1 and L2) via the user interface. In an embodiment, the harmonic frequency eliminator (201) may receive a digitized sample of the grid signal. In an embodiment, the harmonic frequency eliminator (201) eliminates low order harmonics from the grid signal. The low order harmonics may affect phase matching of the sync signal with the grid signal. Hence, elimination of the low order harmonics from the grid signal enables better phase matching of the sync signal with the grid signal. In an embodiment, the harmonic frequency eliminator (201) may determine a spectrum of the frequencies in the grid signal. As described previously, the harmonics are sinusoids of the fundamental frequency. For example, if the fundamental frequency is 50Hz, the harmonics may be 100Hz, 150z, 200Hz and the like. The harmonic frequency eliminator (201) may use filters such as sine filters and cosine filters to remove the sinusoids. Therefore, the fundamental frequency is isolated from the harmonic frequencies in the grid signal.

[0034] In an embodiment, the grid signal void of the harmonic frequencies comprises fundamental frequency and noise. The fundamental frequency extractor (202) extracts the fundamental frequency from the grid signal. In an embodiment, the fundamental frequency extractor (202) may determine a frequency spectrum of the grid signal and identify periodic waveform having frequency corresponding to highest amplitude. In an embodiment, the fundamental frequency extractor (202) may use Fast Fourier Transform (FFT) or Discrete Fourier Transform (DFT) to determine the fundamental frequency from the grid signal.

[0035] In an embodiment, the positive sequence calculator (203) calculates the positive sequence components of the fundamental frequency. In an embodiment, the positive sequence components as phase of the grid signal can be determined using only positive sequence components.

[0036] In an embodiment, the sync signal is generated based on the positive sequence components of the grid signal. In an embodiment, the sync signal is out of phase from the grid signal. In an embodiment, the grid signal may be denoted as E1 = VmSin (?t1) and the sync signal may be denoted as E2 = VmSin (?t2), where ? is the frequency (? = 2pf) of the signal in radian/second and t is the time in seconds.

[0037] In an embodiment, the phase delay (fd) is determined using the internal impedances (L1 and L2) of the power converter (101). The internal impedances (L1 and L2) may be input in the user interface by the operator. In an embodiment, the user interface may be provided on a surface of the UPS (100). The phase delay is calculated using equation 1:

(fd) = 1 / 1+ ? (1)

where,
? = phase delay caused by L-C filter (L1, L2 and Cf) in the power converter (101).

[0038] In an embodiment, the power calculator (204) calculates the power transferred from the grid to the UPS (100) using the grid signal (E1) and the sync signal (E2). The transferred power is calculated using equation 2:

P = E1E2Sin (?) (2)

where,
? = ?t2 ~ ?t1.
The phase difference (?) is used to calculate the transferred power. Further, the power calculator verifies if the calculated power is below a threshold value. When the transferred power is more than the threshold value, phase of the sync signal is adjusted such that the transferred power reduces below the threshold value. In an embodiment, the threshold value may be determined based on rating parameters of the power converter (101).

[0039] Reference is now made to Fig. 4 showing an exemplary flow chart illustrating method steps for adjusting phase of sync signals for synchronizing power converter signals with grid signals.

[0040] At step (401), the phase adjuster (206) receives the phase difference (?) from the power calculator (204). Also, the phase adjuster (206) receives the phase delay (fd) from the phase delay calculator (205). Using the phase difference (?) and the phase delay (fd), the phase adjuster (206) adjusts the phase (f) of the sync signal such that the transferred power is less than the threshold value. In an embodiment, the phase (f) of the sync signal is determined using equation 3:

f = ? + fd + 1.5Ts(Rad) (3)

where, 1.5Ts is a delay caused due to hardware and software components in the power converter (101) and Ts is the sampling interval.
[0041] At step (402), the power calculator (204) calculates the power (P) of the sync signal having the adjusted phase (f). When the transferred power (P) is less than the threshold value, corresponding phase value of the sync signal is selected as the suitable phase (f) of the sync signal.

[0042] Referring back to the Fig. 3, at step (302), the sync signal generator (207) determines the sync signal based on the selected phase (f). The determined sync signal has a phase value such that, when there is crossover distortion in the grid signal, the power of the sync signal is below the threshold value.

[0043] In an embodiment, the PLL (208) receives the sync signal with the selected phase and compares the sync signal with the grid signal. The PLL (208) is used to verify if the phase and frequency of the sync signal matches with the phase and frequency of the grid signal. The PLL (208) may loop the verification step, and the PLL (208) may lock the loop when the phase and frequency of the sync signal matches the phase and frequency of the grid signal. Further, the PLL (208) determines a grid synchronized signal once the phase and frequency of the sync signal matches the phase and frequency of the grid signal. The grid synchronized signal is provided to the converter closed loop control (104), which determines a modulating scheme, and thereafter, the PWM (103) generates a modulated grid synchronized signal. Reference is now made to Fig. 5 showing the waveform illustrating the crossover distortion. As shown in the Fig. 5, the red curve shows the distorted grid signal and the green curve shows the modulated waveform. As seen, the modulated waveform has a smooth curve even when the grid signal has crossover distortions.

[0044] Fig. 6A shows the converter current value by implementing conventional solutions. In the graph, the blue waveform represents converter current, the yellow waveform represents grid voltage and the pink waveform represents threshold current value. When the crossover distortion in the grid voltage is more than 20 degrees, the conventional methods fail and the converter current increases beyond the threshold current value, therefore destroying components of the power converter (101) and disconnecting load connected to the power converter (101). The increased converter current value is identified by the circle in the Fig. 6A.

[0045] Fig. 6B shows an exemplary graph illustrating converter current value by implementing proposed solution in presence of crossover distortions in grid signals. As indicated by the circle in the Fig. 6B, the converter current value is well under the threshold current value for the crossover distortions above 20 degrees. In an embodiment, the converter current value stays below the threshold current value for crossover distortions up to 40 degrees. As a result, even when crossover distortions occur above 20 degrees in the grid voltage, the converter current value remains below the threshold voltage, thus protecting the power converter (101) and powering the load.

[0046] In an embodiment, the PLL (208) receives the sync signal with the selected phase (f) and compares the sync signal with the grid signal. The PLL (208) is used to verify if the phase and frequency of the sync signal matches with the frequency and phase of the grid signal. The PLL (208) may loop the verification step, and the PLL (208) may lock the loop when the phase and frequency of the sync signal matches the phase and frequency of the grid signal. Further, the PLL (208) determines a grid synchronized signal once the using the matched phase and frequency. The grid synchronized signal is provided to the converter closed loop control (104), which determines a modulating scheme, and thereafter, the PWM (103) generates a modulated grid synchronized signal.

[0047] In an embodiment, the proposed invention is not dependent on the grid impedance (Lg). Further, the proposed invention enables the sync signal to have the phase (f) close to the phase of the grid signal even during crossover distortions, as harmonic frequencies are removed from the grid signal.

[0048] The terms "an embodiment", "embodiment", "embodiments", "the embodiment", "the embodiments", "one or more embodiments", "some embodiments", and "one embodiment" mean "one or more (but not all) embodiments of the invention(s)" unless expressly specified otherwise.

[0049] The terms "including", "comprising", “having” and variations thereof mean "including but not limited to", unless expressly specified otherwise.

[0050] The enumerated listing of items does not imply that any or all of the items are mutually exclusive, unless expressly specified otherwise. The terms "a", "an" and "the" mean "one or more", unless expressly specified otherwise.

[0051] A description of an embodiment with several components in communication with each other does not imply that all such components are required. On the contrary a variety of optional components are described to illustrate the wide variety of possible embodiments of the invention.

[0052] When a single device or article is described herein, it will be readily apparent that more than one device/article (whether or not they cooperate) may be used in place of a single device/article. Similarly, where more than one device or article is described herein (whether or not they cooperate), it will be readily apparent that a single device/article may be used in place of the more than one device or article or a different number of devices/articles may be used instead of the shown number of devices or programs. The functionality and/or the features of a device may be alternatively embodied by one or more other devices which are not explicitly described as having such functionality/features. Thus, other embodiments of the invention need not include the device itself.

[0053] The illustrated operations of Fig. 3 show certain events occurring in a certain order. In alternative embodiments, certain operations may be performed in a different order, modified or removed. Moreover, steps may be added to the above described logic and still conform to the described embodiments. Further, operations described herein may occur sequentially or certain operations may be processed in parallel. Yet further, operations may be performed by a single processing unit or by distributed processing units.

[0054] Finally, the language used in the specification has been principally selected for readability and instructional purposes, and it may not have been selected to delineate or circumscribe the inventive subject matter. It is therefore intended that the scope of the invention be limited not by this detailed description, but rather by any claims that issue on an application based here on. Accordingly, the disclosure of the embodiments of the invention is intended to be illustrative, but not limiting, of the scope of the invention, which is set forth in the following claims.

[0055] While various aspects and embodiments have been disclosed herein, other aspects and embodiments will be apparent to those skilled in the art. The various aspects and embodiments disclosed herein are for purposes of illustration and are not intended to be limiting, with the true scope being indicated by the following claims.

Referral Numerals:

100 – UPS
101 – Power converter
102 – DSP controller
103 – PWM
104 – Converter closed loop control
105 – Sync unit
201 – Harmonic frequency eliminator
202 – Fundamental frequency extractor
203 – Positive sequence calculator
204 – Power calculator
205 – Phase delay calculator
206 – Phase adjuster
207 – Sync signal determinator
208 - PLL