Description:TECHNICAL FIELD
[0001] The present disclosure relates to wireless communication and networks, and more specifically relates to methods and an open-radio unit (O-RU) for handling fault management in an open-radio access network (O-RAN).

BACKGROUND
[0002] FIG. 1 is a functional block diagram of an Open Radio Access Network (O-RAN) (100) for an open radio access network distributed unit (O-DU) assisted fault mitigation, according to prior art. The O-RAN (100) includes an O-DU (102), O-RU that has a field-programmable gate array (FPGA) (104), a digital and Small Signal Gain (SSG) board (106), and/or an antenna (108). The FPGA (104) is an integrated circuit designed to be configured by a customer or a designer after manufacturing. The FPGA (104) includes an array of programmable logic blocks, and a hierarchy of reconfigurable interconnects allowing blocks to be wired together. The programmable logic blocks can be configured to perform complex combinational functions, or act as simple logic gates like AND and XOR. The FPGA (104) provides a flexible, cost-effective and scalable platform for implementing digital radios in the O-RAN (100).
[0003] A Radio Unit (O-RU) (110) in the Open-Radio Access Network (O-RAN) (100) converts radio signals sent to and from the antenna (108) to a digital signal that is transmitted over a fronthaul (not shown) to the O-DU (102). In general, the O-DU (102) is a logical node hosting Radio link control (RLC)/Medium access control (MAC)/ High-PHY layers based on a lower layer functional split and supports O1, E2-du, F1-c, F1-u, Open Fronthaul Control, User, Synchronization Plane (OFH CUS–Plane) and Open Fronthaul Management Plane (OFH M-Plane) interfaces. The O-RU (110) is a logical node hosting the Low-PHY layer and RF (Radio Frequency) processing based on a lower layer functional split. This is similar to 3GPP’s “TRP (Transmission And Reception Point)” or “RRH (Remote Radio Head)” but more specific in including the Low-PHY layer (FFT/iFFT, PRACH (Physical Random Access Channel) extraction). The O-RU (110) utilizes the OFH CUS Plane and OFH M Plane interfaces.
[0004] Due to physical damage at an antenna port or a transmission line between the antenna (108) (e.g., RF antenna or the like) and the O-RU (110) or a loose connection coaxial cable at the antenna port, there can be a faulty situation at the O-RU (110). In order to avoid this, the O-RU (110) estimates a Voltage standing wave ratio (VSWR) at each O-RU port and detects a fault in each RF/ antenna port. The VSWR is defined as a ratio between transmitted and reflected voltage standing waves in a radio frequency (RF) electrical transmission system. The VSWR is a measure of how efficiently RF power is transmitted from the power source, through a transmission line, and into a load
[0005] Earlier, in the case of traditional radios, because of the absence of the FPGA (104)/baseband processing capability in the traditional radios (baseband unit (BBU) + Remote Radio Head (RRH) (aka “remote radio unit (RRU)”), the RRH used to report VSWR values to the baseband unit that is located separately In the case of O-RAN, O-RU (110) having FPGA (104)/baseband processing capability, just monitors VSWR values and reports these values to the O-DU (102). The O-DU (102) had to suggest an action to the O-RU (110) based on the reported VSWR values.
[0006] In the existing methods, the fault in each RF/antenna port at the O-RU (110)/antenna (108) is detected and necessary actions are taken by the following steps:
a) Estimation of the VSWR at each O-RU (110) port.
b) After a certain interval, the O-RU (110) will repeatedly monitor VSWR values and report the monitored VSWR values to the O-DU (102).
c) The O-DU (102) receives the monitored VSWR values from the O-RU (110) and the O-DU (102) takes an action upon comparing the monitored VSWR values and a predefined VSWR threshold value. The predefined VSWR threshold value is used for comparison by the O-DU (102) to confirm the presence of a fault in the O-RU (110). The predefined VSWR threshold is further used to aggressively detect and categorize the fault based on their severity to take corrective actions accordingly. In an example, the action can be a shutdown of a corresponding transmitter (TRx) chain or entire O-RU (110) upon observing very high VSWR to avoid damage to the O-RU (110).
[0007] In the case of traditional radios, the above actions are taken by the BBU as the traditional radios did not have the intelligence in it due to the absence of field-programmable gate array (FPGA) /Baseband processing. Moreover, in the O-RAN as well, till date, the O-RU (110) only monitors the VSWR values and is incapable to take the above actions. The above process takes a few milliseconds as the action is taken by the O-DU (102) through the O-RU (110), thereby introducing a delay in the action taken and may harm/damage the O-RU (110). In other words, a user or operator of the O-RU (110) switches on/boots-up the O-RU (110). The O-RU (110) gets connected with the O-DU (102) through the open fronthaul interface, which reads a capability and other information. Enhanced Common Public Radio Interface (eCPRI) frames/data come from the O-DU (102) to the O-RU (110) through an open fronthaul interface. The eCPRI is a way of splitting up the baseband functions to reduce traffic strain on an optical fiber.
[0008] The O-RU (110) decodes the data/ eCPRI frames and processes the data/ eCPRI frames to a corresponding RF transceiver chain. Further, the O-RU (110) performs measurement of forwarding and reflected signals at each RF/antenna port and computes the VSWR values with the help of a detector (not shown) and a comparator (not shown). Further, the computed VSWR values are reported to the O-DU (102) and an alarm is generated if a high VSWR value is reported (for example) and communicated from the O-RU (110) to the O-DU (102). Based on the above operations, the O-DU (102) takes the corrective action and communicates the corrective action to the O-RU (110).
[0009] In a nutshell, below is the possible reason for VSWR fault:
a) Physical damage at the antenna port or the transmission line between the antenna (108) and the O-RU (110),
b) Lose connection of a cable at the antenna port/antenna connector is not done/aligned properly,
c) Mishandling at the port level including human errors,
d) Mismatch at the antenna Port including operating environmental conditions like wind/pressure etc. (in other words, due to wind pressure or natural causes the antenna position changed in both horizontal and vertical directions),
e) Aging effect of devices or ports, where the aging effect leads to performance degradation in the underlying device, and the ultimate device failure,
f) Cable damage and/or connector damage,
g) PIM (passive intermodulation) due to blockage/object in front of the antenna especially on the urban site, and
h) Due to PIM from the near-by site or near-by cell or near-by sector, Tower.
[0010] Some of the prior art references are given below for handling fault management in the O-RAN (100):
[0011] WO2019069119A1 discloses a method for antenna fault detection in a transmitter system such as a radio unit. The radio unit compares VSWR estimates with a predefined threshold to detect a fault and generates an alarm if the fault is detected.
[0012] A non-patent literature entitled “VSWR Antenna Supervision” discloses the VSWR Antenna Supervision feature to detect faults in the antenna system and generates an alarm upon fault detection.
[0013] While the prior arts disclose various techniques for fault management in the ORAN (100), none of the prior art references discloses a self-fault mitigation technique present in a radio unit (e.g., O-RU) itself to take corrective action upon detecting a fault in the radio unit to prevent harm/damages to the O-RU.

OBJECT OF THE DISCLOSURE
[0014] A principal object of the present disclosure is to solve the aforesaid drawbacks and provide methods for fault management in an Open Radio Access Network (O-RAN) by adding additional capability with minimal resource requirements within an Open Radio Access Network Radio Unit (O-RU) to take a necessary action rapidly and locally upon detecting a fault in the O-RU.
[0015] Another object of the present disclosure is to prevent/mitigate the damage/functional defect of the O-RU and make the O-RAN more robust. Based on the proposed method, the O-RU becomes more efficient to act by itself to shut down the radio frequency (RF) chain and antenna port by switching the power supply off for a power amplifier board/not feeding the RF signal from a baseband board (FPGA) to save the O-RU from damage in a fast manner. The O-RU takes actions locally and reduces the reporting and processing time caused by the process involved while an Open Radio Access Network Distributed Unit (O-DU) assists the O-RU for the above actions.

SUMMARY
[0016] Accordingly, the present disclosure provides methods and an open radio unit (O-RU) for handling fault management in a disaggregated open-radio access network (O-RAN). The O-RU is part of the disaggregated O-RAN designed to perform lower physical layer and RF functions. The method includes detecting a fault at each radio frequency (RF) port of a plurality of RF ports. The fault is detected based on a comparison of a measured VSWR value with a VSWR threshold, where the VSWR threshold is defined/stored in a user-defined VSWR lookup table. In response to the detection, the method includes taking a corrective action based on the measured Voltage Standing Wave Ratio (VSWR) value to prevent damage in the O-RU. The corrective action taken by the O-RU is independent of an O-DU. Taking corrective action includes taking no action when the measured VSWR value corresponds to a good impedance matching condition, where the good impedance matching condition corresponds to the measured VSWR value between a first predefined value and a second predefined value. Alternatively, taking the corrective action includes raising a critical alarm and reporting to the O-DU when the measured VSWR value corresponds to a moderate impedance matching condition, where the moderate impedance matching condition corresponds to the measured VSWR value between a second predefined value and a third predefined value. Alternatively, taking the corrective action includes shutting down at least one of a radio frequency (RF) chain or the O-RU when the measured VSWR value corresponds to a worse impedance matching condition, where the worse impedance matching condition corresponds to the measured VSWR value above the third predefined value.
[0017] These and other aspects herein will be better appreciated and understood when considered in conjunction with the following description and the accompanying drawings. It should be understood, however, that the following descriptions are given by way of illustration and not of limitation. Many changes and modifications may be made within the scope of the invention herein without departing from the spirit thereof.

BRIEF DESCRIPTION OF FIGURES
[0018] The invention is illustrated in the accompanying drawings, throughout which like reference letters indicate corresponding parts in the drawings. The invention herein will be better understood from the following description with reference to the drawings, in which:
[0019] FIG. 1 is a functional block diagram of an Open Radio Access Network (O-RAN) for an O-DU assisted fault mitigation, according to the prior art.
[0020] FIG. 2 is a functional block diagram of the O-RAN depicting self-fault mitigation capability in an O-RU.
[0021] FIG. 3a to FIG. 3d illustrate an example of Radio Frequency Front End (RFFE) architecture in conjunction with FIG. 2.
[0022] FIG. 4 illustrates various hardware elements of the O-RU.
[0023] FIG. 5 is a flow chart illustrating a method of fault management in the O-RAN.
[0024] FIG. 6 is an example flow chart explaining fault detection and mitigation by the O-RU.

DETAILED DESCRIPTION
[0025] In the following detailed description of the invention, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be obvious to a person skilled in the art that the invention may be practiced with or without these specific details. In other instances, well known methods, procedures and components have not been described in details so as not to unnecessarily obscure aspects of the invention.
[0026] Furthermore, it will be clear that the invention is not limited to these alternatives only. Numerous modifications, changes, variations, substitutions and equivalents will be apparent to those skilled in the art, without parting from the scope of the invention.
[0027] The accompanying drawings are used to help easily understand various technical features and it should be understood that the alternatives presented herein are not limited by the accompanying drawings. As such, the present disclosure should be construed to extend to any alterations, equivalents and substitutes in addition to those which are particularly set out in the accompanying drawings. Although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are generally only used to distinguish one element from another.
[0028] The deficiencies in previous techniques (as discussed in the background section) can be solved by the proposed disclosure, where fault management in an Open Radio Access Network (O-RAN) can be performed by adding additional capability with minimal resource requirements within an Open Radio Unit (O-RU), where the O-RU can take a necessary action rapidly and locally upon detecting a fault in itself. Also, with the introduction of O-RAN compliant splits, FPGA/Baseband processing (Low PHY) is introduced in the O-RU, so that the required actions for fault management can be taken by the O-RU itself. The proposed method can be used to reduce processing time caused in an O-DU assisted mode. The proposed method does not require many FPGA resources and hence can be implemented without affecting other process/activities of the O-RU.
[0029] Now referring to the Figures, where FIG. 2 is a functional block diagram of an Open Radio Access Network (O-RAN) (100) depicting self-fault mitigation capability in an Open Radio Unit (O-RU) (110). The O-RAN (100) is a part of a telecommunications system which connects individual devices to other parts of a network through radio connections. The O-RAN (100) provides a connection of user equipment (UE) such as mobile phones or computer with a core network of the telecommunication systems. The O-RAN (100) is an essential part of the access layer in telecommunication systems which utilizes base stations (such as eNodeB, gNodeB) for establishing radio connections. The O-RAN (100) is an evolved version of prior radio access networks, making the prior radio access networks more open and smarter than previous generations. The O-RAN (100) provides real-time analytics that drives embedded machine learning systems and artificial intelligence back end modules to empower network intelligence. Further, the O-RAN (100) includes virtualized network elements with open and standardized interfaces. The open interfaces are essential to enable smaller vendors and operators to quickly introduce their own services, or enable operators to customize the network to suit their own unique needs. Open interfaces also enable multivendor deployments, enabling a more competitive and vibrant supplier ecosystem. Similarly, open-source software and hardware reference designs enable faster, more democratic and permission-less innovation. Further, the O-RAN (100) introduces a self-driving network by utilizing new learning-based technologies to automate operational network functions. These learning-based technologies make the O-RAN intelligent. Embedded intelligence, applied at both component and network levels, enables dynamic local radio resource allocation and optimizes network wide efficiency. In combination with O-RAN's open interfaces, AI-optimized closed-loop automation is a new era for network operations.
[0030] The definitions of several components are already disclosed in conjunction with FIG. 1, hence the same has not been repeated to avoid redundancy. The O-RU (110) is connected with an Open Distributed Unit (O-DU) (102), which reads the capability and other information of the O-RU (110) and transmits eCPRI frames/data to the O-RU (110) through a fronthaul interface (i.e., open fronthaul interface). The open fronthaul interface is a standard protocol for a link between the O-RU (110) and the O-DU (102) in the O-RAN (100), enabling different vendors to interoperable. The O-RU (110) decodes the eCPRI frames/data and processes the decoded eCPRI frames/data to a corresponding RF (radio frequency) transceiver chain. The RF transceiver chain is a semiconductor device that consists of a transmitter and a receiver in a single package. The RF transceiver chain is designed to function proficiently within an RF family or standard such as Antenna Interface Standards Group (AISG), Bluetooth, Industrial, Scientific and Medical (ISM), Very high frequency (VHF), Wireless Fidelity (Wi-Fi), cellular, RADAR, 802.15. 4 and Z-Wave.
[0031] Further, the O-RU (110) performs measurement of forward and reflected signals at each RF and antenna port (344) (as shown in FIG. 3a to FIG. 3d) and computes Voltage Standing Wave Ratio (VSWR) values (already explained above in conjunction with FIG. 1) with the help of a detector (not shown) and a comparator (not shown) or with the help of a field-programmable gate array (FPGA or baseband board) (104) that contains a Radio Frequency System-on-Chip (RFSoC). The baseband board (i.e., FPGA (104)) integrates multiple components which help the baseband unit process the baseband signal in the O-RAN (100). The RFSoC integrates multiple devices on one chip to achieve a major step forward in performance and density i.e., fewer boards and less power consumption.
[0032] Based on the measured VSWR values at an individual O-RU RF/antenna port (344), the O-RU (110) takes necessary action locally and reports the necessary action to the O-DU (102). In an example, the action would be like shutting down a direct current (DC) power supply for a power amplifier (PA) chain at which higher VSWR is reported, stopping the RF signal transmission from a baseband section i.e., digital-to-analog (DAC) port (FPGA that includes RF Transceiver) to specific transmitter RF chain or the like. In general, a sequence of several power amplifiers which can subsequently amplify an input signal can be referred as a PA chain.
[0033] Further, the VSWR values are periodically or continuously or intermittently monitored, and an alarm(s) is generated based on a VSWR range defined in a user defined look-up table, which is then reported by the O-RU (110) to the O-DU (102). The user-defined look-up table stores multiple VSWR ranges, which are used by the O-RU (110) to compare with the measured VSWR values at the individual RF/antenna port (344) of the O-RU (110). The look-up table can be stored in the O-RU (110). An example user-defined look-up table is described in Table 1.
[0034] Based on the matching condition (VSWR values) range can be specified. For Example:
Condition VSWR range Action
1 1 to 1.9 (Good impedance matching) No action required
2 1.9 to 2.5 (Moderate impedance matching) Raise the critical alarm and report to O-DU
3 above 2.5 (bad/worst impedance matching) Raise a high critical alarm and shutdown the respective RF Chain or the entire O-RU
[0035] The above process adds additional capability with minimal resource requirements within the O-RU (110) to take the necessary actions rapidly and locally. This prevents the damage/functional defect of the O-RU (110) and makes the O-RAN (100) more robust.
[0036] FIG. 3a to FIG. 3d provide an additional description of FIG. 2, where FIG. 3a to FIG. 3d illustrates an example Radio Front End (RFEF) architecture of the O-RAN (100). The RFEF architecture is included in a Multiple-Input Multiple-Output (MIMO) radio unit. The MIMO radio unit may also be referred to as the O-RU (110). The MIMO radio unit is preferably an 8 transmitter-8 receiver (8T8R) MIMO base station unit, for example. The MIMO radio unit includes 8 transmission and 8 reception lines. The O-RU (110) includes the FPGA (104) and a Digital and SSG (Small Signal Gain) board (106) having a Power Amplifier (PA) section (308) and a High-Power Amplifier (HPA) board (328), a power supply board (310), and a plurality of cavity filters (312).
[0037] The FPGA (104) includes a plurality of digital-to-analog converter (DAC) ports (DAC_0 to DAC_7) (304) that convert a digital signal into an analog signal and a plurality of analog-to-digital converter (ADC) ports (ADC_0 to ADC_9) (306) that converts an analog signal to a digital signal as shown in FIG. 3a to FIG. 3d. The FPGA (104) is an integrated circuit often sold off-the-shelf and is referred to as ‘field programmable’ as it provides customers the ability to reconfigure the hardware to meet specific use case requirements after the manufacturing process. This allows for feature upgrades and bug fixes to be performed in situ, which is especially useful for remote deployments. The FPGA (104) contains configurable logic blocks (CLBs) and a set of programmable interconnects that allow a designer to connect blocks and configure them to perform everything from simple logic gates to complex functions. All the functions related to the MIMO radio unit such as digital signal processing are performed by the FPGA (104) and memory devices (i.e., eMMC, DDR4 and EEPROM) on the digital and SSG board (106), where the FPGA (104) is coupled with the digital and SSG board (106).
[0038] The digital and SSG board (106) further includes a plurality of baluns (316), a plurality of low pass filters (LPFs) (318), a plurality of gain blocks (320), a plurality of digital step attenuators (DSAs) (322), a plurality of band pass filters (BPFs) (332), a pre-driver PA (324), a plurality of BypassLNAs (Low Noise Amplifiers) (BypassLNA1 and BypassLNA2) (334) and a plurality of Single Pole Double Throw (SPDT) RF switches (314) (aka “SPDT switch”). The SPDT switches and SP4T switches (338) are arranged on the digital board to feedback forward and reflected powers from all transceiver chains to the FPGA (104). An isolation is maintained between the forward power and reflected power by the SPDT switch and the corresponding fixed value attenuators (340). The plurality of baluns (316) allows balanced and unbalanced lines to be interfaced without disturbing the impedance arrangement of either line. The plurality of LPFs (318) passes signals with a frequency lower than a selected cutoff frequency. The plurality of gain blocks (320) amplifies the output signal received from the plurality of LPFs (318). The plurality of DSAs (322) receives the amplified output signal and passes it to the respective pre-driver PA (324). The pre-driver PA (Power Amplifier) (324) increases the magnitude of the power of a given input signal. The plurality of BypassLNAs (BypassLNA1 and BypassLNA2) (334) amplifies a low-power signal without significantly degrading its signal-to-noise ratio. The plurality of band pass filters (BPFs) (332) passes frequencies within a certain range and rejects frequencies outside that range.
[0039] The PA section (308) comprises a plurality of driver power amplifiers (326), a plurality of power amplifiers (PAs) (not shown), a plurality of first LNAs (Low Noise Amplifiers) (336), circulators, RF connectors, a plurality of forwarding directional couplers (330) and a plurality of reverse directional couplers (342). The plurality of forwarding directional couplers (330) and the plurality of reverse directional couplers (342) propagate energy/power in a transmission line in each PA section (308). A cavity where the antenna will be connected is interfaced with the PA section (308). The PA section (308) is divided into two PCBs with each PCB comprising four PAs, where the four PAs are arranged on a first PCB and four PAs are arranged on a second PCB. Alternatively, the PA section is divided into four PCBs with each PCB comprising two PAs. Alternatively, the PA section is divided into eight PCBs with each PCB comprising a single PA.
[0040] FIG. 4 illustrates various hardware elements of the O-RU (110). The O-RU (110) may include a processor (402), a memory (404), a fault management controller (406) and a communicator (408). The processor (402) is configured to execute instructions stored in the memory (404) and to perform various processes related to the present disclosure. The communicator (408) is configured for communicating internally between internal hardware components and with external devices via one or more networks. The memory (404) is configured to store instructions to be executed by the processor (402).
[0041] The fault management controller (406) detects the fault at the individual RF/antenna port (344). The fault is detected based on a comparison of the measured VSWR value with the VSWR threshold. The VSWR threshold is defined and/or stored in the user-defined VSWR lookup table. Upon detection, the fault management controller (406) takes the corrective action based on the measured VSWR value to prevent damage to the O-RU (110). The corrective action taken by the O-RU (110) is independent of the O-DU (102). Taking corrective action includes taking no action when the measured VSWR value corresponds to a good impedance matching condition, where the good impedance matching condition corresponds to the measured VSWR value between a first predefined value and a second predefined value. In an example, the first predefined value is 1 and the second predefined value is 1.9. Alternatively, taking the corrective action includes raising a critical alarm and reporting to the O-DU (102) when the measured VSWR value corresponds to a moderate impedance matching condition, where the moderate impedance matching condition corresponds to the measured VSWR value between the second predefined value and a third predefined value. In an example, the third predefined value is 2.5. Alternatively, taking the corrective action comprises shutting down at least one of a radio frequency (RF) chain or the O-RU (110) when the measured VSWR value corresponds to a worse impedance matching condition, wherein the worse impedance matching condition corresponds to the measured VSWR value above the third predefined value. In another embodiment, the O-RU (110) takes the corrective action and reports the alarm to the O-DU (102) in parallel. In an alternative embodiment, the O-RU (110) reports the alarm to the O-DU (102) before it takes corrective action. In an alternative embodiment, the O-RU (110) reports the alarm to the O-DU (102) after it takes the corrective action. In general, the RF chain is a cascade of electronic components and sub-units which may include amplifiers, filters, mixers, attenuators and detectors.
[0042] The fault management controller (406) continuously monitors the VSWR value at each radio frequency (RF)/antenna port (344) of a plurality of RF ports in the O-RU (110), where the VSWR value is monitored continuously after the start-up of the O-RU (110) and during the run time of the O-RU (110). Further, the fault management controller (406) reports the monitored VSWR value from the O-RU (110) to the O-DU (102).
[0043] Alternatively, the fault management controller (406) intermittently monitors the VSWR value at each radio frequency (RF)/antenna port (344) of the plurality of radio frequency (RF) ports in the O-RU (110), where the VSWR value is monitored intermittently after start-up of the O-RU (110) and during the run time of the O-RU (110). Further, the fault management controller (406) reports the monitored VSWR value from the O-RU (110) to the O-DU (102).
[0044] Advantageously, the fault management controller (406) measures and monitors the VSWR value to detect antenna fault, then take corrective action and report as the alarm to at least one of the O-DU (102), an operation and management (OAM) unit and the operator/user. Upon detecting the fault, the fault management controller (406) takes the necessary actions locally and rapidly on the O-RU (110) and parallelly notifies the O-DU (102). The fault management controller (406) facilitates a self-mitigation capability in the O-RU (110) to mitigate fault in the RF/antenna port (344) to prevent damage in the O-RU (110).
[0045] FIG. 5 is a flow chart (500) illustrating a method of fault management in the open-radio access network (O-RAN) (100). The operations (502 and 504) are performed by the fault management controller (406). At step 502, the method includes detecting fault at the individual antenna port (344) (each radio frequency (RF) port (344) of the plurality of RF ports), where the O-RU (110) is part of the disaggregated O-RAN (100) designed to perform the lower physical layer and RF functions. At step 504, the method includes taking at least one corrective action based on the measured VSWR value to prevent damage to the O-RU (110). The corrective action taken by the O-RU (110) is independent of the O-DU (102).
[0046] FIG. 6 is an example flow chart (600) explaining fault detection and mitigation by the O-RU (110). The operations (602-612) are performed by the fault management controller (406).
[0047] At step 602, the method includes booting-up the O-RU (110). At step 604, the method includes determining the performance of the O-RU (110) at each RF port (344). At step 606, the method includes monitoring the VSWR value. At step 608, the method includes determining whether the VSWR value is greater than the VSWR threshold or not. If the VSWR value is less than the VSWR threshold, the measured VSWR value corresponds to the good impedance matching condition and the flow chart (600) proceeds to step 606. The good impedance matching condition corresponds to the measured VSWR value between the first predefined value and the second predefined value.
[0048] If the VSWR value is greater than the VSWR threshold, then the measured VSWR value corresponds to the worse impedance matching condition, and at step 610, the method includes reporting the worst condition to the O-DU (102) and the O-RU (110) and shutting down the corresponding RF chain. The worse impedance matching condition corresponds to the measured VSWR value above the third predefined value. If the VSWR value is less than the VSWR threshold, then the measured VSWR value corresponds to the moderate impedance matching condition and at step 612, the method includes reporting the moderate matching to the O-RU (110) and the O-DU (102) and generating the VSWR alarm. The moderate impedance matching condition corresponds to the measured VSWR value between the second predefined value and the third predefined value.
[0049] Advantageously, the method can be used to prevent the damage/functional defect of the O-RU (110) and makes the O-RAN (100) more robust. The method can be used to reduce processing time caused in the O-DU assisted mode. The proposed method does not require many FPGA resources and is hence implemented without affecting other process/activities of O-RU (110).
[0050] The various actions, acts, blocks, steps, or the like in the flow charts (500 and 600) may be performed in the order presented, in a different order or simultaneously. Further, in some implementations, some of the actions, acts, blocks, steps, or the like may be omitted, added, modified, skipped, or the like without departing from the scope of the invention.
[0051] The embodiments disclosed herein can be implemented using at least one software program running on at least one hardware device and performing network management functions to control the elements.
[0052] It will be apparent to those skilled in the art that other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention. While the foregoing written description of the invention enables one of ordinary skill to make and use what is considered presently to be the best mode thereof, those of ordinary skill will understand and appreciate the existence of variations, combinations, and equivalents of the specific embodiment, method, and examples herein. The invention should therefore not be limited by the above described embodiment, method, and examples, but by all embodiments and methods within the scope of the invention. It is intended that the specification and examples be considered as exemplary, with the true scope of the invention being indicated by the claims.
[0053] The methods and processes described herein may have fewer or additional steps or states and the steps or states may be performed in a different order. Not all steps or states need to be reached. The methods and processes described herein may be embodied in, and fully or partially automated via, software code modules executed by one or more general purpose computers. The code modules may be stored in any type of computer-readable medium or other computer storage device. Some or all of the methods may alternatively be embodied in whole or in part in specialized computer hardware.
[0054] The results of the disclosed methods may be stored in any type of computer data repository, such as relational databases and flat file systems that use volatile and/or non-volatile memory (e.g., magnetic disk storage, optical storage, EEPROM and/or solid state RAM).
[0055] The various illustrative logical blocks, modules, routines, and algorithm steps described in connection with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. The described functionality can be implemented in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosure.
[0056] Moreover, the various illustrative logical blocks and modules described in connection with the embodiments disclosed herein can be implemented or performed by a machine, such as a general purpose processor device, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components or any combination thereof designed to perform the functions described herein. A general-purpose processor device can be a microprocessor, but in the alternative, the processor device can be a controller, microcontroller, or state machine, combinations of the same, or the like. A processor device can include electrical circuitry configured to process computer-executable instructions. In another embodiment, a processor device includes an FPGA or other programmable device that performs logic operations without processing computer-executable instructions. A processor device can also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. Although described herein primarily with respect to digital technology, a processor device may also include primarily analog components. A computing environment can include any type of computer system, including, but not limited to, a computer system based on a microprocessor, a mainframe computer, a digital signal processor, a portable computing device, a device controller, or a computational engine within an appliance, to name a few.
[0057] The elements of a method, process, routine, or algorithm described in connection with the embodiments disclosed herein can be embodied directly in hardware, in a software module executed by a processor device, or in a combination of the two. A software module can reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of a non-transitory computer-readable storage medium. An exemplary storage medium can be coupled to the processor device such that the processor device can read information from, and write information to, the storage medium. In the alternative, the storage medium can be integral to the processor device. The processor device and the storage medium can reside in an ASIC. The ASIC can reside in a user terminal. In the alternative, the processor device and the storage medium can reside as discrete components in a user terminal.
[0058] Conditional language used herein, such as, among others, "can," "may," "might," "may," “e.g.,” and the like, unless specifically stated otherwise, or otherwise understood within the context as used, is generally intended to convey that certain alternatives include, while other alternatives do not include, certain features, elements and/or steps. Thus, such conditional language is not generally intended to imply that features, elements and/or steps are in any way required for one or more alternatives or that one or more alternatives necessarily include logic for deciding, with or without other input or prompting, whether these features, elements and/or steps are included or are to be performed in any particular alternative. The terms “comprising,” “including,” “having,” and the like are synonymous and are used inclusively, in an open-ended fashion, and do not exclude additional elements, features, acts, operations, and so forth. Also, the term “or” is used in its inclusive sense (and not in its exclusive sense) so that when used, for example, to connect a list of elements, the term “or” means one, some, or all of the elements in the list.
[0059] Disjunctive language such as the phrase “at least one of X, Y, Z,” unless specifically stated otherwise, is otherwise understood with the context as used in general to present that an item, term, etc., may be either X, Y, or Z, or any combination thereof (e.g., X, Y, and/or Z). Thus, such disjunctive language is not generally intended to, and should not, imply that certain alternatives require at least one of X, at least one of Y, or at least one of Z to each be present.
[0060] While the detailed description has shown, described, and pointed out novel features as applied to various alternatives, it can be understood that various omissions, substitutions, and changes in the form and details of the devices or algorithms illustrated can be made without departing from the scope of the disclosure. As can be recognized, certain alternatives described herein can be embodied within a form that does not provide all of the features and benefits set forth herein, as some features can be used or practiced separately from others.
, Claims:CLAIMS

We Claim:

1. A method for handling fault management in a disaggregated open-radio access network (O-RAN) (100), the method comprising:
detecting, by an open-radio unit (O-RU) (110), a fault at each radio frequency (RF) port (344) of a plurality of radio frequency (RF) ports, wherein the O-RU (110) is part of the disaggregated O-RAN (100) designed to perform lower physical layer and radio frequency (RF) functions; and
taking, by the O-RU (110), at least one corrective action based on a measured Voltage Standing Wave Ratio (VSWR) value to prevent damage in the O-RU (110), wherein the at least one corrective action taken by the O-RU (110) is independent of an Open-Distributed Unit (O-DU) (102).

2. The method as claimed in claim 1, wherein the method comprises:
continuously monitoring, by the O-RU (110), the VSWR value at each radio frequency (RF) port (344) of the plurality of radio frequency (RF) ports in the O-RU (110), wherein the VSWR value is monitored continuously after start-up of the O-RU (110) and during the run time of the O-RU (110); and
reporting, by the O-RU (110), the monitored VSWR value from the O-RU (110) to the open-distributed unit (O-DU) (102), wherein the O-DU (102) is part of the disaggregated O-RAN (100) designed to perform higher physical layer functions based on a lower layer functional split.

3. The method as claimed in claim 1, wherein the method comprises:
intermittently monitoring, by the O-RU (110), the VSWR value at each radio frequency (RF) port (344) of the plurality of radio frequency (RF) ports in the O-RU (110), wherein the VSWR value is monitored intermittently after start-up of the O-RU (110) and during the run time of the O-RU (110); and
reporting, by the O-RU (110), the monitored VSWR value from the O-RU (110) to the open-distributed unit (O-DU) (102).

4. The method as claimed in claim 1, wherein the fault is detected based on a comparison of the measured VSWR value with a VSWR threshold.

5. The method as claimed in claim 4, wherein the VSWR threshold is defined in a user-defined VSWR lookup table.

6. The method as claimed in claim 1, wherein taking the at least one corrective action comprises taking no action when the measured VSWR value corresponds to a good impedance matching condition, wherein the good impedance matching condition corresponds to the measured VSWR value between a first predefined value and a second predefined value.

7. The method as claimed in claim 1, wherein taking the at least one corrective action comprises raising a critical alarm and reporting to the O-DU (102) when the measured VSWR value corresponds to a moderate impedance matching condition, wherein the moderate impedance matching condition corresponds to the measured VSWR value between a second predefined value and a third predefined value.

8. The method as claimed in claim 1, wherein taking the at least one corrective action comprises shutting down at least one of a radio frequency (RF) chain or the O-RU (110) when the measured VSWR value corresponds to a worse impedance matching condition, wherein the worse impedance matching condition corresponds to the measured VSWR value above a third predefined value.

9. A open-radio unit (O-RU) (110) for handling fault management in a disaggregated open-radio access network (O-RAN) (100), wherein the (O-RU) (110) comprises:
a processor (402);
a memory (404); and
a fault management controller (406), coupled with the processor (402) and the memory (404), configured to:
detect a fault at each radio frequency (RF) port (344) of a plurality of radio frequency (RF) ports, wherein the O-RU (110) is designed to perform lower physical layer and radio frequency (RF) functions; and
take at least one corrective action based on a measured Voltage standing wave ratio (VSWR) value to prevent damage in the O-RU (110), wherein the at least one corrective action taken by the O-RU (110) is independent of an Open-Distributed Unit (O-DU) (102).