Method and system for calibrating the time offset between channels of a multichannel reception system for radio signals The present invention relates to a method for calibrating the time offset between channels of a multi-channel reception system for radio signals, and an associated time offset calibration system. It also relates to a method of synchronization between channels of a multichannel reception system for radio signals, and an associated synchronization system. The invention lies in the general field of multichannel reception systems for radio signals, used in many fields such as amplitude direction finding, interferometry, multistatic synthetic aperture radar systems, frequency measurements and medical imaging. De manière connue, dans un système de réception multivoies, chaque voie de réception comprend une chaîne de réception délivrant un signal électrique en entrée d’un convertisseur analogique numérique ayant une fréquence d’échantillonnage associée, et un module d’interfaçage branché en sortie dudit convertisseur analogique numérique et adapté à fournir les échantillons de signal numérisé en entrée d’un module de traitement numérique du signal par paquets d'échantillons, c'est-à-dire avec un minimum de parallélisation. Cela tient au fait qu'un module de traitement numérique du signal comporte un ou plusieurs composants numériques programmables de type FPGA ( Field Programmable Gâte Arraÿ) dont la fréquence de travail est bien inférieure à la fréquence d'échantillonnage de la conversion analogique numérique. In particular for applications which exploit the phase shift between reception channels, for example for interferometry, it is necessary that the samples from each channel relate to the same time slot of the radio signals picked up at the input of the reception channels, or, in other words, that the sample packets are synchronized between reception channels. In addition, it is necessary for the synchronization between reception channels to be stable and reproducible. There are various possible causes of desynchronization between receive channels. In a first case, all the reception channels include an analog-to-digital converter operating at a sampling frequency Fe. This is the case of reception chains respecting the Shannon condition, carrying out filtering with a lower bandwidth. to Fe / 2 before digital-to-analog conversion. The frequency Fe is very high and much higher than the maximum operating frequency of programmable digital components. Interfacing modules are used, for example demultiplexers which may include one or more demultiplexing stages, which provide packets of P samples in parallel, P being a non-zero integer, at the frequency Fe / P. Any possible time lag of the demultiplexers, for example during start-up, In this case, synchronization methods are known in the state of the art based on the use of particular architectures allowing a distribution of synchronization signals, the objective of which is to synchronize the demultiplexers. Series or star synchronization signal distribution architectures have been proposed. Such solutions are complex, and the synchronization obtained depends on the clock synchronization. The Fe sampling frequency being very high, the corresponding period is very low, and the propagation times and their drift are not negligible compared to this period. The synchronization systems thus obtained can therefore become unstable. In another case, the reception chains do not respect the Shannon condition, performing an instantaneous very wide band filtering, and the analog-to-digital converters use different Fe sampling frequencies to solve the aliasing problem. spectrum due to non respect of the Shannon condition. Synchronization between reception channels based on synchronization signals is not possible in this case. The objective of the invention is to remedy the drawbacks of the prior art, by proposing a less complex method and system, making it possible to obtain a robust and reproducible time synchronization, and also operating when the sampling frequencies of the analog to digital converters of the multichannel reception system are different. To this end, the invention proposes a method for calibrating the time offset between channels of a multi-channel reception system for radio signals, the system comprising a set of channels for receiving radio signals, each reception channel comprising a chain of radio signals. reception delivering an electrical signal at the input of an analog-to-digital converter having an associated sampling frequency, and an interfacing module connected to the output of said analog-to-digital converter and adapted to supply sets of digitized signal samples at the input of a digital signal processing module comprising one or more programmable digital components. This process comprises following power-up of the receiving system: - an injection on all the reception channels of the same random signal representing noise obtained from a noise source, - for at least one pair of reception channels comprising a first channel and a second channel, an estimate of a time shift between digitized signal samples supplied by said first and second channels, using a calculation of an intercorrelation function between a first set of samples obtained by the first reception channel and a second set of samples obtained by the second reception channel, a storage of the estimated temporal offset in association with said pair of channels. Advantageously, the method of the invention makes it possible to estimate a time offset between reception channels without supplying a synchronization signal at the sampling frequency between reception channels when the multichannel reception system is switched on. Thus, the architecture of the system is simplified. The method for calibrating the time offset between channels of a multi-channel reception system for radio signals according to the invention can also have one or more of the characteristics below, taken independently or in combination. The random signal representing injected noise is thermal analog noise injected at the input of each reception channel. The random signal representing injected noise is analog noise obtained from a pseudo-random digital sequence and injected at the input of the analog-to-digital converter of each reception channel. The estimation of said time shift comprises a detection of a maximum of said intercorrelation function, said time shift being a digital time shift as a function of a time index corresponding to said maximum. The method is implemented in a multichannel reception system in which each analog-to-digital converter has the same sampling frequency, and the calculation of an intercorrelation function comprises steps of: acquisition of a first set of samples on said first reception channel and of a second set of the same number of samples on said second reception channel; - application of a discrete Fourier transformation on said first set of samples, making it possible to obtain a first set of complex values ​​of transformed samples, and application of a discrete Fourier transformation on said second set of samples, allowing to obtain a second set of complex values ​​of transformed samples, - calculation of the complex product between the first set of complex values ​​and the conjugate complex of the second set of complex values, obtaining said intercorrelation function by applying an inverse discrete Fourier transform to said complex product. The method is implemented in a multi-channel reception system in which each analog-to-digital converter has an associated own sampling frequency, and the calculation of an intercorrelation function comprises steps of: acquisition of a first set of a first number Mi of samples on said first reception channel for a predetermined duration, and acquisition of a second set of a second number M 2 of samples, different from the first number, on said second reception channel, for said predetermined duration, - application of a discrete Fourier transformation on said first set of samples, making it possible to obtain a first set of Mi complex values ​​of transformed samples, and application of a discrete Fourier transformation on said second set of samples, making it possible to obtain a second set of M 2 complex values ​​of transformed samples, - obtaining two sets of complex values ​​of the same cardinal by deleting the complex values ​​associated with the highest frequencies in the set of largest cardinal, - calculation of the complex product between the first set of complex values ​​and the conjugate complex of the second set of complex values ​​with the same cardinality, - Obtaining said intercorrelation function by applying an inverse discrete Fourier transform to said product. The method is applied in a multi-channel reception system comprising a number N of reception channels greater than or equal to 2, comprising a selection of a reference reception channel, and the estimation of a time offset for each pair of channels. composed of said reference reception channel and a second channel among the N-1 other reception channels. According to another aspect, the invention relates to a system for calibrating the time offset between channels of a multi-channel reception system as briefly described above. This calibration system includes: - a noise source suitable for injecting the same random signal representing noise on all the reception channels, a calculation module suitable for estimating, for at least one pair of reception channels comprising a first channel and a second channel, a time offset between digitized signal samples supplied by said first and second channels, using a calculation of a cross-correlation function between a first set of samples obtained by the first reception channel and a second set of samples obtained by the second reception channel, a memory suitable for storing the estimated time offset in association with said pair of channels. According to another aspect, the invention relates to a method of synchronization between reception channels of a multi-channel reception system for radio signals comprising a set of reception channels for radio signals, each reception channel comprising a reception channel delivering a signal. electrical input of an analog-to-digital converter having an associated sampling frequency, and an interfacing module connected to the output of said analog-to-digital converter and adapted to supply sets of digitized signal samples at the input of a digital signal processing comprising one or more programmable digital components. This synchronization method comprises, for at least one pair of reception channels: a temporal offset calibration phase implementing a calibration method as briefly described above, and a phase of applying a compensation for the estimated time offset at the output of the interface module of at least one of the channels of said pair of channels with respect to a reference channel, so as to provide series of samples digital signals synchronized at the input of the digital signal processing module, each series of synchronized digital samples comprising a number of samples corresponding to the same duration and each first sample of each series corresponding temporally to the same instant. According to another aspect, the invention relates to a system for synchronization between reception channels of a multi-channel reception system for radio signals, the reception system comprising a set of channels for receiving radio signals, each reception channel comprising a channel receiver delivering an electrical signal at the input of an analog-to-digital converter having an associated sampling frequency, and an interfacing module connected to the output of said analog-to-digital converter and adapted to supply sets of digitized signal samples at the input a digital signal processing module comprising one or more programmable digital components. This synchronization system includes a time offset calibration system as briefly described above, Other characteristics and advantages of the invention will emerge from the description which is given below, by way of indication and in no way limiting, with reference to the appended figures, among which: FIG. 1 schematically illustrates a system for synchronization between reception channels of a multi-channel reception system according to a first embodiment; FIG. 2 schematically illustrates a system for synchronization between reception channels of a multi-channel reception system according to a second embodiment; FIG. 3 is a block diagram of a method for calibrating the time offset between channels according to an embodiment suitable for the case where the analog-to-digital converters are clocked at the same frequency Fe; FIG. 4 is a block diagram of the main steps of a channel synchronization method according to an embodiment suitable for the case where the analog-to-digital converters are clocked at different sampling frequencies Fe,; FIG. 5 schematically illustrates two sets of time samples acquired over a given time period; FIG. 6 is a block diagram of the main steps of an embodiment of a method of synchronization between reception channels; FIG. 7 illustrates in detail an embodiment of a synchronization device for a reception channel; FIG. 8 diagrammatically represents packets of samples originating from an interface device of a reception channel; - Figures 9 and 10 schematically represent an example of sample packets from two reception channels, before and after application of the synchronization; - Figure 11 schematically illustrates first and second sample packets used to obtain a series of samples according to one embodiment; - Figures 12 and 13 illustrate, in one example, sample packets from the first and second sets of registers of the synchronization device, and the synchronized series obtained, and FIG. 14 is a block diagram of the main steps of a synchronization method according to one embodiment. FIG. 1 schematically illustrates a system 1 for synchronizing reception channels of a multi-channel reception system 2 for radio signals. The multi-channel reception system 2 of radio signals comprises N reception channels \ to V N , any one of the reception channels being referenced below as V, with i ranging between 1 and N. Each of the reception channels Vi V N includes an antenna 4 N , receiving a radio signal and outputting an electrical signal in a receiving channel (CR) 6 1 to 6 N . Each reception channel delivers an electrical signal at the input of an analog-to-digital converter or ADC 8 1 to 8 N having an associated sampling frequency. Each ADC 8 provides digital samples at the output, at a rate dictated by the sampling frequency Fe ,, equal to the same frequency Fe in one embodiment. These samples are supplied to a corresponding interfacing module 10. The function of this interface module is to ensure compatibility with a digital signal processing module 12, associated with the reception channel and forming part of a digital signal processing module 12, comprising one or more programmable digital components. of FPGA type, when the frequency Fe is much higher than the maximum operating frequency of the programmable digital component (s). In one embodiment, each 10-i 10 N interface module is a demultiplexer with one or more demultiplexing stages, providing packets of P samples in parallel, P being a non-zero integer, at the frequency Fe / P . In an alternative embodiment, the interface modules 10i to 10 N consist of fast serial links. Two types of multichannel reception systems are envisaged. A first type of reception system is a system respecting the Shannon condition, the reception chains carrying out filtering with a bandwidth less than Fe / 2, each of the CAN 8 1 to 8 N operating with the same sampling frequency Fe In the reception systems of the first type, all the reception channels \ L to V N each provide the same number of digital samples for the same signal acquisition time. A second type of reception system is a system that does not comply with the Shannon condition, the reception chains carrying out filtering with a bandwidth greater than Fe / 2, where Fe, is the sampling frequency of ADC 8,. Achieving synchronization for a receiving system of the second type is much more complex than in the case of a receiving system of the first type. In the reception systems of the second type, all the reception channels \ to V N supply different numbers of digital samples for the same signal acquisition time. The synchronization system 1 of FIG. 1 is suitable for reception systems of the first type. The synchronization system 1 enriches the multi-channel reception system 2 with a time offset calibration system 3 to perform the estimation of time offsets between the reception channels and time offset compensation modules for the synchronization of the reception channels . The time offsets 3 the synchronization system 1 calibration system further comprises a source of random noise signal representing a 14, connected at the input of switching modules 16i to 16 N . In the embodiment of FIG. 1, each switching module 16i to 16 N is connected to the input of a corresponding reception chain 6 ^ to 6 N , and receives on a first input, the output of antenna A to 4 N of the corresponding reception channel \ to V N , and on a second input, the noise from the random signal source representing noise 14. Each switching module 16i to 16 N is adapted to switch between a first position connected to the first input and a second position connected to the second input, to transmit either the electrical signal delivered by the corresponding antenna, or the noise resulting from the source 14, at the input of the corresponding CAN converter 8 ^ to 8 N. In a time offset calibration phase, implemented when the system is powered up, and before a signal processing phase received, all switching modules 16i to 16 N are in second position. In an operational phase of operation, all the switching modules 16i to 16 N are in the first position. The source of random signal representing a noise 14 is for example an analog source of thermal noise. The output of the source 14 is connected to the input of each switching module 16i to 16 N , preferably while respecting a substantially identical cable length for each link, the cables being of the same type, so as to present the same noise without offset time at the input of each ADC 8 8 ^ N . Thus the same noise, of the same duration and without time lag is supplied at the input of each ADC. The system 1 further comprises a processor 180 and a memory 20, which are, in one embodiment, integrated in a calculation module 22 which also comprises the digital signal processing module (s) 12. The processor 180 is adapted to implement software code instructions when it is powered on, making it possible to perform steps of the time offset calibration method according to the invention. In the calibration phase, the processor 180 implements a module 190 for calibrating the time offset between digitized signal samples supplied by a first reception channel \ L and a second reception channel V 2 which are distinct, suitable for calculating a time shift between channels using a computation of an intercorrelation function, as explained in detail below. The module 190 for calibrating the time offset between channels is for example implemented by software code instructions. As a variant, the module 190 is produced in the form of a programmable logic component such as an FPGA, or else in the form of a dedicated integrated circuit such as an ASIC (for Application Specifies Integrated Circuit). The sets of digitized signal samples 24 1 ... 24 N are stored in the memory 20. Each set of samples 24 1 ... 24 N comprises a number of successive samples corresponding to the same time slot T 0 The time offset calculation is preferably carried out for as many pairs of channels as necessary to perform a time offset calibration r r for each of the reception channels V, with respect to a reference channel V r , as explained in more detail below. -after. The processor 180 is suitable for controlling time offset compensation modules 26i to 26 N , to achieve the time offset in operational phase, of the time offset value t 1> G to t N n previously calculated and stored for each of the channels. receiving \ to V N . Advantageously, the system of the invention makes it possible to achieve synchronization without supplying a synchronization signal between reception channels when the system is powered on. FIG. 2 schematically illustrates a second embodiment of a synchronization system 11 of a multichannel reception system. The common references with the elements of FIG. 1 are retained. The multichannel reception system is similar to that described with reference to FIG. 1. The main difference with the first embodiment is that the time offset calibration system 30 comprises a random signal source representative of a noise 29 connected so as to provide an analog noise at the input of each ADC 8 1 to 8 N . In this embodiment, the switching modules 16i to 16 N are inserted between the output of the reception chain 6 1 to 6 N and the input of the CAN 8 1 to 8 N corresponding for each reception channel \ L to V N . In the calibration phase, the switching modules 16 are in second position connecting the second input of each module, connected to the source of random signal representative of a noise 29, to the input of the corresponding CAN 8. In this embodiment, the noise source 29 is for example produced by a pseudo-random generator using, for example, shift registers and an “exclusive or” loopback, or else with a memory block containing a pseudo-random digital sequence . In both cases, the digital signal is transformed into an analog signal by a digital-to-analog interfacing device. The analog signal from such sources 29 has white noise characteristics, with an autocorrelation function of the Dirac type. Preferably, the clock frequency of the pseudo-random sequence is equal to the sampling frequency Fe when the reception system 2 is a system of the first type. When the reception system 2 is a second type system, the clock frequency of the pseudo-random sequence is for example chosen equal to the smallest sampling frequency Fe i. As in the embodiment of FIG. 1, the connection of the noise source 29 at the input of the CAN 8, is carried out so as to ensure that there is no time lag between the noises injected into the inputs of the CAN 8, of the different reception channels. The time offset calibration system 30 and the synchronization system 11 are adapted to operate both with a first type multi-channel reception system and with a second type multi-channel reception system. FIG. 3 is a block diagram of the main steps of a method for calibrating the time offset between reception channels implemented with a multi-channel reception system of the first type. As explained above, in a multi-channel reception system of the first type, all the analog-to-digital converters 8 use the same sampling frequency Fe. The calculation steps of this method are implemented by the calculation module 22, for example partly by a digital signal processing module of FPGA type, and partly by a module of software code instructions implemented in a processor 180. The calibration method is implemented in a time offset calibration phase when the system is powered on, before its operational use. During a first step, the method comprises the control 40 of the injection of an analog noise, either at the input of the corresponding reception chain according to the embodiment of FIG. 1, or at the input of the corresponding analog-digital converter. according to the embodiment of Figure 2. During a first acquisition step 42 is performed synchronous acquisition of one or more first sets of digital samples at the output of interface modules 10i to 10 N . The number of samples is for example M = 4096. In step 44, by applying a discrete Fourier transform (DFT), we obtain, for each set of samples acquired, a set of M complex values ​​of transformed samples. Preferably the number M of samples is of the form M = 2q , and an optimized DFT is applied by an FPGA programmable digital component 12. Preferably, the DFTs applied in operational mode are used. Preferably, the steps of acquiring 42 and applying a TFD 44 are applied simultaneously for all the reception channels. The method then comprises a step 46 of selecting a first reception channel \ and a second reception channel V 2 , forming a pair of reception channels (V 1; V 2 ) to be processed. When N = 2, the system has a single pair of channels which forms the pair of channels to be processed. Optionally, a given reception channel is chosen as the reference channel, which is reused in each pair of channels to be processed. For the first reception channel, a first set TFD Ï of M complex values ​​of transformed samples, denoted TFD 1 t to TFD 1M, has been obtained and stored . For the second reception channel V 2, a second set TFD 2 of M complex values ​​of transformed samples, denoted TFD 2 1 to FD 2, has been obtained and stored. The method then comprises a calculation 48 of the complex product between the first set TFDi of complex values ​​{TFD l t , ..., TFD 1 M } and the conjugate complex TFD 2 * of the second set of complex values, then the application 50 of 'an inverse discrete Fourier transform on the result of the computation of step 48. Calculation of the product between the first set of complex values ​​TFD Ï and the conjugate complex TFD 2 * of the second set of complex values is understood here to mean the product made between values ​​of the same rank: TFD l k x TDF 2 k for each index k between 1 and M. By applying the inverse DFT, we obtain the intercorrelation function on M points of the pair of receiving channels processed. The method then comprises a determination 52 of the maximum of the cross-correlation function over M points, in other words, the determination of the time index k corresponding to the maximum value of the cross-correlation function. The time shift between channels \ and V 2 is obtained by multiplying the value of the corresponding time index by the sampling period 1 / Fe or T 0 / M. The index k corresponding to the time shift obtained for the pair of channels processed is stored in step 54. As an alternative, the time shift obtained is stored in step 54. The method returns to step 46 for selecting a new pair of channels to be processed, and steps 48 to 54 are repeated until a time offset is determined for each of the channels with respect to at least one other. receive channel, the offset calibration process then ends. FIG. 4 is a block diagram of the steps of a method for calibrating the time offset between reception channels implemented with a multi-channel reception system of the second type, in which the ADCs have sampling frequencies Fe, different. The method comprises a first analog noise injection step 60, analogous to step 40 previously described with reference to FIG. 3. Optionally, a selection of pair of reception channels to be processed is also performed. When N = 2, the system has a single pair of channels which forms the pair of channels to be processed. Steps 62, 64 for acquiring sets of samples on a first channel Vi and a second channel V 2 forming a pair of channels, on an acquisition time slot T 0 . We acquire Mi samples on the first channel and M 2 samples on the second channel, with Mi different from M 2 , and M ^ Fe To and M 2 = Fe 2 .T 0 . Thus, advantageously, even if the number of points acquired respectively on the first reception channel differs from the number of points acquired on the second reception channel, the spectral resolution of each DFT is equal to 1 / T 0 . FIG. 5 diagrammatically illustrates an example of points corresponding to Mi and M 2 time samples acquired respectively on a first channel \ with a sampling frequency Fei and a second channel V 2 with a sampling frequency Fe 2 , with a number M ^ IL in this example. Returning to FIG. 4, following the acquisition of Mi samples on the first channel Vi and of M 2 samples on the second channel V 2 , a discrete Fourier transform is applied to each of the channels (steps 66, 68). The TFD applied in step 66 to the Mi samples of the first channel makes it possible to obtain a first set of Mi complex values ​​of transformed samples, denoted TFD ! : {TFD 1 . TFD 1 . The TFD applied in step 68 to the M 2 samples of the second channel makes it possible to obtain a second set of M 2 complex values ​​of transformed samples, denoted TFD 2 : {TFD 1 , ..., TFD 1M2 ). Alternatively, the TFD of the steps 66 and 68 retain only half (I 2 and M 2 /2) complex values of the DFT, given the property of Hermitian symmetry of the spectrum of a real signal. It should be noted that the discrete Fourier transformations applied to steps 66, 68 are of different sizes, and are preferably applied by software calculation by processor 180. A next step 70 consists in determining the largest number of samples supplied, M max = Max (M 1 , M 2 ), which is M 2 in the example of FIG. 4, and to delete in the set of complex values ​​of TFD 2 , the I ^ -Mi values ​​corresponding to the largest frequencies in the real domain. We obtain a second set of truncated complex values, TFD ' 2 , with the same cardinality M min = M 1 as the first set of complex values. Of course, the method applies analogously if the number of samples Mi supplied on the first channel is greater than the number of samples M 2 supplied on the second channel, with M max = M 1 and M min = M 2 . At the end of step 70, two sets of complex values ​​with the same cardinality M min , equal to the smallest number between Mi and M 2, are available . We then apply in step 72 a calculation of the complex product between the first set of complex values ​​TFD Ï and the conjugate complex TFD ' 2 * of the second set of truncated complex values, then an inverse discrete Fourier transform (step 74) on the result of the calculation 72. Analogously to the embodiment of FIG. 3, the product is made between values ​​of the same rank: TFD l k x TDF 2 ' * fc for each index k between 1 and Mmin Finally, an intercorrelation function 76, on M min = rnin (M 1 , M 2 ) points, is obtained. The method then continues to find the maximum of the cross-correlation function, as described above with reference to step 52 of FIG. 3. FIG. 6 is a block diagram of the main steps of a method of synchronization between reception channels of a multi-channel reception system, in one embodiment. The method comprises a step 80 for acquiring, at the output of the interface modules 10, sets of digital signal samples supplied by the reception channels \ L to V N , when the switching modules 16i to 16 N are in first position. Step 80 is followed by a reading 82 of the stored time offsets to be applied to each of the reception channels. Then, a time offset compensation is applied at step 84, so as to supply at the input of the digital processing module series of digital samples synchronized in time over a so-called given synchronization period. For example, the time offset compensation is carried out by using synchronization devices as described below, adapted to operate both with a reception system of the first type and a reception system of the second type. In particular, with reference to FIGS. 7 to 15, an embodiment of a temporal offset compensation module 26 ,, also called synchronization device, suitable in particular for a reception system of the second type, in which the sampling frequencies Fe are different. Each sampling frequency Fe i is much greater than the maximum operating frequency of the programmable digital components (FPGA) located downstream of the ADCs, in particular in the digital signal processing module 12. The function of the interface module 10 is to transform the flow of series samples at the rate Fe i into a series flow of packets of P samples in parallel at the first frequency - -, P being a non-zero integer, this first frequency being slower and compatible with the second frequency or frequency working programmable digital components F T . 5 ¾ (t) denotes the digital signal delivered by the interfacing module 10 ,, resulting from a corresponding analog signal sJt). The interfacing module 10 is, in this embodiment, a demultiplexer with one or more demultiplexing stages, providing packets of P samples in parallel. The demultiplexers 10 of the various reception channels are not synchronized, and cannot be synchronized because the frequencies Fe are different, and Fe-therefore the values ​​- - are also different. The synchronization device 26 ,, connected between the interface module 10, and the digital processing module 12 ,, has the function, from a serial input stream of packets of P successive samples passed in parallel, the samples being obtained at a sampling frequency Fe and having undergone a possible time shift linked to channel i, to form series of Ni successive samples, always formatted in packets of P successive samples in parallel, including the first sample of said series corresponds, regardless of i, to the same absolute time, that is to say to the current time in the input stream corrected by the time offset to be applied. Each synchronization device 26 receives as input a time offset value bx i r between the channel V, and the reference channel V r , calculated by the method described above. The synchronization system comprises a counting module 100, which is, in the preferred embodiment, a counting module common to all the synchronization devices 26 ,, which distributes the same counter value at a given time to each synchronization device. . As a variant, the counting module 100 is adapted to carry out a synchronization of the counters of the synchronization devices 26 ,, for example by an initial reset, so that each of the counters delivers the same counter value to each control device. synchronization 26 ,. Each digital processing module 12 can, for example, perform a discrete Fourier transform (DFT) on the Ni successive samples of a series, corresponding to a signal duration AT which is the same for all the reception channels. So, whatever i: In particular for interferometric applications, it is necessary that the series of N t successive samples for different values ​​of i, all correspond to the same absolute time interval so that the phase shift between end of channels, between two given channels, is representative of that at the output of the antennas of said two channels on the same incident signal. FIG. 7 illustrates in detail a synchronization device 26, forming part of the reception channel V i. The synchronization device 26 receives packets of P samples at the first frequency - - as input, and outputs series of Ni samples, in packets of P samples. FIG. 8 illustrates a first problem to be solved owing to the fact that the number N t is not, generally, a multiple of P. FIG. 8 illustrates the parallelization of the flow of samples in P parallel lines, carried out by the demultiplexer 10 ,. Each sample is symbolized by a box 140. These samples are illustrated in a diagram with two time axes Ti and T 2 . The packets 150 of P samples are referenced by an index Ç j . The duration corresponding to a packet is PTe t = ^ · The curved arrows 160 indicate the continuity of the samples over time. The series 18 to be outputted are series of N t samples, referenced by an index /, shown in thick lines. However, the number N t not being a multiple of P, each series 18 does not systematically start with a packet of P samples belonging to it entirely, as illustrated in FIG. 8 by the sample of index 0 of each packet. The position of the first sample of a series 18 in a packet of P samples 150 changes over time, and depends on the remainder P j of the Euclidean division of N t by P. The number N t is written in the form: N t = M x P + Ri (EQ 2) with 0