CROSS-REFERENCE TO RELATED APPLICATIONS AND PRIORITY
[001] The present application does not claim priority from any patent application.
TECHNICAL FIELD
[002] The present subject matter described herein, in general, relates to a method and a system for controlling power, and more particularly a system and a method for controlling power in a no load condition.
BACKGROUND
[003] Generally, a switching mode power supply (SMPS) may be used as an apparatus to supply power to electronic products. Here, the SMPS converts alternating current (AC) voltages and outputs a static voltage to operate electronic products. Further, the SMPS have the advantage of smaller size, higher efficiency and larger output power capability in comparison to linear power supply and are widely applied in mobile phone chargers, computer adapters and other fields.
[004] Typically, the electronics such as desktop devices are switched OFF when not in use but are still connected to the main power supply. In such ‘not in use’ state i.e. shut down state, most of these electronic devices consume small amount of electricity even when the device is not in use i.e. shut down state. For example, a desktop computer and LCD monitor consume electricity if the main power is ON and the device is in shut down state. Typically, conventional SMPS and circuit fail when implemented for controlling the power consumption in a switched OFF state. Now a days, with the increasing emphasis on the green supplies, which require higher efficiency and lower standby / shutdown state power consumption, there is a demand for improved techniques to control the power usage in a no load condition of an SMPS.
SUMMARY
[005] Before the present methods and systems, are described, it is to be understood that this application is not limited to the particular methodologies and system for controlling power in a no load condition as described, as there can be multiple possible embodiments, which are not expressly illustrated, in the present disclosures. It is also to be understood that the terminology used in the description is for the purpose of describing the particular versions
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or embodiments only, and is not intended to limit the scope of the present application. This summary is provided to introduce aspects related to method and system for controlling power in a no load condition and the concepts are further described below in the detailed description. This summary is not intended to identify essential features of subject matter nor is it intended for use in determining or limiting the scope of the subject matter.
[006] In one implementation, a system for controlling power in a no load condition is disclosed. In one aspect, the system may comprise, Switching Mode Power Supply (SMPS) (202) connected to an electronic device, a control circuit (200) coupled to the SMPS (202) and the main power (204), The control circuit (200) further comprises a dual coil mechanical latch relay (202) coupled to a Double Pole Double Throw (DPDT) push button (208), wherein the dual coil mechanical latch relay (202) comprises of a first coil Coil 1, a second coil Coil 2 and a mechanical latch. Further, the SMPS (202) is coupled to a primary Resistor–Capacitor (RC) circuit. During operation of the system on activation of the DPDT push button (208) connects the mechanical latch to the first Coil 1 and the SMPS (202) is powered ON to generate a standby voltage. Further to generation of the standby voltage the primary RC circuit is activated for a predefined time. In one example, the primary RC circuit is configured to deactivate upon a) completion of the predefined time delay and b) occurrence of a no load condition. Subsequently, upon deactivation of the primary RC circuit the transistor Q1 activates the second Coil 2. Upon activation of the second Coil 2, the mechanical latch disconnects from the first Coil 1 and connects to the second Coil 2, disengaging the SMPS for the main power supply and thereby controlling power consumption by an electronic device in a no load condition.
[007] In one implementation, a method for controlling power in a no load condition is disclosed. In one aspect, the method may comprise powering a SMPS to generate a standby voltage based on an activation of a dual coil mechanical latch relay via a Double Pole Double Throw (DPDT) push button. The dual coil mechanical latch relay comprises of a first Coil 1, a second Coil 2 and a mechanical latch wherein upon activation of the DPDT push button the mechanical latch is connected to the first Coil 1. The another aspect, the method comprises deactivating a primary Resistor–Capacitor (RC) circuit upon a) completion of a predefined time delay and b) occurrence of a no load condition wherein the RC circuit coupled to the SMPS is activated upon generation of the standby voltage for the predefined time. In another aspect, the method comprises activating a transistor Q1, coupled to the primary RC circuit,
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upon deactivation of the primary RC circuit. The transistor Q1 coupled through a transistor Q2 of the primary RC circuit activates the second Coil 2 and upon activation of second Coil 2 the mechanical latch disconnects from the first Coil 1 and connects to the second Coil 2, thereby controlling power consumption by an electronic device in a no load condition.
BRIEF DESCRIPTION OF THE DRAWINGS
[008] The foregoing detailed description of embodiments is better understood when read in conjunction with the appended drawings. For the purpose of illustrating the disclosure, there is shown in the present document example constructions of the disclosure. However, the disclosure is not limited to the specific method and system for controlling power in no load condition.
[009] The detailed description is described with reference to the accompanying figures. In the figures, the left-most digit(s) of a reference number identifies the figure in which the reference number first appears. The same numbers are used throughout the drawings to refer like features and components.
[0010] Figure 1 illustrates pie chart representing the energy consumed in KWh per year for a desktop with monitor in a workplace in an ON and SHUTDOWN state.
[0011] Figure 2 illustrates a detailed exemplary control circuit diagram of a system for controlling power in a no load condition, in accordance with an embodiment of the present disclosure.
[0012] Figure 3 illustrates a flowchart showing the method to control power in a no load condition, in accordance with an embodiment of the present disclosure.
DETAILED DESCRIPTION
[0013] The exemplary embodiments of the present disclosure are described herein in detail, though the present disclosure is not limited to these embodiments. Various modifications to the embodiment will be readily apparent to those skilled in the art and the generic principles herein may be applied to other embodiments. However, one of ordinary skill in the art will readily recognize that the present disclosure is not intended to be limited to the embodiments illustrated, but is to be accorded the widest scope consistent with the principles and features described herein.
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[0014] The words “comprising”, “having”, “containing”, and “including”, and other forms thereof, are intended to be equivalent in meaning and be open ended in that an item or items following any one of these words is not meant to be an exhaustive listing of such item or items, or meant to be limited to only the listed item or items. It must also be noted that as used herein, the singular forms “a”, “an”, and “the” include plural references unless the context clearly dictates otherwise. Although any method and system similar or equivalent to those described herein can be used in for controlling power in no load condition, embodiments of the present disclosure, the exemplary, methods and systems are now described.
[0015] Typically, a desktop computer and LCD monitor together consume nearly 4 watt of electricity only if the main power is in ON state and the device is not started or in SHUT DOWN state after working hours. The given calculation is based on an example that working hours in an organization per year are 250 working days wherein each day working hours are 8 hours equalizing to 2000 working hours in a year which is 22.8% of the total working hours in a year. Further referring to Figure 1, for a desktop computer and monitor the average consumption of energy in ON state is 203.16KWh in a year and 26.84 KWh in a year in SHUT DOWN state i.e. 88% of the energy is utilized in working ON state and 12% of the energy is utilized in SHUT DOWN state. This increase in energy utilization leads to increase in the cost of energy consumed which approximately amounts to 11.67%. Though, the amount may not seem significant if considered for a single desktop computer with LCD monitor for a year, however, it would be significant for an organization which has multiple desktop computers with LCD monitor leading to additional cost for energy consumption.
[0016] Further, the table 1 demonstrates the calculations based on average consumption of a desktop computer and LCD monitor in an organization.
Table 1: average consumption of a desktop computer and LCD monitor in an organization Device
Power used in SHUT DOWN (Watt)
Power used in
ON State(Watt)
Reference
LCD Monitor
1.13
27.61
A study by Lawrence Berkeley
Desktop Computer
2.84
73.97
6
Total
3.97
101.58
National Laboratory, Berkeley, CA, USA
Hours in Year
6760
Inactive (SHUT DOWN state)
2000
On State(Working)
250 working days in a year after excluding 102 weekend days and 11 other holidays. (Active hours taken @ 8 hours per working day.)
Energy per Year(KWh)
26.84
203.16
11.67%
88.33%
Cost per desktop computer with LCD monitor per year.
₹ 161.02
₹ 1,218.96
Average electricity price per KWh for commercial use in India @ Rs. 6.00
In SHUT DOWN State
In ON state
75000 desktop computers across all offices assumed for calculation for an establishment like HCL employing more than 100000 employees
Average yearly energy cost for 75000 desktop computer (+LCD Monitor) in offices.
₹ 1,20,76,740
₹ 9,14,22,000
% age of Total Cost
11.67%
88.33%
[0017] It is noted that undesirable loss of power occurs even if an electronic device is in a SHUT DOWN state but the main power is in ON state. Thus, there exists a demand for enhanced methods and techniques to reduce the energy consumed by electronic devices in a SHUT DOWN state.
[0018] While aspects of described method and system for controlling power in no load condition using the SMPS may be implemented in any number of different devices and/or configurations, the embodiments are described in the context of the following exemplary apparatus.
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[0019] The present invention provides a system and method for controlling power consumption in a no load condition using Switching Mode Power Supply (SMPS). An enhanced SMPS in a control circuit is implemented that triggers physical disconnection of the mains power within a predetermined time interval of shutting down the electronic device connected to the SMPS. Further, the physical disconnection of the main power is triggered by the dual coil mechanical latch relay controlled by the control circuit. The dual coil mechanical latch relay comprises of two coils wherein a first Coil 1, when activated, connects mains power to SMPS and a second Coil 2, when activated, disconnects mains power to SMPS. In one embodiment, a manual push button allows powering of the SMPS while starting an electronic device. In another embodiment, the present enhancement to SMPS maybe by-passed by a switch in the control circuit wherein the SMPS is required to be powered ON even after the device is shut down.
[0020] Typically, upon activation of the control circuit by the manual push button the first Coil 1 connects with the main power thereby pulling the switch that connects mains power with SMPS. Further, the SMPS remains in the power ON state as the dual coil mechanical latch relay latches the connection mechanically thus keeping the mains power connected to SMPS. If in the condition, the electronic device is not powered ON, the charged capacitor discharges in a predetermined time interval by activating the second Coil 2. The activated second Coil 2 pulls the connector to disconnect the main power from SMPS.
[0021] Referring to Figure 2, the figure illustrates a detailed exemplary control circuit diagram (200) of a system for controlling power by physically disconnecting the main power in a no load condition using a Switching Mode Power Supply (SMPS). The physical disconnection is triggered in a predetermined time interval by a dual coil mechanical latch relay (202) controlled by a control circuit (200). In one embodiment, the dual coil mechanical latch relay (202) maybe electrically ‘set’ in one position and remain ‘latched in that position until electrically reset to the opposition position. Further, the dual coil mechanical latch relay (202) doesn’t require continuous supply of power to keep the switch in ON or OFF state, thereby consuming a small amount of energy during switching ON or OFF. Furthermore, the dual coil mechanical latch relay (202) comprises of two internal coils, a first Coil 1 and a second Coil 2 that connects or disconnects the mains power from SMPS. The first Coil 1 and the second Coil 2 maybe connected to a coil voltage of 5V that maybe individually activated to connect or disconnect mains power. In another embodiment, the exemplary control circuit
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(200) comprises of a double pole double throw (DPDT) push button (208), wherein the DPDT is a typically known momentary switch that maybe capable to control two separate circuits connected to a single actuator.
[0022] In further embodiment of the control circuit (200), the control circuit (200) may comprise of a resistance R1, R2, R3 and R4 and capacitors C1, C2 and C3 and transistors Q1 and Q2 and a SMPS unit that maybe an ATX SMPS unit (210) with one or more connectors along with the dual coil mechanical latch relay (202). The control circuit (200) further comprises an AC power main (206) and a By-pass switch (204). It maybe understood that the Figure 2 is an exemplary control circuit (200) and various combinations of the control circuit are possible to enable the present invention.
[0023] Still referring to Figure 2, during operation, the DPDT push button (208) is pressed momentarily. The DPDT push button (208) connects the first Coil 1 of the dual coil mechanical latch relay (202) with the AC main power (206) via the half wave rectifier. The half wave rectifier maybe formed by two diodes and a capacitor C1 that converts AC to DC that in one example maybe be from 5V AC to 5V DC. Further, in one example embodiment the electrical resistance of the resistor R2 maybe 56 Ohm and the value of capacitor C1 maybe 1000 μF. The 5V DC further activates the first Coil 1, which in turn pulls the mechanical latch of the dual coil mechanical latch relay (202). Thus, the coupling of the first Coil 1 and the mechanical latch completes the circuit and connects mains power with SMPS unit to power the SMPS in ON state. In one embodiment, the SMPS unit is an ATX SMPS unit (210) that is powered ON by coupling of the first Coil 1 and the mechanical latch. The ATX SMPS unit (210) in powered ON state instantaneously generates a standby voltage supply, at power supply output pin 9 of the ATC SMPS unit (210). In one example, the standby voltage supply maybe +5 VSB.
[0024] Further, the power supply output pin 9 of the ATX SMPS unit (210) connects to a primary resistor–capacitor circuit (RC circuit) formed by capacitor and resistor. In one embodiment, the power supply at output pin 9 maybe +5 VSB and the capacitor maybe C3 and resistor as R3. In one exemplary embodiment, the electrical resistance of the resistor R3 maybe 3.3M Ohm and the value of capacitor C3 maybe 100 μF. Further, the standby voltage supply maybe connected to the primary RC circuit through same DPDT push button (208) that powers the first Coil 1 and thereby charging the capacitor C3. The charged capacitor C3 switches ON transistor Q2, thus grounding any voltage provided to the gate of transistor Q1,
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prompting transistor Q1 to remain in OFF state and so prevent the second Coil 2 from being activated. In one exemplary embodiment, the transistor Q1 and Q2 maybe BS170. Upon activation, the second Coil 2 would trigger disconnection of power of ATX SMPS unit (210) as the mechanical latch of the dual coil mechanical latch relay (202) disconnects from the first Coil 1 and connects to the second Coil 2.
[0025] In one embodiment, a capacitor C2 is connected in parallel to the second Coil 2 to prevent activation of the second Coil 2 till C3, R3 switches ON Q2 when the standby voltage supply is in ON state. Further, the capacitor C2 enables that the second Coil 2 is not triggered till the standby voltage supply is stabilized when the ATX SMPS unit (210) is in ON state. The ATX SMPS unit (210) remains in powered ON state till the mechanical latch of the dual coil mechanical latch relay (202) latches the connection mechanically to keep the main power connected to the ATC SMPS unit (210). The charged capacitor C3 keeps the transistor Q2 in ON and the transistor Q1 in OFF state thus leading to keeping second Coil 2 in OFF state. In one embodiment, the power to disconnect is taken from standby voltage supply that maybe available even after the ATX SMPS unit (210) is shut down but the main power in in ON state i.e. standby power.
[0026] In another embodiment, a bypass switch (204) maybe provided in condition the ATX SMPS unit (210) is required to be kept in powered ON state even after the electronic device is SHUT DOWN state. When this bypass switch (204) is kept in ON state, the bypass switch (204) facilitates by directly providing AC mains Power to ATX SMPS unit (210) by bypassing the mechanical latch of the dual coil mechanical latch relay (202) and keeping the main power in continuously ON state.
[0027] As an example, considering that the control circuit is implemented for a desktop computer and the desktop computer is not started by pressing power ON button of the desktop, then the capacitor C3 may discharge though resistance R3 after a predetermined time has passed to switch OFF the transistor Q2. In one example, the predetermined time maybe an approximate of 330 seconds i.e. 5 ½ minutes. A positive voltage through resistance R4 is provided to transistor Q1, that switches ON transistor Q1 and further activate second Coil 2. The activated second Coil 2 further pulls the mechanical latch of the dual coil mechanical latch relay (202) and thus physically disconnects the main power from ATX SMPS unit (210). The dual coil mechanical latch relay (202) remains in disconnected state
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due to mechanical latch being in connection with second Coil 2 and remains in the state till the first Coil 1 is charged again by pressing the DPDT push button (208).
[0028] Further, to the above example of implementing the control circuit (200) for a desktop computer, in the condition the desktop computer is switched ON within 330 seconds of ATX SMPS unit (210) getting powered ON, the SMPS generates a 5V power supply on the power rails which is provided to transistor Q2 through diode. The transistor Q2 remains in switched ON state to keep the transistor Q1 in switched OFF state until the power rails are in ON state. The second Coil 2 doesn’t get activated till the desktop computer is in ON state. However, upon shutting down the desktop computer, the +5V on power rails is put OFF by SMPS thus leading to discharging of capacitor C3 through resistance R3 in 330 seconds and switching OFF transistor Q2, in turn switching ON transistor Q1 and activates second Coil 2 to physically disconnect main power in a no load condition.
[0029] Referring to Figure 3, the flowchart shows the method to control power in a no load condition. The method (300) may be described in the general context of any electronic device connected to a SMPS. The order in which the method (300) is described is not intended to be construed as a limitation, and any number of the described method blocks can be combined in any order to implement the method (300) or alternate methods. Additionally, individual blocks may be deleted from the method (300) without departing from the spirit and scope of the subject matter described herein. Furthermore, the method (300) can be implemented in any suitable electronic device or combination thereof.
[0030] At block (302), a ATX SMPS unit (210) is powered to generate a standby voltage supply based on an activation of a dual coil mechanical latch relay (202) via a Double Pole Double Throw (DPDT) push button (208) connected in a control circuit (200). The dual coil mechanical latch relay (202) comprises of a first Coil1, a second Coil 2 and a mechanical latch wherein upon activation of the DPDT push button (208) the mechanical latch is connected to the first Coil 1.
[0031] At block (304), a primary Resistor–Capacitor (RC) circuit is coupled to the SMPS, wherein upon generation of the standby voltage the primary RC circuit is activated for a predefined time. The primary RC circuit is configured to deactivate upon a) completion of the predefined time delay and b) occurrence of a no load condition.
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[0032] At block (306), the primary RC circuit is discharged that puts transistor Q1 in ON state and further activates the second Coil 2 and wherein upon activation of second Coil 2 the mechanical latch of the dual coil mechanical latch relay (202) disconnects from the first Coil 1 and connects to the second Coil 2).
[0033] Although implementations for system and method for controlling power in no load condition using the SMPS have been described in language specific to circuit diagram and/or methods, it is to be understood that the appended claims are not necessarily limited to the specific features or methods described. Rather, the specific features and methods are disclosed as examples of implementations for controlling power in no load condition using the SMPS.
[0034] Some embodiments may enable enhancement to existing SMPS units used in electronic devices such that the control circuit physically disconnects mains power after the electronic device is shut down.
[0035] Some embodiments may enable reduction in consumption of power by 10-15% annually of desktops computers and monitors.
[0036] Some embodiments may enable enhancement of dual coil mechanical latch relay such that that is does not require continuous power to keep the switch in position ON or OFF thus, consuming minimal momentary power.
[0037] Thus, in this manner explained, the aforementioned system and methodology are advantageous for controlling power in no load condition using the SMPS. The method and apparatus can be used in various electronic devices but particularly in mobile phone chargers, computer and the like.

WE CLAIM:
1. A system for controlling power consumption by an electronic device in a no load condition, the system comprising:
a Switching Mode Power Supply (SMPS) (210) connected to an electronic device;
a control circuit (200) coupled to the SMPS (210) and the main power (206), wherein the control circuit (200) further comprises:
a dual coil mechanical latch relay (202) coupled to a Double Pole Double Throw (DPDT) push button (208), wherein the dual coil mechanical latch relay (202) comprises of a first Coil1, a second Coil2 and a mechanical latch, wherein during operation upon activation of the DPDT push button (208) the mechanical latch is connected to the first Coil1 and the SMPS (210) is powered ON to generate a standby voltage;
a primary Resistor–Capacitor (RC) circuit coupled to the SMPS (210), wherein upon generation of the standby voltage the primary RC circuit is activated for a predefined time, and wherein the primary RC circuit is configured to deactivate upon a) completion of the predefined time delay and b) occurrence of a no load condition;
a transistor Q1 coupled through a transistor Q2 of the primary RC circuit wherein the transistor Q1 activates the second Coil 2 upon deactivation of the primary Resistor–Capacitor (RC) circuit, and wherein upon activation of second Coil 2 the mechanical latch disconnects from the first Coil 1 and connects to the second Coil 2, thereby controlling power consumption by an electronic device in a no load condition.
2. A system of claim 1, wherein a half wave rectifier is coupled between a dual coil mechanical latch relay (202) and a Double Pole Double Throw (DPDT) push button (208) wherein the half-wave rectifier comprises of two diodes and a capacitor.
3. A system of claim 1, wherein the dual coil mechanical latch relay (202) latches the connection mechanically to keep the main power connected to the SMPS (210).
4. A system of claim 1, wherein the predefined time delay is of 330 seconds.
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5. A system of claim 1, wherein the control circuit (200) comprises of a bypass switch (204), wherein the bypass switch (204) maintains the control circuit in ON state at all time.
6. A method for controlling power consumption in a no load condition, the method comprising:
powering a SMPS to generate a standby voltage based on an activation of a dual coil mechanical latch relay via a Double Pole Double Throw (DPDT) push button wherein the dual coil mechanical latch relay comprises of a first Coil1, a second Coil 2 and a mechanical latch wherein upon activation of the DPDT push button the mechanical latch is connected to the first coil C1;
deactivating a primary Resistor–Capacitor (RC) circuit upon a) completion of a predefined time delay and b) occurrence of a no load condition wherein the RC circuit coupled to the SMPS is activated upon generation of the standby voltage for the predefined time;
activating a transistor Q1 coupled through a transistor Q2 of the primary RC circuit wherein the transistor Q1 activates the second Coil 2 upon deactivation of the primary Resistor–Capacitor (RC) circuit, and wherein upon activation of second Coil 2 the mechanical latch disconnects from the first Coil 1 and connects to the second Coil 2, thereby controlling power consumption by an electronic device in a no load condition.
7. A method of claim 6, wherein a half wave rectifier is coupled between a dual coil mechanical latch relay and a Double Pole Double Throw (DPDT) push button wherein the half-wave rectifier comprises of two diodes and a capacitor.
8. A method of claim 6, wherein the dual coil mechanical latch relay latches the connection mechanically to keep the main power connected to the SMPS.
9. A method of claim 6, wherein the predefined time delay is of 330 seconds.
10. A method of claim 6, wherein the control circuit comprises of a bypass switch, wherein the bypass switch maintains the control circuit in ON state at all time.