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Method And System For Developing Alternates For Design Of Electronic Assembly

Abstract: ABSTRACT METHOD AND SYSTEM FOR DEVELOPING ALTERNATES FOR DESIGN OF ELECTRONIC ASSEMBLY The present disclosure describes a system (100) for developing an alternate design for a pre-existing design of an electronic assembly. The system (100) comprises an input arrangement (102) configured to receive instructions from an operator, an output arrangement (104) configured to provide the alternate design to the operator, and a data processing arrangement (106). The data processing arrangement (106) is configured to: receive the pre-existing design via the input arrangement (102), identify at least one passive element present in the electronic assembly, extract a plurality of cost values associated with each of the at least one passive element from a pre-existing database, compare the plurality of cost values with a specific threshold value, identify at least one minimal cost value for each of the at least one passive element based on the comparison, generate the alternate design by utilising the at least one minimal cost value. FIG. 3

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
02 August 2022
Publication Number
48/2022
Publication Type
INA
Invention Field
ELECTRONICS
Status
Email
contact@jtattorneyalliance.com
Parent Application
Patent Number
Legal Status
Grant Date
2023-06-02
Renewal Date

Applicants

MATTER MOTOR WORKS PRIVATE LIMITED
301, PARISHRAM BUILDING, 5B RASHMI SOC., NR. MITHAKHALI SIX ROADS, NAVRANGPURA AHMEDABAD, GUJARAT, INDIA - 380009

Inventors

1. DEVBRAT PANDEY
301, PARISHRAM BUILDING, 5B RASHMI SOC., NR. MITHAKHALI SIX ROADS, NAVRANGPURA AHMEDABAD, GUJARAT, INDIA - 380009
2. DR. PRASHANT JAIN
301, PARISHRAM BUILDING, 5B RASHMI SOC., NR. MITHAKHALI SIX ROADS, NAVRANGPURA AHMEDABAD, GUJARAT, INDIA - 380009
3. SHUBHAM RAJKUMAR KORE
301, PARISHRAM BUILDING, 5B RASHMI SOC., NR. MITHAKHALI SIX ROADS, NAVRANGPURA AHMEDABAD, GUJARAT, INDIA - 380009
4. SHIVAM GARG
301, PARISHRAM BUILDING, 5B RASHMI SOC., NR. MITHAKHALI SIX ROADS, NAVRANGPURA AHMEDABAD, GUJARAT, INDIA - 380009

Specification

DESC:METHOD AND SYSTEM FOR DEVELOPING ALTERNATES FOR DESIGN OF ELECTRONIC ASSEMBLY

CROSS REFERENCE TO RELATED APPLICATIONS
[01] The present application claims priority from Indian Provisional Patent Application No. 202221044122 filed on 2nd August 2022, the entirety of which is incorporated herein by a reference.
TECHNICAL FIELD
[02] Generally, the present disclosure relates to a process for creating alternates for a pre-existing design. In particular, the present disclosure relates to a method and system for generating alternates for a pre-existing design of an electronic assembly such that the alternates for the pre-existing are Electromagnetic interference (EMI) and Electromagnetic compatibility (EMC) norms qualified.
BACKGROUND
[03] Electromagnetic emissions can affect the functioning of electronic devices, electrical systems, and radio frequency (RF) systems. Regulatory agencies are formed all over the world to monitor electromagnetic emissions happening from such devices or systems, and to inhibit electromagnetic emission causing unnecessary disturbances.
[04] In automobiles, numerous electronic and electrical assemblies are employed which generate remarkable broadband Electromagnetic Interference (EMI) and bring great challenges in achieving Electromagnetic Compatibility (EMC) designs. The Regulatory agencies have defined EMI regulations and it is mandatory for devices and systems to comply with these regulations.
[05] Compliance with the EMI regulations is determined by conducting tests in multiple phases while designing the electronic and electrical assemblies. This testing and the redesigning process is very costly and time consuming. Hence, we require simulation and analytic methods to accurately predict EMI performance and improve the stability and reliability of the assemblies.
[06] At present, a system is provided which optimizes design of an electronic assembly by simulating EMI and EMC analysis of an electronic assembly. The system performs simulation of the EMI and EMC analysis of the components present in the electronic assembly in order to identify best fit designs of the components. The best fit design of the components provides an optimal design of the electronic assembly. This system provides the optimal design of the electronic assembly in compliance with the EMI and EMC regulation but does not provide cost effective design of the electronic assembly.
[07] Thus, there exists a need for a method and a system capable of providing cost effective design of the electronic assembly such that the cost-effective design is also in compliance with the EMI and EMC regulation.
SUMMARY
[08] An object of the present disclosure is to provide a system for providing cost effective design of the electronic assembly such that the cost-effective design is also in compliance with the EMI and EMC regulation.
[09] Another object of the present disclosure is to provide a system for minimizing noise level of the cost-effective design of the electronic assembly during an operating state of the electronic assembly.
[010] Another object of the present disclosure is to provide a system for enhancing the operating efficiency of the electronic assembly by minimizing noise level of the cost-effective design of the electronic assembly.
[011] In an aspect of the present disclosure, there is provided a system for developing an alternate design for a pre-existing design of an electronic assembly, in accordance with a non-limiting embodiment of the present disclosure. The system comprises an input arrangement configured to receive instructions from an operator, an output arrangement configured to provide the alternate designs to the operator, and a data processing arrangement. The data processing arrangement is configured to: receive pre-existing design of the electronic assembly via the input arrangement, identify at least one passive element present in the electronic assembly, receive a plurality of cost values associated with each of the at least one passive element from a pre-existing database, compare the plurality of cost values with a specific threshold value, identify at least one minimal cost value for each of the at least one passive element based on the comparison, derive the alternate design for the pre-existing design by utilising the at least one minimal cost value for each of the at least one passive element, and display the alternate design for the electronic assembly to the operator on the output arrangement.
[012] In another aspect of the present disclosure, there is provided a method for developing an alternate design for a pre-existing design of an electronic assembly, in accordance with a non-limiting embodiment of the present disclosure. The method comprises receiving pre-existing design of the electronic assembly, via an input arrangement. The method further comprises identifying at least one passive element present in the electronic assembly. The method further comprises receiving a plurality of cost values associated with each of the at least one passive element from a pre-existing database. The method further comprises comparing the plurality of cost values with a specific threshold value. The method further comprises identifying at least one minimal cost value for each of the at least one passive element based on the comparison. The method further comprises generating the alternate design for the pre-existing design by utilising the at least one minimal cost value for each of the at least one passive element. Lastly, the method comprises displaying the alternate design for the electronic assembly to the operator on an output arrangement.
[013] The method and the system, as disclosed in the present disclosure is advantageous in terms of providing cost effective design of the electronic assembly such that the cost-effective design is also in compliance with the EMI and EMC regulation. Further, the method and the system, as disclosed in the present disclosure, minimizes noise level of the cost-effective design of the electronic assembly during an operating state of the electronic assembly. Further, the method and the system, as disclosed in the present disclosure, enhances the operating efficiency of the electronic assembly by minimizing noise level of the cost-effective design of the electronic assembly.
[014] The present disclosure overcomes one or more shortcomings of the prior art and provides additional advantages discussed throughout the present disclosure.
[015] Other objects and advantages of the system of the present disclosure will be more apparent from the following description when read in conjunction with the accompanying figures, which are not intended to limit the scope of present disclosure.
[016] Additional features and advantages are realized through the techniques of the present disclosure. Other embodiments and aspects of the disclosure are described in detail herein and are considered a part of the claimed disclosure.
BRIEF DESCRIPTION OF THE DRAWINGS
[017] The summary above, as well as the following detailed description of illustrative embodiments, is better understood when read in conjunction with the appended drawings. For the purpose of illustrating the present disclosure, exemplary constructions of the disclosure are shown in the drawings. However, the present disclosure is not limited to specific methods and instrumentalities disclosed herein. Moreover, those in the art will understand that the drawings are not to scale. Wherever possible, like elements have been indicated by identical numbers.
[018] Embodiments of the present disclosure will now be described, by way of example only, with reference to the following diagrams wherein:
[019] FIG. 1 illustrates a block diagram of a system developing an alternate design for a pre-existing design of an electronic assembly, in accordance with an embodiment of the present disclosure.
[020] FIG. 2 illustrates a configuration of a data processing arrangement, in accordance with an embodiment of the present disclosure.
[021] FIG. 3 illustrates a flow chart of steps involved in the method of developing an alternate design for a pre-existing design of an electronic assembly, in accordance with an embodiment of the present disclosure.
[022] Common reference numerals are used throughout the drawings and the detailed description to indicate the same elements.
[023] In the accompanying drawings, an underlined number is employed to represent an item over which the underlined number is positioned or an item to which the underlined number is adjacent. A non-underlined number relates to an item identified by a line linking the non-underlined number to the item. When a number is non-underlined and accompanied by an associated arrow, the non-underlined number is used to identify a general item at which the arrow is pointing.
DETAILED DESCRIPTION
[024] The following detailed description illustrates embodiments of the present disclosure and ways in which they can be implemented. Although some modes of carrying out the present disclosure have been disclosed, those skilled in the art would recognise that the other embodiments for carrying out or practicing the present disclosure are also possible.
[025] The detailed description set forth below in connection with the appended drawings is intended as a description of certain embodiments for optimizing design of an electronic assembly and is not intended to represent the only forms that may be developed or utilized. The description sets forth the various structures and/or functions in connection with the illustrated embodiments; however, it is to be understood that the disclosed embodiments are merely exemplary of the present disclosure that may be embodied in various and alternative forms. The figures are not necessarily to scale; some features may be exaggerated or minimized to show details of particular components. Therefore, specific structural and functional details disclosed herein are not to be interpreted as limiting, but merely as a representative basis for teaching one skilled in the art to variously employ the present disclosure.
[026] While the disclosure is susceptible to various modifications and alternative forms, specific embodiment thereof has been shown by way of example in the drawings and will be described in detail below. It should be understood, however, that it is not intended to limit the disclosure to the particular forms disclosed, but on the contrary, the disclosure is to cover all modifications, equivalents, and alternatives falling within the scope of the disclosure.
[027] The terms “comprises”, “comprising”, “include(s)”, or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a setup, system or method that comprises a list of components or steps does not include only those components or steps but may include other components or steps not expressly listed or inherent to such setup or system or method. In other words, one or more elements in a system or apparatus preceded by “comprises… a” does not, without more constraints, preclude the existence of other elements or additional elements in the system or apparatus.
[028] In the following detailed description of the embodiments of the disclosure, reference is made to the accompanying drawings that form a part hereof, and which are shown by way of illustration specific embodiments in which the disclosure may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the disclosure, and it is to be understood that other embodiments may be utilized and that changes may be made without departing from the scope of the present disclosure. The following description is, therefore, not to be taken in a limiting sense.
[029] The present disclosure will be described herein below with reference to the accompanying drawings. In the following description, well known functions or constructions are not described in detail since they would obscure the description with unnecessary detail.
[030] Referring to attached drawings, embodiments of the present disclosure will be described below. “front”, “rear”, “right”, “left”, “upper” and “lower” denote each position of a vehicle viewed from a rider. The drawings shall be viewed with regard to the reference numbers.
[031] The present disclosure describes a system that develops an alternate design for a pre-existing design of an electronic assembly. The electronic assembly means a number of electronic components (i.e., circuit elements, discrete components, integrated circuits, and so forth) connected together to perform one or more specific functions.
[032] Referring to Fig. 1, there is illustrated a block diagram of a system 100 for providing an alternative design for a pre-existing design of an electronic assembly, in accordance with an embodiment of the present disclosure. The pre-existing design of the electronic assembly is an optimal design of the electronic assembly. The optimal design of the electronic assembly is obtained by simulating Electromagnetic interference (EMI) and Electromagnetic compatibility (EMC) analysis of the electronic assembly.
[033] The EMI and EMC are both important considerations when working with electronic components. The EMI is caused by electromagnetic emissions that can disrupt the function of electronic devices and radio frequency (RF) systems. These devices and systems must be properly shielded from electromagnetic radiation for them to work well. The EMC measures how well these devices and systems can work in the presence of disruptive electromagnetic interference.
[034] The system 100, as disclosed in the present disclosure, includes an input arrangement 102, an output arrangement 104, and data processing arrangement 106. All the constituent elements of the system 100 illustrated in FIG. 1 are not essential constituent elements, and the system 100 may be implemented by more constituent elements than the constituent elements illustrated in FIG. 1 or less constituent elements.
[035] In Fig. 1, the input arrangement 102 is connected to output arrangement 104 and data processing arrangement 106 by a wireless/wired connection. The output arrangement 104 is connected to the data processing arrangement 106 by a wireless/wired connection.
[036] The input arrangement 102 may be, but not limited to, a menu screen including texts or image data (including various information data) and data such as icons, a list menu, and a combo box, and the like. The menu screen may be a touch screen.
[037] In a non-limiting example of an embodiment of the present disclosure, the system 100 receives by using the input arrangement 102 instruction from an operator. In particular, the operator provides information on the input arrangement 102. The information includes a command to perform a cost optimization process on the pre-existing design.
[038] In an embodiment, the operator manually inputs the instruction on the menu screen. In an alternative embodiment, the operator selects an option displayed on the input arrangement 102 in order to perform a cost optimization process on the pre-existing design.
[039] In a non-limiting example of an embodiment of the present disclosure, the system 100 receives information of the pre-existing design of the electronic assembly by using the input arrangement 102. In particular, the input arrangement 102 displays multiple pre-existing designs related to different electronic assemblies. The operator selects a pre-existing design from the multiple pre-existing designs on which the cost optimization process is to be performed. The pre-existing design includes components present in the pre-existing design and electrical connection of components, and electrical parameter information of the components.
[040] In an alternative embodiment, the input arrangement 102 may be, but not limited to, a USB port, antenna port, and so forth. The input arrangement 102 receives an instruction from an external device. The received instruction includes a command to perform the cost optimization process on the pre-existing design.
[041] In an alternative embodiment, the input arrangement 102 receives information of the pre-existing design from the external device. The received information includes components present in the pre-existing design and electrical connection of components, and electrical parameter information of the components.
[042] The output arrangement 104 may be, but not limited to, a menu screen including texts or image data (including various information data) and data such as icons, a list menu, and a combo box, and the like. The menu screen may be a touch screen.
[043] The output arrangement 104 provides an alternative design for the electronic assembly to the operator. In particular, the output arrangement 104 displays the cost optimized design of the electronic assembly after performing cost optimization process on the pre-existing design of the electronic assembly.
[044] In an alternative embodiment, the output arrangement 104 may be, but not limited to, a USB port, antenna port, and so forth. The output arrangement 204 transmits information of the cost optimized design of the electronic assembly to the external device.
[045] The data processing arrangement 106 generates the cost optimized design of the electronic assembly by performing the cost optimization process on the pre-existing design of the electronic assembly.
[046] The present disclosure discloses the system 100 which providing cost effective design of the electronic assembly such that the cost-effective design is also in compliance with the EMI and EMC regulation.
[047] The wired connection can be established using, without limitation, at least one of a wireline cable (for example, High-Definition Multimedia Interface (HDMITM), Mobile High-Definition Link (MHL), DisplayPort, Universal Serial Bus (USB), and so forth.
[048] The wireless connection can be established using, without limitation, at least one of Wireless Fidelity (Wi-Fi), Near Field Communication (NFC), Bluetooth, Bluetooth Low Energy (BLE), Zigbee, Wi-Fi Direct (WFD), and Ultra-Wideband (UWB).
[049] As illustrated in FIG. 2, the data processing arrangement 200 is constituted by an identification unit 202, an analysis unit 204, a processing unit 206, a generation unit 208, memory module 210, and a control unit 212. The data processing arrangement 200 is the same as the data processing arrangement 206 described in FIG. 2. All the constituent elements of the data processing arrangement 200 illustrated in FIG. 2 are not essential constituent elements, and the data processing arrangement 200 may be implemented by more constituent elements than the constituent elements illustrated in FIG. 2 or less constituent elements. All the constituent elements of the data processing arrangement 200 are communicably coupled to each other.
[050] In a non-limiting embodiment of the present disclosure, the identification unit 202 identifies at least one passive element present in the electronic assembly. In particular, the identification unit 202 receives information of the pre-existing design of the electronic assembly and identifies passive elements from the pre-existing design.
[051] In a non-limiting embodiment of the present disclosure, the analysis unit 204 extracts a plurality of cost values associated with each of the at least one passive element from a pre-existing database. In particular, the memory module 210 includes information of the different passive elements. The information of each passive element includes multiple design information. Each of the multiple design information includes design of the respective passive element, cost value of the design of the respective passive element, and a parasitic parameter value of the design of the respective passive element. The analysis unit 204 identifies at least one design information from the multiple design information for each of the passive elements. A parasitic parameter value of at least one design information from the multiple design information does not change the EMI and EMC performance of the pre-existing design. The analysis unit 204 extracts the cost value of the identified at least one design for each of the passive elements.
[052] In a non-limiting example of an embodiment of the present disclosure, there are two passive elements in the pre-existing design such as the passive elements A and B. The memory module 210 includes different designs for the passive element A along with a cost value and a parasitic parameter value of each of different designs of the passive element A. The analysis unit 204 selects designs whose parasitic parameter value does not change the EMI and EMC performance of the pre-existing design. The analysis unit 204 extracts the cost value of the selected designs of the passive element A. The memory module 210 includes different designs for the passive element B along with a cost value and a parasitic parameter value of each of the different designs of the passive element B. The analysis unit 204 selects designs whose parasitic parameter value does not change the EMI and EMC performance of the pre-existing design. The analysis unit 204 extracts the cost value of the selected designs of the passive element B.
[053] In a non-limiting embodiment of the present disclosure, the analysis unit 204 compares the plurality of the cost value with a specific threshold value and identifies at least one minimal cost value for each of at least one the passive element based on the comparison. In particular, the analysis unit 204 extracts the cost value of the selected at least one design for each of the passive elements. The analysis unit 204 compares the selected cost value of each of the selected at least one design with a threshold value. The analysis unit 204 discards the cost value that is greater than a threshold value and selects those cost values which are below the threshold value. If the cost value of the at least one design for each of the passive elements falls above the threshold value, then a design with that cost value is discarded to prohibit development of high cost design of the electronic assembly.
[054] In a non-limiting embodiment of the present disclosure, the processing unit 206 identifies a cost value of each of the generated plurality of designs and identifies a specific design from the plurality of designs based on the identified cost value of each of the generated plurality of designs. In particular, the processing unit 206 identifies a cost value of each of the multiple designs of the electronic assembly. The cost value corresponds to the value of the design of the electronic assembly by incorporating the cost values of each of the at least one passive element in the pre-existing design. The processing unit 206 identifies a design from the multiple designs for the electronic assembly by comparing the cost value of each of the multiple designs. The processing unit 206 identifies an optimal design from the multiple designs which has a minimum cost value among the cost value of the multiple designs.
[055] Alternatively, in the non-limiting embodiment of the present disclosure, the processing unit 206 performs simulation of the plurality of designs, identifies a noise level of each of the generated plurality of designs based on a result of the performed simulation of the plurality of designs, and derive the alternate design based on the identified noise level of each of the generated plurality of designs. In particular, the processing unit 206 performs simulation of the multiple designs by operating the multiple designs in a specific condition set by the user. The processing unit 206 determines an operating noise level of each of the multiple designs based on material property of the components of the multiple designs and operation of the design in the specific condition. The processing unit 206 compares the noise level of each of the multiple designs and identifies a design of the electronic assembly that includes a minimum noise level among a noise level of the multiple designs. The processing unit 206 identifies an optimal design from the multiple designs which has a minimum noise level among a noise level of the multiple designs. Therefore, selection of the cost effective based on noise level provides efficient functioning of the electronic assembly. Therefore, selecting the cost effective design based on the noise level minimizes the noise level of the cost-effective design of the electronic assembly during an operating state of the electronic assembly. Further, selecting the cost effective design enhances the operating efficiency of the electronic assembly by minimizing noise level of the cost-effective design of the electronic assembly.
[056] Alternatively, in the non-limiting embodiment of the present disclosure, the processing unit 206 identifies a cost value of each of the multiple designs of the electronic assembly. The cost value corresponds to the value of the design of the electronic assembly by incorporating the cost values of each of the at least one passive element in the pre-existing design. Further, the processing unit 206 performs simulation of the multiple designs by operating the multiple designs in a specific condition set by the user. The processing unit 206 determines a noise level of each of the multiple designs based on material property of the components of the multiple designs and the operation of the design in the specific condition. The processing unit 206 identifies a design from the multiple designs which has a low noise level and a cost value less than a specific value that is set by the user. Therefore, selecting the cost effective design based on the noise level minimizes the noise level of the cost-effective design of the electronic assembly during an operating state of the electronic assembly. Further, selecting the cost effective design enhances the operating efficiency of the electronic assembly by minimizing noise level of the cost-effective design of the electronic assembly.
[057] In a non-limiting example of an embodiment of the present disclosure, there are three designs A, B, and C. Cost of design A is X and noise level of the design A is X’. Cost of design B is Y and noise level of design B is Y’. Cost of design C is Z and noise level of the design C is Z’. The processing unit 206 compares the cost value of designs A, B, and C with a threshold value. The processing 206 determines that the cost value of B and C are below the threshold value. After the determination that the cost value of B and C are below the threshold value, the processing unit 206 compares the noise level of the designs B and C and identifies that the design C includes less noise than the noise level of the design B. The design C is selected as the cost optimal design of the electronic assembly.
[058] In a non-limiting embodiment of the present disclosure, the generation unit 208 generates a plurality of designs based on the at least one minimal cost value for each of the at least one passive element. In particular, the generation unit 208 identifies the pre-existing design on which the cost optimization is performed. The generation unit 208 generates multiple designs of the electronic assembly by using at least one cost value for each of the passive elements in the pre-existing design.
[059] In a non-limiting example of an embodiment of the present disclosure, there are two cost values of the passive element A and three cost values of the passive element B. The generation unit 208 identifies six designs of the electronic assembly by incorporating the combination of the cost value of the passive element A and the passive element B in the pre-existing design.
[060] The memory module 210 stores data, programs, and the like which are required to operate the data processing arrangement 200. Further, the memory module 210 includes information of the different passive elements. The information of each passive element includes multiple design information. Each multiple design information includes design of the respective passive element, cost value of the design of the respective passive element, and a parasitic parameter value of the design of the respective passive element.
[061] The memory module 210 may be, for example, conventional magnetic disks, magnetic tape storage, magneto-optical (MO) storage media, solid state disks, flash memory-based devices, or any other type of non-volatile storage devices suitable for storing large volumes of data. The memory module 210 may also be combinations of such devices. In the case of disk storage media, the memory module 210 may be organized into one or more volumes of redundant array of inexpensive disks (RAID).
[062] The control unit 212 controls an overall function of the data processing arrangement 200. In particular, the control unit 212 controls signal flows and data transmission between components 202-210 of the data processing arrangement 200 and performs data processing functions. The control unit 212 includes a processor which executes the programs stored in the memory module 210 and controls the overall functions of the data processing arrangement 200.
[063] FIG. 3 is a flowchart showing steps of a method 300 of providing an alternative design for a pre-existing design of an electronic assembly, in accordance with a non-limiting embodiment of the present disclosure. The method 300 starts at a step 302, at the step 302 the method includes receiving instructions from an operator via an input arrangement such as the input arrangement 102 of Fig. 1). The instruction includes a command to perform a cost optimization process on the pre-existing design.
[064] At a step 304 the method 300 includes receiving pre-existing design of the electronic assembly via the input arrangement. The pre-existing design includes components present in the pre-existing design and electrical connection of components, and electrical parameter information of the components.
[065] At a step 306 the method 300 includes identifying, by a data processing arrangement (such as data processing arrangement 106 of Fig. 1), at least one passive element present in the electronic assembly.
[066] At a step 308 the method 300 includes extracting by a data processing arrangement 106 a plurality of cost values associated with each of the at least one passive element from a pre-existing database. In particular, the data processing arrangement 106 includes information of the different passive elements. The information of each passive element includes multiple designs information. Each multiple design information includes design of the respective passive element, cost value of the design of the respective passive element, and a parasitic parameter value of the design of the respective passive element. The method 300 further includes identifying at least one design information from the multiple design information for each of the passive elements. A parasitic parameter value of the at least one design information does not change the EMI and EMC performance of the pre-existing design. The method 300 further includes extracting the cost value of the identified at least one design of each of the passive elements.
[067] At a step 310 the method 300 includes comparing by the data processing arrangement 106 the plurality of cost values with a specific threshold value and identifying at least one minimal cost value for each of the at least one passive element based on the comparison. In particular, the method 300 includes extracting the cost value of the selected at least one design for each of the passive elements. The method 300 further includes comparing the selected cost value of each of the selected at least one design with a threshold value. The method further includes discarding the cost value that is greater than a threshold value and selects those cost values which are below the threshold value. If the cost value of the at least one design for each of the passive elements falls above the threshold value, then a design with that cost value is discarded to prohibit development of high cost design of the electronic assembly.
[068] At a step 310 the method 300 includes generating by the data processing arrangement 106 the alternate design for the pre-existing design by utilising the at least one minimal cost value for each of the passive element. In particular, the method 300 includes identifying the pre-existing design on which the cost optimization is performed. The method 300 further includes generating multiple designs of the electronic assembly by using the at least one cost value of for each of the passive elements in the pre-existing design.
[069] At a step 312 the method 300 includes displaying the alternate design for the electronic assembly to the operator on an output arrangement.
[070] The present disclosure discloses that the method 300 includes which provides cost effective design of the electronic assembly such that the cost-effective design is also in compliance with the EMI and EMC regulation. Further, the method 300 minimizes noise level of the cost-effective design of the electronic assembly during an operating state of the electronic assembly. Further, the method 300 enhances the operating efficiency of the electronic assembly by minimizing noise level of the cost-effective design of the electronic assembly.
[071] The illustrated steps are set out to explain the exemplary embodiments shown, and it should be anticipated that ongoing technological development will change the manner in which particular functions are performed. These examples are presented herein for purposes of illustration, and not limitation. Further, the boundaries of the functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternative boundaries can be defined so long as the specified functions and relationships thereof are appropriately performed.
[072] As will be appreciated by one skilled in the art, the present disclosure may be embodied as a system, method, or computer program product. Accordingly, the present disclosure may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.), or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “circuit,” “module,” or “system.” Furthermore, the computer program instructions may also be loaded onto a computer and/or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer and/or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions/acts specified in the block diagrams and/or flowchart block or blocks.
[073] The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. Further, the user’s computer may include but not limited to cellular phones, personal digital assistants (PDAs), handheld devices, wireless modems, laptop computers, infotainment system of the vehicle, and so forth.
[074] The present disclosure is described below with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions.
[075] These computer program instructions may be provided to a processor of a general-purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer program instructions may also be stored in a computer-readable medium that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable medium produce an article of manufacture including instruction means which implement the function/act specified in the flowchart and/or block diagram block or blocks.
[076] A tangible, non-transitory, computer-readable medium may include an electronic, magnetic, optical, electromagnetic, or semiconductor data storage system, apparatus, or device. More specific examples of the computer readable medium would include the following: a portable computer diskette, a Random Access Memory (RAM) circuit, a read-only memory (ROM) circuit, an erasable programmable read-only memory (EPROM or flash memory) circuit, a portable compact disc read-only memory (CD-ROM), and a portable digital video disc read-only memory (DVD/Blu-ray).
[077] As used herein, the terms ‘processing unit’ and ‘processor’ used interchangeably and refer to a computational element that is operable to respond to and processes instructions that drive the system 200. Optionally, the processor includes, but is not limited to, a microprocessor, a microcontroller, a complex instruction set computing (CISC) microprocessor, a reduced instruction set (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, or any other type of processing circuit. Furthermore, the term “processor” may refer to one or more individual processors, processing devices and various elements associated with a processing device that may be shared by other processing devices. Additionally, the one or more individual processors, processing devices and elements are arranged in various architectures for responding to and processing the instructions that drive the system.
[078] As used herein, the term ‘communicably coupled’ refers to a bi-directional connection between the various components of the data processing arrangement 200. The bi-directional connection between the various components of the data processing arrangement 200 enables exchange of data between two or more components of the data processing arrangement 200. In an exemplary embodiment, the generating unit and the analysis unit are communicably coupled through a network.
[079] Throughout the present disclosure, the term “network” relates to an arrangement of interconnected programmable and/or non-programmable components that are configured to facilitate data communication between one or more electronic devices and/or databases, whether available or known at the time of filing or as later developed. Furthermore, the network may include, but is not limited to, a public network such as the global computer network known as the Internet, a private network, a cellular network and any other communication system or systems at one or more locations. Additionally, the network includes wired or wireless communication that can be carried out via any number of known protocols, including, but not limited to, Internet Protocol (IP), Wireless Access Protocol (WAP), Frame Relay, or Asynchronous Transfer Mode (ATM). Moreover, any other suitable protocols using voice, video, data, or combinations thereof, can also be employed. Moreover, although the system is frequently described herein as being implemented with TCP/IP communications protocols, the system may also be implemented using IPX, Appletalk, IP-6, NetBIOS, OSI, any tunnelling protocol (e.g. IPsec, SSH), or any number of existing or future protocols.
[080] Modifications to embodiments of the present disclosure described in the foregoing are possible without departing from the scope of the present disclosure as defined by the accompanying claims. Expressions such as "including", "comprising", "incorporating", "have", "is" used to describe and claim the present disclosure are intended to be construed in a non-exclusive manner, namely allowing for items, components or elements not explicitly described also to be present. Reference to the singular is also to be construed to relate to the plural where appropriate.
[081] Although embodiments have been described with reference to a number of illustrative embodiments thereof, it should be understood that numerous other modifications and embodiments can be devised by those skilled in the art that will fall within the spirit and scope of the principles of this disclosure. More particularly, various variations and modifications are possible in the component parts and/or arrangements of the subject combination arrangement within the scope of the present disclosure, the drawings and the appended claims. In addition to variations and modifications in the component parts and/or arrangements, alternative uses will also be apparent to those skilled in the art.

WE CLAIM:
1. A system (100) for developing an alternate design for a pre-existing design of an electronic assembly, the system (100) comprising:
an input arrangement (102) configured to receive instructions from an operator;
an output arrangement (104) configured to provide the alternate design to the operator; and
a data processing arrangement (106) configured to:
receive the pre-existing design of the electronic assembly via the input arrangement (102);
identify at least one passive element present in the electronic assembly;
extract a plurality of cost values associated with each of the at least one passive element from a pre-existing database;
compare the plurality of cost values with a specific threshold value;
identify at least one minimal cost value for each of the at least one passive element based on the comparison;
generate the alternate design for the pre-existing design by utilising the at least one minimal cost value for each of the at least one passive element; and
display the alternate design for the electronic assembly to the operator on the output arrangement (104).
2. The system (100) as claimed in claim 1, wherein the data processing arrangement (106) is configured to:
generate a plurality of designs based on the pre-existing design and the at least one minimal cost value for each of the at least one passive element;
identify a cost value of each of the generated plurality of designs; and
identify a specific design from the plurality of designs based on the identified cost value of each of the generated plurality of designs.
3. The system (100) as claimed in claim 1, wherein the data processing arrangement (106) is configured to:
generate a plurality of designs based on the pre-existing design and the at least one minimal cost value for each of the at least one passive element;
identify a noise level of each of the generated plurality of designs based on the generated plurality of designs; and
derive the alternate design based on the identified noise level of each of the generated plurality of designs.
4. The system (100) as claimed in claim 3, wherein the data processing arrangement (106) is configured to:
perform simulation of the plurality of designs;
identify a noise level of each of the plurality of design based on a result of the performed simulation of the plurality of designs; and
compare the noise level of the plurality of designs with each other.
5. A method for developing an alternate design for a pre-existing design of an electronic assembly, the method comprising:
receiving instructions from an operator via an input arrangement (102);
receiving the pre-existing design of the electronic assembly via the input arrangement (102);
identifying, by a data processing arrangement (106), at least one passive element present in the electronic assembly;
extracting by the data processing arrangement (106) a plurality of cost values associated with each of the at least one passive element from a pre-existing database;
comparing by the data processing arrangement (106) the plurality of cost values with a specific threshold value;
identifying by the data processing arrangement (106) at least one minimal cost value for each of the at least one passive element based on the comparison;
generating by the data processing arrangement (106) the alternate design for the pre-existing design by utilising the at least one minimal cost value for each of the at least one passive element; and
displaying the alternate design for the electronic assembly to the operator on an output arrangement (104).
6. The method as claimed in claim 5, the method further comprises:
generating, by the data processing arrangement (106), a plurality of designs based on the pre-existing design and the at least one minimal cost value for each of the at least one passive element;
identifying, by the data processing arrangement (106), a cost value of each of the generated plurality of designs; and
identifying, by the data processing arrangement (106), a specific design from the plurality of designs based on the identified cost value of each of the generated plurality of designs.
7. The method as claimed in claim 5, the method further comprises:
generating, by the data processing arrangement (106), a plurality of designs based on the pre-existing design and the at least one minimal cost value for each of the at least one passive element;
identifying, by the data processing arrangement (106), a noise level of each of the generated plurality of designs based on the generated plurality of designs; and
deriving, by the data processing arrangement (106), the alternate design based on the identified noise level of each of the generated plurality of designs.
8. The method as claimed in claim 7, the method further comprises:
performing, by the data processing arrangement (106), simulation of the plurality of designs;
identifying, by the data processing arrangement (106), a noise level of each of the plurality of design based on a result of the performed simulation of the plurality of designs; and
comparing, by the data processing arrangement (106), the noise level of the plurality of designs with each other.
ABSTRACT

METHOD AND SYSTEM FOR DEVELOPING ALTERNATES FOR DESIGN OF ELECTRONIC ASSEMBLY
The present disclosure describes a system (100) for developing an alternate design for a pre-existing design of an electronic assembly. The system (100) comprises an input arrangement (102) configured to receive instructions from an operator, an output arrangement (104) configured to provide the alternate design to the operator, and a data processing arrangement (106). The data processing arrangement (106) is configured to: receive the pre-existing design via the input arrangement (102), identify at least one passive element present in the electronic assembly, extract a plurality of cost values associated with each of the at least one passive element from a pre-existing database, compare the plurality of cost values with a specific threshold value, identify at least one minimal cost value for each of the at least one passive element based on the comparison, generate the alternate design by utilising the at least one minimal cost value.
FIG. 3
,CLAIMS:WE CLAIM:
1. A system (100) for developing an alternate design for a pre-existing design of an electronic assembly, the system (100) comprising:
an input arrangement (102) configured to receive instructions from an operator;
an output arrangement (104) configured to provide the alternate design to the operator; and
a data processing arrangement (106) configured to:
receive the pre-existing design of the electronic assembly via the input arrangement (102);
identify at least one passive element present in the electronic assembly;
extract a plurality of cost values associated with each of the at least one passive element from a pre-existing database;
compare the plurality of cost values with a specific threshold value;
identify at least one minimal cost value for each of the at least one passive element based on the comparison;
generate the alternate design for the pre-existing design by utilising the at least one minimal cost value for each of the at least one passive element; and
display the alternate design for the electronic assembly to the operator on the output arrangement (104).
2. The system (100) as claimed in claim 1, wherein the data processing arrangement (106) is configured to:
generate a plurality of designs based on the pre-existing design and the at least one minimal cost value for each of the at least one passive element;
identify a cost value of each of the generated plurality of designs; and
identify a specific design from the plurality of designs based on the identified cost value of each of the generated plurality of designs.
3. The system (100) as claimed in claim 1, wherein the data processing arrangement (106) is configured to:
generate a plurality of designs based on the pre-existing design and the at least one minimal cost value for each of the at least one passive element;
identify a noise level of each of the generated plurality of designs based on the generated plurality of designs; and
derive the alternate design based on the identified noise level of each of the generated plurality of designs.
4. The system (100) as claimed in claim 3, wherein the data processing arrangement (106) is configured to:
perform simulation of the plurality of designs;
identify a noise level of each of the plurality of design based on a result of the performed simulation of the plurality of designs; and
compare the noise level of the plurality of designs with each other.
5. A method for developing an alternate design for a pre-existing design of an electronic assembly, the method comprising:
receiving instructions from an operator via an input arrangement (102);
receiving the pre-existing design of the electronic assembly via the input arrangement (102);
identifying, by a data processing arrangement (106), at least one passive element present in the electronic assembly;
extracting by the data processing arrangement (106) a plurality of cost values associated with each of the at least one passive element from a pre-existing database;
comparing by the data processing arrangement (106) the plurality of cost values with a specific threshold value;
identifying by the data processing arrangement (106) at least one minimal cost value for each of the at least one passive element based on the comparison;
generating by the data processing arrangement (106) the alternate design for the pre-existing design by utilising the at least one minimal cost value for each of the at least one passive element; and
displaying the alternate design for the electronic assembly to the operator on an output arrangement (104).
6. The method as claimed in claim 5, the method further comprises:
generating, by the data processing arrangement (106), a plurality of designs based on the pre-existing design and the at least one minimal cost value for each of the at least one passive element;
identifying, by the data processing arrangement (106), a cost value of each of the generated plurality of designs; and
identifying, by the data processing arrangement (106), a specific design from the plurality of designs based on the identified cost value of each of the generated plurality of designs.
7. The method as claimed in claim 5, the method further comprises:
generating, by the data processing arrangement (106), a plurality of designs based on the pre-existing design and the at least one minimal cost value for each of the at least one passive element;
identifying, by the data processing arrangement (106), a noise level of each of the generated plurality of designs based on the generated plurality of designs; and
deriving, by the data processing arrangement (106), the alternate design based on the identified noise level of each of the generated plurality of designs.
8. The method as claimed in claim 7, the method further comprises:
performing, by the data processing arrangement (106), simulation of the plurality of designs;
identifying, by the data processing arrangement (106), a noise level of each of the plurality of design based on a result of the performed simulation of the plurality of designs; and
comparing, by the data processing arrangement (106), the noise level of the plurality of designs with each other.

Documents

Application Documents

# Name Date
1 202221044122-IntimationOfGrant02-06-2023.pdf 2023-06-02
1 202221044122-STATEMENT OF UNDERTAKING (FORM 3) [02-08-2022(online)].pdf 2022-08-02
2 202221044122-PatentCertificate02-06-2023.pdf 2023-06-02
2 202221044122-PROVISIONAL SPECIFICATION [02-08-2022(online)].pdf 2022-08-02
3 202221044122-POWER OF AUTHORITY [02-08-2022(online)].pdf 2022-08-02
3 202221044122-ENDORSEMENT BY INVENTORS [09-04-2023(online)].pdf 2023-04-09
4 202221044122-OTHERS [02-08-2022(online)].pdf 2022-08-02
4 202221044122-ABSTRACT [10-01-2023(online)].pdf 2023-01-10
5 202221044122-FORM FOR SMALL ENTITY(FORM-28) [02-08-2022(online)].pdf 2022-08-02
5 202221044122-CLAIMS [10-01-2023(online)].pdf 2023-01-10
6 202221044122-FORM FOR SMALL ENTITY [02-08-2022(online)].pdf 2022-08-02
6 202221044122-COMPLETE SPECIFICATION [10-01-2023(online)].pdf 2023-01-10
7 202221044122-FORM 1 [02-08-2022(online)].pdf 2022-08-02
7 202221044122-DRAWING [10-01-2023(online)].pdf 2023-01-10
8 202221044122-FIGURE OF ABSTRACT [02-08-2022(online)].pdf 2022-08-02
8 202221044122-FER_SER_REPLY [10-01-2023(online)].pdf 2023-01-10
9 202221044122-EVIDENCE FOR REGISTRATION UNDER SSI(FORM-28) [02-08-2022(online)].pdf 2022-08-02
9 202221044122-OTHERS [10-01-2023(online)].pdf 2023-01-10
10 202221044122-DRAWINGS [02-08-2022(online)].pdf 2022-08-02
10 202221044122-FER.pdf 2022-12-12
11 202221044122-DECLARATION OF INVENTORSHIP (FORM 5) [02-08-2022(online)].pdf 2022-08-02
11 Abstract.jpg 2022-11-24
12 202221044122-FORM 18A [23-11-2022(online)].pdf 2022-11-23
12 202221044122-FORM-26 [29-08-2022(online)].pdf 2022-08-29
13 202221044122-FORM28 [23-11-2022(online)].pdf 2022-11-23
13 202221044122-ORIGINAL UR 6(1A) FORM 1 & FORM 26-010922.pdf 2022-09-02
14 202221044122-DRAWING [21-10-2022(online)].pdf 2022-10-21
14 202221044122-MSME CERTIFICATE [23-11-2022(online)].pdf 2022-11-23
15 202221044122-COMPLETE SPECIFICATION [21-10-2022(online)].pdf 2022-10-21
15 202221044122-FORM-9 [22-11-2022(online)].pdf 2022-11-22
16 202221044122-COMPLETE SPECIFICATION [21-10-2022(online)].pdf 2022-10-21
16 202221044122-FORM-9 [22-11-2022(online)].pdf 2022-11-22
17 202221044122-MSME CERTIFICATE [23-11-2022(online)].pdf 2022-11-23
17 202221044122-DRAWING [21-10-2022(online)].pdf 2022-10-21
18 202221044122-FORM28 [23-11-2022(online)].pdf 2022-11-23
18 202221044122-ORIGINAL UR 6(1A) FORM 1 & FORM 26-010922.pdf 2022-09-02
19 202221044122-FORM 18A [23-11-2022(online)].pdf 2022-11-23
19 202221044122-FORM-26 [29-08-2022(online)].pdf 2022-08-29
20 202221044122-DECLARATION OF INVENTORSHIP (FORM 5) [02-08-2022(online)].pdf 2022-08-02
20 Abstract.jpg 2022-11-24
21 202221044122-DRAWINGS [02-08-2022(online)].pdf 2022-08-02
21 202221044122-FER.pdf 2022-12-12
22 202221044122-EVIDENCE FOR REGISTRATION UNDER SSI(FORM-28) [02-08-2022(online)].pdf 2022-08-02
22 202221044122-OTHERS [10-01-2023(online)].pdf 2023-01-10
23 202221044122-FER_SER_REPLY [10-01-2023(online)].pdf 2023-01-10
23 202221044122-FIGURE OF ABSTRACT [02-08-2022(online)].pdf 2022-08-02
24 202221044122-FORM 1 [02-08-2022(online)].pdf 2022-08-02
24 202221044122-DRAWING [10-01-2023(online)].pdf 2023-01-10
25 202221044122-FORM FOR SMALL ENTITY [02-08-2022(online)].pdf 2022-08-02
25 202221044122-COMPLETE SPECIFICATION [10-01-2023(online)].pdf 2023-01-10
26 202221044122-FORM FOR SMALL ENTITY(FORM-28) [02-08-2022(online)].pdf 2022-08-02
26 202221044122-CLAIMS [10-01-2023(online)].pdf 2023-01-10
27 202221044122-OTHERS [02-08-2022(online)].pdf 2022-08-02
27 202221044122-ABSTRACT [10-01-2023(online)].pdf 2023-01-10
28 202221044122-POWER OF AUTHORITY [02-08-2022(online)].pdf 2022-08-02
28 202221044122-ENDORSEMENT BY INVENTORS [09-04-2023(online)].pdf 2023-04-09
29 202221044122-PROVISIONAL SPECIFICATION [02-08-2022(online)].pdf 2022-08-02
29 202221044122-PatentCertificate02-06-2023.pdf 2023-06-02
30 202221044122-STATEMENT OF UNDERTAKING (FORM 3) [02-08-2022(online)].pdf 2022-08-02
30 202221044122-IntimationOfGrant02-06-2023.pdf 2023-06-02
31 202221044122-FORM-27 [28-08-2025(online)].pdf 2025-08-28

Search Strategy

1 SEARCHSTRATEGYE_09-12-2022.pdf

ERegister / Renewals

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From 02/08/2024 - To 02/08/2025

4th: 01 Aug 2024

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