Description:TECHNICAL FIELD
[0001] The present disclosure relates generally to field of electronics. More particularly, the present disclosure provides a method and system for implementation of one or more Boolean gate functions like NAND using single electron transistor.

BACKGROUND
[0002] Background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.
[0003] Transistors have a wide applicability in field of electronic devices, where the transistor can be source of information processing. Speed of information processing is an essential parameter for deciding storage and efficiency of processor and similar electronic units. Therefore, speed of information processing needs to be increased and maintained to perform operations fast and efficiently.
[0004] Existing solutions can include a new magnetic spin transistor. This spin transistor can be used as a memory element or logic gate, such as an OR, AND, NOT, NOR and NAND gate. The state of the magnetic spin transistor logic gate is set inductively. This new magnetic spin transistor/gate can be operated with current gain. Furthermore, inductive coupling permits the linking of multiple spin transistors and spin transistor gates to perform combinational tasks. A half adder embodiment is specifically described, and other logic gates and combinations of half adders can be constructed to perform arithmetic functions as part of a microprocessor. Another solution can include a C-element logic gate implemented as a spin logic device that provides a compact and low-power implementation of asynchronous logic by implementing a C-element with spintronic technology. Another solution can include a a linear array of three quantum dots, each containing a single spin polarized electron, and with nearest neighbor exchange coupling, acts as a NAND gate. The energy dissipated during switching this gate is the Landauer–Shannon limit of kT ln(1/pi) (T = ambient temperature and pi = intrinsic gate error probability). Another solution can include encoding digital bit information in the spin polarization of a single electron (or ensemble of electrons) and then using two mutually antiparallel polarizations to represent the binary bits 0 and 1 by using a SSL NAND Gate for General Purpose Computing. However, the solutions does not discloses about implementing Boolean gate functions like NAND gate using single electron transistor with magnetic field.
[0005] There is a need to overcome above mentioned problems of prior art by bringing a solution that facilitates in increasing speed of information processing without use of transistor. The solution helps in performing quantum computing in an Arithmetic logic unit (ALU) of a processor and enables in operation of a quantum processor at room temperature without 0 Kelvin temperature.

OBJECTS OF THE PRESENT DISCLOSURE
[0006] Some of the objects of the present disclosure, which at least one embodiment herein satisfies are as listed herein below.
[0007] It is an object of the present disclosure to provide a method and system for implementing one or more Boolean gate functions that facilitates in increasing rate at which speed, information doubles without significant increase in cost.
[0008] It is an object of the present disclosure to provide a method and system for implementing one or more Boolean gate functions that enables in achieving pace of doubling information, and speed much faster without requirement of transistor.
[0009] It is an object of the present disclosure to provide a method and system for implementing one or more Boolean gate functions by using Stern-Gerlach Experiment to find spin and making NAND Gate and an ALU (Algorithmic Logical Unit) which is the main logic behind the micro-processor.
[0010] It is an object of the present disclosure to provide a method and system for implementing one or more Boolean gate functions that helps in performing quantum computing in an Arithmetic logic unit (ALU) of a processor and enables in operation of a quantum processor at room temperature without 0 Kelvin temperature.

SUMMARY
[0011] The present disclosure relates generally to field of electronics. More particularly, the present disclosure provides a method and system for implementation of one or more Boolean gate functions like NAND using single electron transistor.
[0012] An aspect of the present disclosure pertains to a method for implementing one or more Boolean gate functions. The method may include a step of trapping, at a single electron transistor, one or more electrons, where the single electron transistor may facilitate in trapping the one or more electrons for measurement. The method may include a step of measuring, at the single electron transistor, a spin movement (-1/2, +1/2) of the trapped one or more electrons. The method may include a step of changing, at the single electron transistor, the spin movement of the one or more electrons through a magnetic field. The method may include a step of converting, at the single electron transistor, the spin movement value into a binary value. The method may include a step of implementing, at the single electron transistor, one or more Boolean gate functions using the converted binary value and facilitates in performing quantum computing.
[0013] In an aspect, the one or more electrons may be in a spin up state ?e=+1/2?e=+1/2 and one or more photons be in a spin down state ?P=-1?P=-1 during implementation of the one or more Boolean gate functions.
[0014] In an aspect, the one or more Boolean gate functions may include NAND gate.
[0015] In an aspect, the single electron transistor may be configured to receive a beam of silver atoms through the magnetic field, where the magnetic field may facilitate in determining deflection of the silver atoms.
[0016] In an aspect, the device may be configured with Arithmetic Logic Unit (ALU) of a quantum processor, where the device may facilitate in operating the quantum processor at room temperature without 0 Kelvin temperature.
[0017] Another aspect of the present disclosure pertains to a system for implementing one or more Boolean gate functions. The system may include a single electron transistor, where the single electron transistor may be configured to trap one or more electrons for measurement of spin movement and where a magnetic field may be applied in the single electron transistor, where the magnetic field may facilitates in changing the spin movement of the one or more electrons.
[0018] In an aspect, a binary value may be obtained for each of the spin movement, and where the single electron transistor may facilitate in implementing one or more Boolean gate functions using the converted binary value and enables in performing quantum computing.
[0019] In an aspect, the one or more electrons may be in a spin up state ?e=+1/2?e=+1/2 and one or more photons may be in a spin down state ?P=-1?P=-1 during implementation of the one or more Boolean gate functions.
[0020] In an aspect, the one or more Boolean gate functions may include NAND gate .
[0021] In an aspect, the single electron transistor may be configured to receive a beam of silver atoms through the magnetic field, where the magnetic field may facilitate in determining deflection of the silver atoms.
[0022] In an aspect, the system may be configured with Arithmetic Logic Unit (ALU) of a quantum processor, where the system may facilitate in operating the quantum processor at room temperature without 0 Kelvin temperature.

BRIEF DESCRIPTION OF THE DRAWINGS
[0023] The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.
[0024] The diagrams are for illustration only, which thus is not a limitation of the present disclosure, and wherein:
[0025] FIG. 1 illustrates an exemplary view of the proposed system for implementing one or more Boolean gate functions, in accordance with an embodiment of the present disclosure.
[0026] FIG. 2 illustrates an exemplary view of a Single Electron Transistor (SET) of the proposed system for implementing one or more Boolean gate functions, in accordance with an embodiment of the present disclosure.
[0027] FIG. 3 illustrates an exemplary flow diagram of method for implementing one or more Boolean gate functions, in accordance with an embodiment of the present disclosure.

DETAIL DESCRIPTION
[0028] In the following description, numerous specific details are set forth in order to provide a thorough understanding of embodiments of the present invention. It will be apparent to one skilled in the art that embodiments of the present invention may be practiced without some of these specific details.
[0029] Embodiments of the present invention include various steps, which will be described below. The steps may be performed by hardware components or may be embodied in machine-executable instructions, which may be used to cause a general-purpose or special-purpose processor programmed with the instructions to perform the steps. Alternatively, steps may be performed by a combination of hardware, software, firmware and/or by human operators.
[0030] If the specification states a component or feature “may”, “can”, “could”, or “might” be included or have a characteristic, that particular component or feature is not required to be included or have the characteristic.
[0031] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0032] While embodiments of the present invention have been illustrated and described, it will be clear that the invention is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents will be apparent to those skilled in the art, without departing from the spirit and scope of the invention, as described in the claim.
[0033] The present disclosure relates generally to field of electronics. More particularly, the present disclosure provides a method and system for implementation of one or more Boolean gate functions like NAND using single electron transistor.
[0034] FIG. 1 illustrates an exemplary view of the proposed system for implementing one or more Boolean gate functions, in accordance with an embodiment of the present disclosure.
[0035] FIG. 2 illustrates an exemplary view of a Single Electron Transistor (SET) of the proposed system for implementing one or more Boolean gate functions, in accordance with an embodiment of the present disclosure.
[0036] As illustrated in FIG. 1, the proposed system (100) (also referred to as system (100), herein) can include a Single Electron Transistor (SET) (102), where the SET can be configured to trap one or more electrons (104) for measurement of spin movement and where a magnetic field can be applied in the SET (102). In an embodiment, the magnetic field can facilitate in changing the spin movement of the one or more electrons (104), and where a binary value can be obtained for each of the spin movement. In another embodiment, SET (102) can facilitate in implementing one or more Boolean gate functions using the converted binary value and enables in performing quantum computing.
[0037] In an embodiment, the one or more electrons (104) can be in a spin up state ?e=+1/2?e=+1/2 and one or more photons can be in a spin down state ?P=-1?P=-1 during implementation of the one or more Boolean gate functions. In another embodiment, the one or more Boolean gate functions can include NAND gate. In yet another embodiment, the SET (102) can be configured to receive a beam of silver atoms through the magnetic field, where the magnetic field can facilitate in determining deflection of the silver atoms. The system (100) can be configured with Arithmetic Logic Unit (ALU) of a quantum processor, where the system (100) can facilitate in operating the quantum processor at room temperature without 0 Kelvin temperature.
[0038] In an illustrative embodiment, the SET (102) can be used to trap the one or more electrons (104) to make a NAND gate with help of Stern-Gerlach experiment to investigate spin of the one or more electrons (104). In another illustrative embodiment, the system (100) can help in performing quantum computations. In yet another illustrative embodiment, the system (100) can facilitate in implementing one or more Boolean logic using trapped one or more electrons (104), and spin of the one or more electrons (104).
[0039] In an illustrative embodiment, the SET (102) can trap the one or more electrons (104). In an embodiment, FIG. 2 illustrates an exemplary view of the SET (102), where The SET transistor can be viewed as an electron box that can have two separate junctions for entrance and exit of single electrons .The SET (102) can also be viewed as a field-effect transistor in which channel can be replaced by two tunnel junctions forming a metallic island. A voltage applied to gate electrode can affect amount of energy needed to change number of one or more electrons on the island.
[0040] In an illustrative embodiment, the SET (102) can include a gate electrode that electro statically can influence one or more electrons travelling between source and drain electrodes. The one or more electrons in the SET (100) need to cross two tunnel junctions that form an isolated conducting electrode called the island. One or more electrons passing through the island charge and discharge the island, and the relative energies of SET (102) containing 0 or 1 extra electrons depends on gate voltage. At a low source-drain voltage, a current can only flow through the SET (102) if these two charge configurations have same energy.
[0041] In an illustrative embodiment, SET (102) can be metallic or semiconducting, where principle for both the metallic or semiconducting SET can be based on use of insulating tunnel barriers to separate conducting electrodes. In another illustrative embodiment, metallic SET can include a metallic material such as a thin aluminum film to make all of the electrodes. The metal can be first evaporated through a shadow mask to form the source, drain and gate electrodes. The tunnel junctions can then be formed by introducing oxygen into chamber so that the metal becomes coated by a thin layer of its natural oxide. A second layer of the metal can be shifted from the first by rotating the metallic SET and evaporated to form the island.
[0042] In an illustrative embodiment, the semiconducting SET, the source, drain and island can usually be obtained by “cutting” regions in a two-dimensional electron gas formed at interface between two layers of semiconductors such as gallium aluminium arsenide and gallium arsenide. In this case, conducting regions can be defined by metallic electrodes patterned on the top semiconducting layer. Negative voltages applied to the electrodes can deplete the electron gas just beneath them, and the depleted regions can be made sufficiently narrow to allow tunnelling between the source, island and drain. In another illustrative embodiment, the electrode that shapes the island can be used as the gate electrode. In this semiconducting version of the SET (102), the island can often be referred to as a quantum dot, since the one or more electrons in the dot are confined in all three directions.
[0043] In an illustrative embodiment, the system (100) can use Stern-Gerlach Experiment to know the spin of the one or more electrons (104). The Stern–Gerlach experiment can involves sending a beam of silver atoms through an inhomogeneous magnetic field and observing deflection. Results of the Stern-Gerlach Experiment show that particles possess an intrinsic angular momentum that is closely analogous to angular momentum of a classically spinning object, but that takes only certain quantized values. Another important result is that only one component of a particle's spin can be measured at one time, meaning that the measurement of the spin along the z-axis destroys information about a particle's spin along the x and y axis. The experiment is normally conducted using electrically neutral particles such as silver atoms. This avoids large deflection in the path of a charged particle moving through a magnetic field and allows spin-dependent effects to dominate.
[0044] If the particle is treated as a classical spinning magnetic dipole, the particle can process in a magnetic field because of torque that the magnetic field exerts on the dipole (see torque-induced precession).If the particle moves through a homogeneous magnetic field, the forces exerted on opposite ends of the dipole cancel each other out and trajectory of the particle is unaffected. However, if the magnetic field is inhomogeneous then the force on one end of the dipole will be slightly greater than the opposing force on the other end, so that there is a net force which deflects the particle's trajectory. If the particles are classical spinning objects, distribution of spin angular momentum vectors can be random and continuous. Each particle can be deflected by an amount proportional to its magnetic moment, producing some density distribution on detector screen. The particles passing through the Stern–Gerlach apparatus can be deflected either up or down by a specific amount. This was a measurement of the quantum observable known as spin angular momentum, which demonstrated possible outcomes of a measurement and can have a discrete set of values or point spectrum. Although some discrete quantum phenomena, such as atomic spectra, can be observed much earlier, the Stern–Gerlach experiment can facilitate in directly observing separation between discrete quantum states .Theoretically, quantum angular momentum of any kind has a discrete spectrum, which is sometimes briefly expressed as "angular momentum is quantized".
[0045] In an embodiment, the system (100) can use Magnetic field to change the spin of the one or more electrons (104), since magnetic field includes of one or more photons. If a photon from the one or more photons collide with an electron from the one or more electrons (104)., spin can be conserved. For example, the electron can be in a spin up state ?e=+1/2?e=+1/2 and the photon can be in a spin down state ?P=-1?P=-1. There can be two possibilities if these two meet: ?e??e to ?e??e and ?P??P?P??P which means no spin flip or ?e??e to ?e??e and ?P??P?P??P, which is possible because +1/2-1=-1/2
[0046] For example, the spin of the one or more electrons is +1/2 and input instruction given to experiment setup is -1/2 then the magnetic field can change spin to -1/2 and then information can be send to a converter which can send a signal further with low current output. If the information from other setup is +1/2 then the converter can send the signal further with high current output and can read 0 for -1/2 and 1 for +1/2 and can give the output as 1 according to calibration done.
A B C
0 0 1
0 1 1
1 0 1
1 1 0
[0047] FIG. 3 illustrates an exemplary flow diagram of method for implementing one or more Boolean gate functions, in accordance with an embodiment of the present disclosure.
[0048] In an embodiment, FIG. 3 illustrates a method (300) for implementing one or more Boolean gate functions. The method (300) can include a step (302) of trapping, at a single electron transistor (102), one or more electrons (104), where the single electron transistor (102) can facilitate in trapping the one or more electrons (104) for spin measurement.
[0049] In an embodiment, the method (300) can include a step (304) of measuring, at the single electron transistor (102), a spin movement (-1/2, +1/2) of the trapped one or more electrons (104).
[0050] In an embodiment, the method (300) can include a step (306) of changing, at the single electron transistor (102), the spin movement of the one or more electrons (104) through a magnetic field.
[0051] In an embodiment, the method (300) can include a step (308) of converting, at the single electron transistor (102), the spin movement value into a binary value.
[0052] In an embodiment, the method (300) can include a step (310) of implementing, at the single electron transistor (102), one or more Boolean gate functions using the converted binary value and facilitates in performing quantum computing.
[0053] In an embodiment, the one or more electrons (104) can be in a spin up state ?e=+1/2?e=+1/2 and one or more photons can be in a spin down state ?P=-1?P=-1 during implementation of the one or more Boolean gate functions. In another embodiment, the one or more Boolean gate functions can include NAND gate. In yet another embodiment, the single electron transistor (102) can be configured to receive a beam of silver atoms through the magnetic field, where the magnetic field can facilitate in determining deflection of the silver atoms.
[0054] It should be apparent to those skilled in the art that many more modifications besides those already described are possible without departing from the inventive concepts herein. The inventive subject matter, therefore, is not to be restricted except in the spirit of the appended claims. Moreover, in interpreting both the specification and the claims, all terms should be interpreted in the broadest possible manner consistent with the context. In particular, the terms “comprises” and “comprising” should be interpreted as referring to elements, components, or steps in a non-exclusive manner, indicating that the referenced elements, components, or steps may be present, or utilized, or combined with other elements, ` components, or steps that are not expressly referenced.
[0055] While the foregoing describes various embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof. The scope of the invention is determined by the claims that follow. The invention is not limited to the described embodiments, versions or examples, which are included to enable a person having ordinary skill in the art to make and use the invention when combined with information and knowledge available to the person having ordinary skill in the art.

ADVANTAGES OF THE PRESENT DISCLOSURE
[0056] The present disclosure provides a method and system for implementing one or more Boolean gate functions that facilitates in increasing rate at which speed, information doubles without significant increase in cost.
[0057] The present disclosure provides a method and system for implementing one or more Boolean gate functions that enables in achieving pace of doubling information, and speed much faster without requirement of transistor.
[0058] The present disclosure provides a method and system for implementing one or more Boolean gate functions by using Stern-Gerlach Experiment to find spin and making NAND Gate and an ALU (Algorithmic Logical Unit) which is the main logic behind the micro-processor.
[0059] The present disclosure provides a method and system for implementing one or more Boolean gate functions that helps in performing quantum computing in an Arithmetic logic unit (ALU) of a processor and enables in operation of a quantum processor at room temperature without 0 Kelvin temperature.

We Claims:

1. A method for implementing one or more Boolean gate functions, the method comprising:
trapping, at a single electron transistor (102), one or more electrons (104), wherein the single electron transistor (102) facilitates in trapping the one or more electrons (104) for spin movement measurement;
measuring, at the single electron transistor (102), a spin movement (-1/2, +1/2) of the trapped one or more electrons (104);
changing, at the single electron transistor (102), the spin movement of the one or more electrons (104) through a magnetic field;
converting, at the single electron transistor (102), the spin movement value into a binary value, and
implementing, at the single electron transistor (102), one or more Boolean gate functions using the converted binary value and facilitates in performing quantum computing.
2. The method as claimed in claim 1, wherein one or more electrons (104) are in a spin up state ?e=+1/2?e=+1/2 and one or more photons are in a spin down state ?P=-1?P=-1 during implementation of the one or more Boolean gate functions.
3. The method as claimed in claim 1, wherein the one or more Boolean gate functions include NAND gate .
4. The method as claimed in claim 1, wherein the single electron transistor (102) is configured to receive a beam of silver atoms through the magnetic field, wherein the magnetic field facilitates in determining deflection of the silver atoms.
5. The method as claimed in claim 1, wherein the method is configured with an Arithmetic Logic Unit (ALU) of a quantum processor, where the method facilitates in operating the quantum processor at room temperature without 0 Kelvin temperature.
6. A system (100) for implementing one or more Boolean gate functions, the system (100) comprising :
a single electron transistor (102), wherein the single electron transistor (1020 is configured to trap one or more electrons (102) for measurement of spin movement and wherein a magnetic field is applied in the single electron transistor (102), wherein the magnetic field facilitates in changing the spin movement of the one or more electrons (104), and wherein a binary value is obtained for each of the spin movement, and wherein the single electron transistor (104) facilitates in implementing one or more Boolean gate functions using the converted binary value and enables in performing quantum computing.
7. The system (100) as claimed in claim 5, wherein one or more electrons (104) are in a spin up state ?e=+1/2?e=+1/2 and one or more photons are in a spin down state ?P=-1?P=-1 during implementation of the one or more Boolean gate functions.
8. The system (100) as claimed in claim 5, wherein the one or more Boolean gate functions include NAND gate .
9. The system (100) as claimed in claim 5, wherein the single electron transistor (102) is configured to receive a beam of silver atoms through the magnetic field, wherein the magnetic field facilitates in determining deflection of the silver atoms.
10. The system (100) as claimed in claim 5, wherein the system (100) is configured with Arithmetic Logic Unit (ALU) of a quantum processor, wherein the system (100) facilitates in operating the quantum processor at room temperature without 0 Kelvin temperature.