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Method, Apparatus And System To Transition System Power State Of A Computer Platform

Abstract: The present invention relates to an apparatus comprising: a processor having at least one processor core; an input-output (10) component operatively coupled to the processor; and a power management controller operatively coupled to the at least one processor core, wherein the power management controller is operable to determine a current power state of the processor and is to cause the IO component to enter a power state according to the determined current power state.

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
18 May 2022
Publication Number
51/2023
Publication Type
INA
Invention Field
COMPUTER SCIENCE
Status
Email
Parent Application

Applicants

INTEL CORPORATION
2200 Mission College Boulevard, Santa Clara, California 95054, USA

Inventors

1. MURALIDHAR, Rajeev
305 6th Block, 2nd Phase, BSK 3rd Stage Bangalore Karnataka India 560085
2. SESHADRI, Harinarayanan
112 Haritha Apartments, 301, 11 Cross Malleswaram Bangalore Karnataka India 560003
3. FLEMING, Bruce, L.
1481 Morning Star DR Morgan Hill CA USA 95037
4. RUDRAMUNI, Vishwesh
#23 1st Main, 2nd Cross, Mahalakshmipuram, Mico Layout Bangalore Karnataka India 560086

Specification

Description:BACKGROUND
1. Technical Field
Embodiments generally relate to power management for devices of a computer
platform. More particularly, certain embodiments provide for a method tying a processor
power state transition on a platform to another power state transition of the platform.
2. Background Art
In existing computer platforms, operating systems (OS) variously support power
management techniques which are specific to a particular processor - e.g. with traditional
Advanced Configuration and Power Interface (ACPI)-based mechanisms. For example,
current OS power management (OSPM) mechanisms provide for transitioning a platform
processor core to a processor-specific, idle processor power state such as a C6 power state.
The introduction of autonomous device power management has allowed such
computer platforms to increasingly rely on drivers for various types of devices that
independently manage transitions between device-specific power states, each for their own
respective platform device. , Claims:1. An apparatus comprising:
a processor having at least one processor core;
an input-output (IO) component operatively coupled to the processor; and
a power management controller operatively coupled to the at least one processor core, wherein the power management controller is operable to determine a current power state of the processor and is to cause the IO component to enter a power state according to the determined current power state.

Documents

Application Documents

# Name Date
1 202212028475-FORM 1 [18-05-2022(online)].pdf 2022-05-18
2 202212028475-DRAWINGS [18-05-2022(online)].pdf 2022-05-18
3 202212028475-DECLARATION OF INVENTORSHIP (FORM 5) [18-05-2022(online)].pdf 2022-05-18
4 202212028475-COMPLETE SPECIFICATION [18-05-2022(online)].pdf 2022-05-18
5 202212028475-FORM 18 [23-05-2022(online)].pdf 2022-05-23
6 202212028475-FORM-26 [11-07-2022(online)].pdf 2022-07-11
7 202212028475-FORM 3 [18-11-2022(online)].pdf 2022-11-18
8 202212028475-FER.pdf 2024-04-01
9 202212028475-FORM 3 [24-06-2024(online)].pdf 2024-06-24
10 202212028475-Information under section 8(2) [19-09-2024(online)].pdf 2024-09-19
11 202212028475-OTHERS [25-09-2024(online)].pdf 2024-09-25
12 202212028475-FER_SER_REPLY [25-09-2024(online)].pdf 2024-09-25
13 202212028475-CLAIMS [25-09-2024(online)].pdf 2024-09-25
14 202212028475-ABSTRACT [25-09-2024(online)].pdf 2024-09-25

Search Strategy

1 SearchStrategyE_22-03-2024.pdf