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Method For Simplifying A Filter And Associated Devices

Abstract: Method for simplifying a filter and associated devices The invention relates to a method for simplifying a sampled signal digital filter, the method including at least one step for : - in order to obtain a first intermediate filter, gathering channels including discrete nonstationary operations relating to the same signal, the first channels including the nonstationary operations relating to a first signal and the second channels including the nonstationary operations relating to a second signal, - in order to obtain a second intermediate filter, on each of the first channels and second channels, commutative stationary operations with the nonstationary operations, in order to eliminate the redundant nonstationary operations, and - building the filter corresponding to the last obtained intermediate filter. Figure for abstract: Figure 11

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Patent Information

Application #
Filing Date
13 October 2020
Publication Number
21/2021
Publication Type
INA
Invention Field
COMMUNICATION
Status
Email
remfry-sagar@remfry.com
Parent Application

Applicants

THALES
Tour Carpe Diem Place des Corolles Esplanade Nord, 92400 COURBEVOIE, FRANCE

Inventors

1. HODE Jean-Michel
THALES DMS France SAS CAMPUS THALES BORDEAUX 75-77, avenue Marcel, Dassault 33700, MERIGNAC, FRANCE

Specification

TITLE: Method for simplifying a filter and associated devices
This patent application claims the benefit of document FR 19/11522 filed on
5 October 16, 2019, which is hereby incorporated by reference.
The present invention relates to a method for filtering a numerical input signal. The
present invention also relates to an associated filter, processing chain and radar.
For multiple applications in the field of radars, it is desirable to filter a digitized
signal with a specific transfer function.
10 To that end, filters of the finite impulse response type are often used. Such filters
are often referred to using the acronym FIR, per the accepted English terminology. FIR
filters carry out operations comprising the use of time shifts of the signal, gains and
summation. The number of operations is equal to the length of the impulse response of
the considered FIR filter (the length being expressed in number of samples).
15 However, when the length of the impulse response of the filter is very large, as is
the case for the pulse compression involved in the radars, the performance of the filtering
becomes problematic, if not impossible, in light of the very large number of operations
involved.
In order to circumvent such a problem, it is known to perform some operation in
20 the space of frequencies. To this end, a Fourier transform is applied to go from the time
domain to the frequency domain, the filter operation then becoming multiplicative, then a
Fourier transform is next applied in order to return to the time domain.
In practice, the time is divided into sequences and the Fourier transform is
implemented through a Fast Fourier Transform, often referred to using the acronym FFT.
25 More specifically, the passage from the domain of the time space to the frequency space
is obtained by using a FFT, while the passage from the domain of the frequency space to
the time space is obtained by using an IFFT. The acronym IFFT refers to “Inverse Fast
Fourier Transform".
The use of Fourier transforms, whether inverse fast or not, involves a size at least
30 equal to the length of the filter. Indeed, if the size of the Fourier transform, whether inverse
fast or not, is strictly equal to the size K of the filter, then the process only makes it
possible to obtain a single point on K, the K-1 other calculated points not being usable. If
the size of the Fourier transform, whether inverse fast or not, is strictly equal to two times
the size K of the filter, or 2K, then the process makes it possible to obtain K points on 2K,
35 the K other calculated points not being usable. Thus, by doubling the process, it is
possible to calculate 2 times K points on 2K and to access all of the required points.
2
However, this shows that half of the calculated points are lost, which increases the
computational load and complicates the implementation of the filter.
There is therefore a need for a method for filtering a numerical input signal that is
easier to implement.
5 To that end, described is a method for filtering a numerical input signal sampled at
a sampling frequency in order to obtain a filtered signal, the method including at least one
step for providing an input signal, a step for transmission of the input signal over two
processing channels, a step for obtaining a first output signal through the implementation
of first operations on the first processing channel, the first operations including at least the
10 application of a discrete Fourier transform to M/2p points on a signal coming from the
input signal, the integer p being greater than or equal to 1, a step for obtaining a second
output signal through the implementation of second operations on the second processing
channel, the second operations including at least the application of a shift by M/2 points to
a signal coming from the input signal, then the application of a discrete Fourier transform
to M/2p 15 points on the shifted signal and a step for applying an inverse discrete Fourier
transform to M/2p
points on the first signal in order to obtain M points of the spectrum of
the first signal, M being an integer strictly greater than 2, the application step being carried
out by the addition of the results of two processing channels.
Also described is a method for filtering a numerical input signal sampled at a
20 sampling frequency in order to obtain a filtered signal, the method including at least one
step for providing an input signal, a step for transmission of the input signal over two
processing channels, a step for obtaining a first output signal through the implementation
of first operations on the first processing channel, the first operations including at least the
application of a filtering involving a discrete Fourier transform to M/2 points on a signal
25 coming from the input signal, the filtering having a latency of M, a step for obtaining a
second output signal through the implementation of second operations on the second
processing channel, the second operations including at least the application of a shift by
M/2 points to a signal coming from the input signal, then the application of filtering
involving a discrete Fourier transform to M/2 points on the shifted signal, the filtering
30 having a latency of M, a step for applying an inverse discrete Fourier transform to M/2
points on the first signal in order to obtain M points of the spectrum of the first signal, M
being an integer strictly greater than 2, and a step for recombination of the results of two
processing channels.
According to specific embodiments, the filtering method includes one or more of
35 the following features, considered alone or according to any technically possible
combinations:
3
- the method includes carrying out at least the step for application of a plurality of
values of p.
- the integer p is less than or equal to the integer p0, the integer p0 being an integer
verifying M/2p0 = 1.
5 - the integer p increases by increments of 1.
- the first operations include first processing of the input signal in order to obtain a
processed signal, an operation for implementation of the step for application of a
discrete Fourier transform to M points on the first signal of the filtering method as
previously described, the first signal being the processed signal, each point of the
10 spectrum of the processed signal corresponding to the even indices of a spectral
analysis at 2*M points of the processed signal and being identified in a bijective
manner by an index k, k being an even number inclusively between 0 and 2*M-1,
second processing of the points of the spectrum of the processed signal in order to
obtain the first selected points, an application of the inverse discrete Fourier
15 transform to M points on the first selected points in order to obtain a first signal,
and third processing of the first signal in order to obtain a first output signal.
- the second operations include first processing of the input signal in order to
obtain a processed signal, an operation for implementation of the step for
application of a discrete Fourier transform to M points on the first signal of the
20 filtering method as previously described, the first signal being the processed
signal, each point of the spectrum of the processed signal corresponding to the
odd indices of a spectral analysis at 2*M points of the processed signal and being
identified in a bijective manner by an index k, k being an even number inclusively
between 0 and 2*M-1, second processing of the points of the spectrum of the
25 processed signal in order to obtain the first selected points, an application of the
inverse discrete Fourier transform to M points on the second selected points in
order to obtain a first signal, and third processing of the second signal in order to
obtain a first output signal.
- the method includes an operation for addition of an input signal and of the input
30 signal shifted by N/2 points, the signal obtained after addition being the input signal
of the first processing channel.
- the method includes an operation for addition of an input signal and of the input
signal shifted by N points, the signal obtained after addition being the input signal
of the second processing channel.
35 - the operation for shifting by N points is applied using two sub-units.
4
- the first operations include first processing of the input signal in order to obtain a
processed signal, an operation for implementation of the step for application of a
discrete Fourier transform to M points on the first signal of the filtering method as
previously described, the first signal being the processed signal, each point of the
5 spectrum of the processed signal corresponding to the even indices of a spectral
analysis at 2*M points of the processed signal and being identified in a bijective
manner by an index k, k being an even number inclusively between 0 and 2*M-1,
second processing of the points of the spectrum of the processed signal in order to
obtain the first selected points, an application of the inverse discrete Fourier
10 transform to M points on the first selected points in order to obtain a first signal,
and third processing of the first signal in order to obtain a first output signal.
- the second operations include first processing of the input signal in order to
obtain a processed signal, an operation for implementation of the step for
application of a discrete Fourier transform to M points on the first signal of the
15 filtering method as previously described, the first signal being the processed
signal, each point of the spectrum of the processed signal corresponding to the
odd indices of a spectral analysis at 2*M points of the processed signal and being
identified in a bijective manner by an index k, k being an even number inclusively
between 0 and 2*M-1, second processing of the points of the spectrum of the
20 processed signal in order to obtain the first selected points, an application of the
inverse discrete Fourier transform to M points on the second selected points in
order to obtain a first signal, and third processing of the second signal in order to
obtain a first output signal.
- the method comprises providing an input signal, transmitting the input signal over
25 two channels, obtaining a first output signal by carrying out the following first
operations on the first channel and obtaining a second output signal by carrying
out the following second operations on the second channel. The obtainment of a
first output signal by carrying out the following first operations on the first channel:
a first operation for first processing of the input signal in order to obtain a
30 processed signal, a first operation for application of a discrete Fourier transform to
M points on the processed signal to obtain M points of the spectrum of the
processed signal, M being an integer strictly greater than 2, of the filtering method
as previously described, the first signal being the processed signal, each point of
the spectrum of the processed signal corresponding to the even indices of a
35 spectral analysis at 2*M points of the processed signal and being identified in a
bijective manner by an index k, k being an even number inclusively between 0 and
5
2*M-1, a first operation for second processing of the points of the spectrum of the
processed signal in order to obtain first selected points, a first operation for
application of the inverse discrete Fourier transform to M points on the first
selected points in order to obtain a first signal, and a first operation for third
5 processing of the first signal in order to obtain a first output signal. The obtainment
of a second output signal by carrying out the following second operations on the
second channel: a second operation for first processing of the input signal in order
to obtain a processed signal, a second operation for application of a discrete
Fourier transform to M points on the processed signal to obtain M points of the
10 spectrum of the processed signal, M being an integer strictly greater than 2, of the
filtering method as previously described, the first signal being the processed
signal, each point of the spectrum of the processed signal corresponding to the
odd indices of a spectral analysis at 2*M points of the processed signal and being
identified in a bijective manner by an index k, k being an odd number inclusively
15 between 0 and 2*M-1, a second operation for second processing of the points of
the spectrum of the processed signal in order to obtain second selected points, a
second operation for application of the inverse discrete Fourier transform to M
points on the second selected points in order to obtain a second signal, and a
second operation for third processing of the second signal in order to obtain a
20 second output signal. The method also includes the recombination of the first
output signal and the second output signal in order to obtain the filtered signal.
- the second operation for first processing comprises carrying out a frequency
translation with a value equal to the ratio between the sampling frequency and the
number 2*M, and the second operation for third processing comprises carrying out
25 a frequency translation applied to the second signal with a value equal to the
opposite of the ratio between the sampling frequency and the number 2*M.
- the first operation for second processing comprises carrying out the shift of the
points of the spectrum of the processed signal for M samples in order to obtain
shifted points and calculating the sum of the points of the spectrum of the
30 processed signal and the shifted points, and the second operation for second
processing comprises carrying out the shift of the points of the spectrum of the
processed signal for M samples in order to obtain shifted points and calculating the
sum of the points of the spectrum of the processed signal and the shifted points.
- the first operation for first processing comprises carrying out the shift of the input
35 signal for M samples in order to obtain a shifted signal and calculating the sum of
the input signal and the shifted signal, and the second operation for first
6
processing comprises carrying out the shift of the input signal for M samples in
order to obtain a shifted signal and calculating the difference between the input
signal and the shifted signal.
- the recombination step is carried out by calculating the difference between the
5 first output signal and the second output signal.
- the recombination step is carried out by calculating the difference between the
first output signal and the second output signal, in order to obtain a first calculation
signal, calculation of the sum for the first output signal and the second output
signal, in order to obtain a second intermediate calculation signal, - shift of the
10 second intermediate calculation signal by M samples in order to obtain a second
calculation signal, and calculation of the sum of the first calculation signal and the
second calculation signal in order to obtain the filtered signal.
A filter is also described, the filter being capable of carrying out the filtering method
as previously described.
15 A filter is also described that is capable of filtering a numerical input signal
sampled at a sampling frequency in order to obtain a filtered signal, the filter comprising
an input terminal able to receive an input signal, a first processing channel able to obtain a
first output signal by carrying out first operations, a second processing channel able to
obtain a second output signal by carrying out second operations, a transmitter able to
20 transmit the input signal on the first processing channel and the second processing
channel, a mixer able to recombine the first output signal and the second output signal in
order to obtain the filtered signal. The first processing channel is able to carry out the
following first operations: first processing of the input signal in order to obtain a processed
signal, application of a discrete Fourier transform to M points on the processed signal in
25 order to obtain M points of the spectrum of the processed signal, M being an integer
strictly greater than 2, each point of the spectrum of the processed signal corresponding
to the even indices of a spectral analysis at 2*M points of the processed signal and being
identified in a bijective manner by an index k, k being an even number inclusively between
0 and 2*M-1, the application being carried out by addition of the results of two processing
30 channels, the first processing channel applying a discrete Fourier transform to M/2 points
on the processed signal and the second calculating channel applying a shift of M/2 points
to the processed signal, then applying a discrete Fourier transform to M/2 points on the
first signal, second processing of the spectrum points of the processed signal in order to
obtain first selected points, application of the inverse discrete Fourier transform to M
35 points on the first selected points in order to obtain a first signal, and third processing of
the first signal in order to obtain a first output signal. The second processing channel is
7
able to carry out the following second operations: first processing of the input signal in
order to obtain a processed signal, application of a discrete Fourier transform to M points
on the processed signal in order to obtain M points of the spectrum of the processed
signal, M being an integer strictly greater than 2, each point of the spectrum of the
5 processed signal corresponding to the odd indices of a spectral analysis at 2*M points of
the processed signal and being identified in a bijective manner by an index k, k being an
odd number inclusively between 0 and 2*M-1, the application being carried out by addition
of the results of two processing channels, the first processing channel applying a discrete
Fourier transform to M/2 points on the processed signal and the second processing
10 channel applying a shift of M/2 points to the processed signal, then applying a discrete
Fourier transform to M/2 points on the first signal, second processing of the points of the
spectrum of the processed signal in order to obtain second selected points, application of
the inverse discrete Fourier transform to M points on the second selected points in order
to obtain a second signal, and third processing of the second signal in order to obtain a
15 second output signal.
According to specific embodiments, the filter comprises one or more of the
following features, considered alone or according to any technically possible
combinations:
- the filter is able to filter a numerical input signal sampled at a sampling frequency
20 in order to obtain a filtered signal, the filter comprising an input terminal able to
receive an input signal, a first channel able to obtain a first output signal by
carrying out first operations, a second channel able to obtain a second output
signal by carrying out second operations, a transmitter able to transmit the input
signal on the first channel and the second channel, a mixer able to recombine the
25 first output signal and the second output signal in order to obtain the filtered signal,
the first channel being able to carry out the following first operations: a first
operation for first processing of the input signal in order to obtain a processed
signal, a first operation for application of a discrete Fourier transform to M points
on the processed signal to obtain M points of the spectrum of the processed
30 signal, M being an integer strictly greater than 2, of the filtering method as
previously described, the first signal being the processed signal, each point of the
spectrum of the processed signal corresponding to the even indices of a spectral
analysis at 2*M points of the processed signal and being identified in a bijective
manner by an index k, k being an even number inclusively between 0 and 2*M-1, a
35 first operation for second processing of the points of the spectrum of the processed
signal in order to obtain first selected points, a first operation for application of the
8
inverse discrete Fourier transform to M points on the first selected points in order
to obtain a first signal, and a first operation for third processing of the first signal in
order to obtain a first output signal. The second channel is able to carry out the
following second operations: a second operation for first processing of the input
5 signal in order to obtain a processed signal, a second operation for application of a
discrete Fourier transform to M points on the processed signal to obtain M points
of the spectrum of the processed signal, M being an integer strictly greater than 2,
of the filtering method as previously described, the first signal being the processed
signal, each point of the spectrum of the processed signal corresponding to the
10 odd indices of a spectral analysis at 2*M points of the processed signal and being
identified in a bijective manner by an index k, k being an odd number inclusively
between 0 and 2*M-1, a second operation for second processing of the points of
the spectrum of the processed signal in order to obtain second selected points, a
second operation for application of the inverse discrete Fourier transform to M
15 points on the second selected points in order to obtain a second signal, and a
second operation for third processing of the second signal in order to obtain a
second output signal.
Also proposed is a method for simplifying a sampled signal digital filter, the method
including at least one step for providing a filter comprising first channels able to obtain a
20 first output signal by carrying out first operations, and second channels able to obtain a
second output signal by carrying out second operations, and a unit for recombination of
the signals obtained at the output of the first channels and the second channels, the first
operations and the second operations including at least one series of discrete
nonstationary operations and stationary operations, the series pertaining to operations
25 shared by the first and second operations, and a step for, in order to obtain a first
intermediate filter, gathering channels including discrete nonstationary operations relating
to the same signal, the first channels including the nonstationary operations relating to a
first signal and the second channels including the nonstationary operations relating to a
second signal, a step for, in order to obtain a second intermediate filter, on each of the
30 first channels and second channels, commutative stationary operations with the
nonstationary operations, in order to eliminate the redundant nonstationary operations,
and a step for building the filter corresponding to the last obtained intermediate filter.
According to specific embodiments, the simplification method includes one or more
of the following features, considered alone or according to any technically possible
35 combinations:
- the nonstationary operations include two mutually reciprocal operations.
9
- the two signals of the gathering step form a complete signal.
- the number of points of each signal is identical.
- the nonstationary operations are chosen from a group made up of discrete
Fourier transforms, inverse discrete Fourier transforms and frequency
5 translations.
- the stationary operations are discrete operations in a group made up of filtering
done in a frequency multiplicative manner, an addition, a delay and a
difference.
- the sampled signal digital filter to be simplified is a filter as previously
10 described or implementing a filtering method as previously described.
The description also relates to a processing chain comprising at least one filter as
previously described.
According to specific embodiments, the processing chain includes one or more of
the following features, considered alone or according to any technically possible
15 combinations:
- the processing chain is a programmable logic circuit.
- the processing chain is an application-specific integrated circuit.
- the processing chain is made in the form of a programmable logic circuit.
- the processing chain is made in the form of an application-specific integrated
20 circuit.
Furthermore, a system is also described including a processing chain as
previously described.
Other features and advantages of the invention will appear upon reading the
following description of embodiments of the invention, provided as an example only and in
25 reference to the drawings, which are:
- figure 1, a schematic view of an example radar comprising several filters,
- figure 2, a block diagram showing the operations performed by a first exemplary
filter,
- figure 3, a block diagram showing the operations performed by a second
30 exemplary filter,
- figure 4, a block diagram showing the operations performed by a third exemplary
filter,
- figure 5, a block diagram showing the operations performed by a fourth
exemplary filter,
35 - figure 6, a block diagram showing the operations performed by a fifth exemplary
filter,
10
- figure 7, a block diagram showing the operations performed by a sixth exemplary
filter,
- figure 8, a block diagram showing the operations performed by a seventh
exemplary filter,
5 - figure 9, a block diagram illustrating the proper working of the filter of figure 8,
- figure 10, a block diagram illustrating a base circuit used to obtain the
architecture of figure 2,
- figure 11, a block diagram showing the operations performed by an eighth
exemplary filter,
10 - figure 12, a block diagram showing a circuit able to perform part of the operations
of the eighth exemplary filter,
- figure 13, a block diagram showing the operations performed by a ninth
exemplary filter, and
- figure 14, a block diagram showing a circuit able to perform part of the operations
15 of the ninth exemplary filter.
A system 10 is schematically illustrated in figure 1.
The system 10 is for example a radar 10.
In a variant, the system 10 is a communication system, a countermeasures system
or a detection system, such as a goniometer.
20 The radar 10 is able to receive an input signal 10E and to convert the input signal
10E into an output signal 10S that may be exploited for later uses.
The radar 10 includes an antenna 12 and a processing chain 14.
The antenna 12 is able to receive the input signal 10E.
The processing chain 14 is able to convert the input signal 10E into the output
25 signal 10S.
The processing chain 14 is able to filter the input signal 10E.
According to the example of figure 1, the processing chain 14 includes three filters
16, 18 and 20 in series.
In fact, the first filter 16 includes an input terminal 16E connected to the antenna
30 12 by a first wire 22 and an output terminal 16S connected to the second terminal 18 by a
second wire 24.
The second filter 18 includes an input terminal 18E connected to the output
terminal 16S of the first filter 16 by the second wire 24 and an output terminal 18S
connected to the third filter 20 by a third wire 26.
11
The third filter 20 includes an input 20E connected to the output terminal 18S of
the second filter 18 by the third wire 26 and an output terminal 20S connected to the
fourth wire 28 transmitting the output signal 10S.
According to another embodiment, the processing chain 14 includes a single filter.
5 In a variant, the processing chain 14 includes any number of filters, for example 2,
4 or 6.
The processing chain 14 is for example a programmable logic circuit. Such a
circuit is often referred to using the acronym FPGA, for "field-programmable gate array”,
gate array that can be programmed in situ.
10 According to another example, the processing chain 14 is an application-specific
integrated circuit. Such a circuit is often referred to using the acronym ASIC (applicationspecific integrated circuit).
Each filter 16, 18 and 20 is able to filter a numerical input signal that is sampled at
a sampling frequency in order to obtain a filtered signal.
15 To simplify the description, it is assumed that each of the filters 16, 18 and 20 is
identical.
In a variant, each filter of the processing chain 14 is different.
An example of a second filter 18 is illustrated more specifically in figure 2.
The second filter 18 includes two main blocks 34, which are the first main block 36
20 and the second main block 38, a first calculating unit 40, a second calculating unit 42 and
an output adder 43.
The first main block 36 and the second main block 38 are identical.
In this context, "identical" means that each of the two main blocks 36 and 38 is
able to apply the same operations on an incident signal.
25 Therefore, for simplification reasons, only the first main block 36 is described
hereinafter.
The first main block 36 includes three input branches 44, 46 and 48 and one
output branch 50.
The first main block 36 also includes an input adder 52, an input subtracter 54, a
30 first processing channel 56, a second processing channel 58 and an output adder 59.
The first branch 44 of the first main block 36 is directly connected to the input 18E
of the filter 18.
The second branch 46 of the first main block 36 is connected to the first calculating
unit 40.
12
More specifically, the first calculating unit 40 includes an input 40E and an output
40S and the output 40S of the first calculating unit 40 is connected to the second branch
46 of the first main block 36.
The input 40E of the first calculating unit 40 is directly connected to the input 18E
5 of the filter 18.
The first calculating unit 40 is a shifting unit.
The shift is illustrated schematically in figure 2 by a box 40 in which “z-N/2” is
inscribed in reference to a shifting technique by using the Z-transform.
Hereinafter, N is an even integer strictly greater than 4 such that the integer N/2 is
10 greater than or equal to 2.
The integer N corresponding to the number of samples, it is generally relatively
large, in particular greater than or equal to 100.
The third branch 48 of the first main block 36 is directly connected to the input 18E
of the filter 18.
15 The input adder 52 and the input subtracter 54 interacting with the two processing
channels 56 and 58, it should now be introduced that the first processing channel 56
extends between an input 56E and an output 56S and that the second processing channel
58 extends between an input 58E and an output 58S.
The input adder 52 includes two inputs 52E respectively connected to the first
20 branch 44 of the first main block 36 and to the second branch 46 of the first main block 36.
The input adder 52 also includes an output 52S connected to the input 56E of the first
processing channel 56.
The input adder 52 is able to carry out an addition operation applied to the two
output signals of the first branch 44 and of the second branch 46 of the first main block 36,
25 the signal obtained after addition being injected at the input 56E of the first processing
channel 56.
From a more mathematical perspective, the input adder 52 is able to perform the
addition between a signal and the same signal shifted by N/2 points.
The input subtracter 54 includes a first input 54E1 connected to the third branch 48
30 of the first main block 36 and a second input 54E2 connected to the second branch 46 of
the first main block 36. The input subtracter 54 also includes an output 54S connected to
the input 58S of the second processing channel 58.
The input subtracter 54 is able to carry out a difference operation applied between
the two input signals of the third branch 48 and of the second branch 46 of the first main
35 block 36, the signal obtained after subtraction being injected at the input 58S of the
second processing channel 58.
13
From a more mathematical perspective, the input subtracter 54 is able to perform
the subtraction between a signal and the same signal shifted by N/2 points.
The first processing channel 56 successively includes two subunits: a first subunit
60 and a second subunit 62.
5 In other words, the two subunits 60 and 62 are in series.
The first subunit 60 is able to apply a discrete Fourier transform to N/2 points on
the signal previously obtained (signal before the first subunit 60), called processed signal,
in order to obtain N/2 points of the spectrum of the processed signal, each point of the
spectrum of the processed signal corresponding to the even indices of the spectral
10 analysis with 2*N/2=N points of the processed signal and being identified in a bijective
manner by an index k, k being an even number inclusively between 0 and 2*M-1 (with
M=N/2). In this case, the points are numbered from 0 to 2*M-1.
This amounts to calculating the even coefficients of the spectral analysis with N
points of the processed signal in order to obtain selected points.
15 For example, the calculated discrete Fourier transform is a fast Fourier transform
denoted FFTN/2.
This is illustrated schematically in figure 2 by a box 64 in which FFTN/2 is inscribed,
and by a multiplier 66 at which an incoming arrow 68 arrives with the inscription "ρ
(1)2m”,
the (1) referring to the fact that this is the first processing channel 56.
20 The second subunit 62 is also able to carry out an operation to apply the inverse
discrete Fourier transform to N/2 points on the selected points.
For example, the calculated discrete Fourier transform is a fast Fourier transform
denoted IFFTN/2.
This is illustrated schematically in figure 2 by a box in which IFFTN/2 is inscribed.
25 The second subunit 62 has an output connected to the output adder 59.
The second processing channel 58 also includes a first subunit 60 and a second
subunit 62 as well as two shifting modules 70 and 72.
As previously indicated, the two subunits 60 and 62 of the second processing
channel 58 are similar to the two subunits 60 and 62 of the first processing channel 56.
30 The first shifting module 70 is located between the input 58S of the second
processing channel 58 and the first subunit 60.
The first shifting module 70 is able to carry out a frequency translation by a value
equal to the ratio between the sampling frequency and the number N.
Such a first shifting module 70 is symbolized by an arrow 74 on a multiplier 76, the
arrow 74 bearing inscription “e-2jπn/N 35 ” in reference to a usual translation technique that
consists of multiplying the signal by a carefully chosen complex exponential function.
14
The second shifting module 72 is located between the second subunit 60 and the
output 58S of the second processing channel 58.
In the case at hand, the second shifting module 72 is able to carry out a frequency
translation by a value opposite the ratio between the sampling frequency and the number
5 N.
Such a second shifting module 72 is symbolized by an arrow 78 on a multiplier 80,
the arrow 78 bearing inscription “e2jπn/N” in reference to a usual translation technique that
consists of multiplying the signal by a carefully chosen complex exponential function.
The output adder 59 is respectively connected to the two outputs 56S and 58S of
10 each processing channel 56 and 58 and delivers, as output, the sum of the two outputs
56S and 58S of each processing channel 56 and 58.
The output 59S of the output adder 59 corresponds to the output branch 50 of the
first main block 36.
As previously indicated, the second main block 38 includes the same elements as
15 the first main block 36. Only the signals injected at the input differ.
The first input branch 82 of the second main block 38 is connected to the second
input branch 46 of the first main block 36.
This means that the input signal of the filter 18 shifted by N/2 is injected in the first
input branch 82 of the second main block 38.
20 The second input branch 84 of the second main block 38 is connected to a second
calculating unit 42.
More specifically, the second calculating unit 42 includes an input 42E and an
output 42S and the output 42S of the second calculating unit 42 is connected to the
second input branch 84 of the second main block 38.
25 The input 42E of the second calculating unit 42 is directly connected to the input
18E of the filter 18.
The second calculating unit 42 is a shifting unit.
The shift is illustrated schematically in figure 2 by a box 42 in which “z-N/2” is
inscribed in reference to a shifting technique by using the Z-transform.
30 This means that the input signal of the filter 18 shifted by N is injected in the
second input branch 84 of the second main block 42.
The third input branch 86 of the second main block 38 is connected directly to the
second input branch 46 of the first main block 36.
This means that the input signal of the filter 18 shifted by N/2 is injected in the third
35 input branch 86 of the second main block 38.
15
Lastly, the output adder 43 is connected to the output branch of each main block
36 and 38.
The output 18S of the filter 18, which is connected to the output of the output adder
59, is passed through by a signal corresponding to the sum of the signals circulating in the
5 output branches of each main block 36 and 38.
An improved architecture for the filter 18 of figure 2 is proposed in figure 3.
The optimized architecture in figure 3 advantageously uses the similarity between,
on the one hand, the first processing channels 56 of the main blocks, and on the other
hand, the second processing channels 58 of the main blocks. In such a context, similarity
10 refers to similar operations or processing.
More specifically, in the case at hand, use is made of the fact that in the first
processing channels 34, the IFFT operations pertain to the spectrum points corresponding
to the even indices whereas, in the second processing channels 34, the IFFT operations
pertain to the points of the spectrum corresponding to the odd indices.
15 According to the architecture of figure 3, the first processing channels 34 are
pooled by an intermediate adder, which makes it possible to use a single unit for applying
the IFFT at the output instead of both in the case of figure 2.
Similarly, the second processing channels 34 are pooled by an intermediate adder,
which makes it possible to use a single unit for applying the IFFT at the output for each
20 second processing channel 34 as well as a single shift application unit instead of both at
the output in the case of figure 2.
The final adder is replaced by a subtracter.
The filter 18 of figure 3 is thus optimized relative to the filter 18 of figure 2, since
the filter 18 of figure 3 involves three resource-heavy operations, namely two IFFT
25 operations and one shifting operation.
A still further improved architecture for the filter 18 of figure 2 and the filter 18 of
figure 3 is proposed in figure 4.
Like for the case of figure 3, the optimized architecture in figure 4 advantageously
uses the similarity between, on the one hand, the first processing channels 56 of the main
30 blocks, and on the other hand, the second processing channels 58 of the main blocks.
More specifically, in the case at hand compared with the case of figure 3, use is
made of the fact that the FFT operation of a first processing channel 56 differs only from
the FFT operation of the other first processing channel 56 by the application of shifts on
the points on which the considered FFT operation is applied. Similarly, the FFT operation
35 of a second processing channel 58 differs only from the FFT operation of the other second
16
processing channel 58 by the application of shifts on the points on which the considered
FFT operation is applied.
Since the shifts can be pooled and applied after the FFT operation, the
architecture of figure 4 is obtained.
5 The filter of figure 4 thus includes two processing channels V1 and V2 that are
summed at the output by a final adder.
The second channel V2 includes the same series of operations as the operations
of the first channel V1. The second channel V2 differs from the first channel V1 only by
the presence of a shifting unit upstream of the series of operations and the presence of a
10 shifting unit in the reverse direction downstream of the series of operations. The
operations applied between the two shifting units that are the same as the operations of
the first channel V1 are now described through the description of the first channel V1 that
follows.
The first channel V1 successively includes a FFTN/2 unit 64, a unit for preparation
15 of the signal 88, two selection units 66, an adder 96 and an IFFTN/2 unit 62.
The FFTN/2 unit 64 is able to apply a FFT to N/2 points on the signal coming from
the input terminal 18E of the filter 18.
The signal preparation unit 88 serves to prepare the signal to be sent for each
selection unit.
20 The signal preparation unit 88 includes only addition subunits 90 and shifting
subunits 92 and 94.
More specifically, the signal preparation unit 88 includes one addition subunit and
two shifting subunits.
The addition subunit 90 is able to perform the addition between two input
25 branches, a first input branch corresponding to the spectrum obtained at the output of the
FFTN/2 unit and a second input branch including a shifting subunit of N/2 represented by a
box z-N/2. The second input branch thus corresponds to the spectrum obtained at the
output of the FFTN/2 unit with a shift of N/2 points.
The addition subunit 90 includes two output branches, a first output branch
30 connected directly to the first selection unit and a second output branch including a
shifting subunit of N/2 represented by a box z-N/2, the shifting subunit of the second output
branch being connected to the second selection unit.
The selection units 66 are next connected to the adder 96, the output of which is
connected to the IFFTN/2 unit.
17
The filter architecture 18 shown in figure 4 is thus optimized relative to the filter 18
of figure 3 by the fact that two very resource-heavy FFT operations are no longer carried
out.
As shown by figure 5, it is also possible to use the filter architecture 18 of figure 4
5 to introduce calculation extractors to recover the result of these operations, provided that
these results can be used for another calculation of the filter 18 or another element
outside the filter 18.
According to the example of figure 5, the filter 18 includes the same elements as
the filter 18 of figure 4 as well as two calculation extractors 98 and 99.
10 The first calculation extractor 98 is used to export the result of the N-point FFT to
the outside of the filter 18.
The second calculation extractor 99 serves to partially implement the N/2 point
IFFT on a signal injected from the outside in the adder located directly upstream of the
IFFT application unit.
15 In a corresponding manner, as shown with dotted lines, the calculation of the
FFTN/2 can be done in another filter such that the presence of the calculating unit of the
FFTN/2 is avoided.
The filter architecture 18 proposed for figure 5 thus makes it possible to pool the
calculating resources between several calculation stages or devices.
20 Such simplification principles more generally correspond to a simplification method
for a sampled signal digital filter using the aforementioned commutative properties for
stationary (shifting, adding) and discrete nonstationary (FFT and IFFT) operations.
Such a simplification method includes at least a supply step S1, a gathering step
S2, a commutating step S3 and a construction step S4.
25 During the supply step S1, a filter is supplied comprising first channels able to
obtain a first output signal by carrying out first operations, second channels able to obtain
a second output signal by carrying out second operations, and a recombination unit for the
signals obtained at the output of the first channels and the second channels.
The first operations and the second operations including at least the same series
30 of discrete nonstationary operations and stationary operations, the series pertaining to
operations common to the first and second operations.
During the gathering step S2, in order to obtain an intermediate filter, channels are
gathered including discrete nonstationary operations pertaining to the same signal, the
first gathered channels including the nonstationary operations pertaining to a first signal
35 and the second gathered channels including the nonstationary operations pertaining to a
second signal.

CLAIMS
1.- A method for simplifying a sampled signal digital filter, the method including at
least one step for :
5 - providing a filter comprising:
- first channels able to obtain a first output signal by carrying out first operations,
and
- second channels able to obtain a second output signal by carrying out second
operations, and
10 - a unit for recombination of the signals obtained at the output of the first channels
and the second channels,
the first operations and the second operations including at least one series of discrete
nonstationary operations and stationary operations, the series pertaining to operations
shared by the first and second operations, and
15 - in order to obtain a first intermediate filter, gathering channels including discrete
nonstationary operations relating to the same signal, the first channels including the
nonstationary operations relating to a first signal and the second channels including the
nonstationary operations relating to a second signal,
- in order to obtain a second intermediate filter, on each of the first channels and second
20 channels, commutative stationary operations with the nonstationary operations, in order to
eliminate the redundant nonstationary operations, and
- building the filter corresponding to the last obtained intermediate filter.
2.- A method for simplifying according to claim 1, wherein the nonstationary
25 operations include two mutually reciprocal operations.
3.- A method for simplifying according to claim 1 or 2, wherein the nonstationary
two signals of the gathering step form a complete signal.
30 4.- A method for simplifying according to any one of claims 1 to 3, wherein the
number of points of each signal is identical.
5.- A method for simplifying according to any one of claims 1 to 4, wherein the
nonstationary operations are chosen from a group made up of discrete Fourier transforms,
35 inverse discrete Fourier transforms and frequency translations.
37
6.- A method for simplifying according to any one of claims 1 to 5, wherein the
stationary operations are discrete operations in a group made up of filtering done in a
frequency multiplicative manner, an addition, a delay and a difference.
5 7.- A filter able to carry out the filtering method according to any one of claims 1
to 6.
8.- The processing chain according to claim 7, the processing chain being made in
the form of a programmable logic circuit or an application-specific integrated circuit.
10
9.- A system including a processing chain according to claim 8.

Documents

Application Documents

# Name Date
1 202014044481-CLAIMS [17-03-2025(online)].pdf 2025-03-17
1 202014044481-FER.pdf 2024-10-10
1 202014044481-TRANSLATIOIN OF PRIOIRTY DOCUMENTS ETC. [13-10-2020(online)].pdf 2020-10-13
2 202014044481-STATEMENT OF UNDERTAKING (FORM 3) [13-10-2020(online)].pdf 2020-10-13
2 202014044481-FORM 18 [13-09-2023(online)].pdf 2023-09-13
2 202014044481-COMPLETE SPECIFICATION [17-03-2025(online)].pdf 2025-03-17
3 202014044481-POWER OF AUTHORITY [13-10-2020(online)].pdf 2020-10-13
3 202014044481-FER_SER_REPLY [17-03-2025(online)].pdf 2025-03-17
3 202014044481-Certified Copy of Priority Document [23-11-2020(online)].pdf 2020-11-23
4 202014044481-FORM 1 [13-10-2020(online)].pdf 2020-10-13
4 202014044481-FER.pdf 2024-10-10
4 202014044481-FORM 3 [23-11-2020(online)].pdf 2020-11-23
5 202014044481-DRAWINGS [13-10-2020(online)].pdf 2020-10-13
5 202014044481-FORM 18 [13-09-2023(online)].pdf 2023-09-13
5 202014044481-Proof of Right [19-10-2020(online)].pdf 2020-10-19
6 202014044481-Certified Copy of Priority Document [23-11-2020(online)].pdf 2020-11-23
6 202014044481-COMPLETE SPECIFICATION [13-10-2020(online)].pdf 2020-10-13
6 202014044481-DECLARATION OF INVENTORSHIP (FORM 5) [13-10-2020(online)].pdf 2020-10-13
7 202014044481-COMPLETE SPECIFICATION [13-10-2020(online)].pdf 2020-10-13
7 202014044481-DECLARATION OF INVENTORSHIP (FORM 5) [13-10-2020(online)].pdf 2020-10-13
7 202014044481-FORM 3 [23-11-2020(online)].pdf 2020-11-23
8 202014044481-DRAWINGS [13-10-2020(online)].pdf 2020-10-13
8 202014044481-Proof of Right [19-10-2020(online)].pdf 2020-10-19
9 202014044481-COMPLETE SPECIFICATION [13-10-2020(online)].pdf 2020-10-13
9 202014044481-FORM 1 [13-10-2020(online)].pdf 2020-10-13
9 202014044481-FORM 3 [23-11-2020(online)].pdf 2020-11-23
10 202014044481-Certified Copy of Priority Document [23-11-2020(online)].pdf 2020-11-23
10 202014044481-DECLARATION OF INVENTORSHIP (FORM 5) [13-10-2020(online)].pdf 2020-10-13
10 202014044481-POWER OF AUTHORITY [13-10-2020(online)].pdf 2020-10-13
11 202014044481-STATEMENT OF UNDERTAKING (FORM 3) [13-10-2020(online)].pdf 2020-10-13
11 202014044481-FORM 18 [13-09-2023(online)].pdf 2023-09-13
11 202014044481-DRAWINGS [13-10-2020(online)].pdf 2020-10-13
12 202014044481-TRANSLATIOIN OF PRIOIRTY DOCUMENTS ETC. [13-10-2020(online)].pdf 2020-10-13
12 202014044481-FORM 1 [13-10-2020(online)].pdf 2020-10-13
12 202014044481-FER.pdf 2024-10-10
13 202014044481-POWER OF AUTHORITY [13-10-2020(online)].pdf 2020-10-13
13 202014044481-FER_SER_REPLY [17-03-2025(online)].pdf 2025-03-17
14 202014044481-STATEMENT OF UNDERTAKING (FORM 3) [13-10-2020(online)].pdf 2020-10-13
14 202014044481-COMPLETE SPECIFICATION [17-03-2025(online)].pdf 2025-03-17
15 202014044481-TRANSLATIOIN OF PRIOIRTY DOCUMENTS ETC. [13-10-2020(online)].pdf 2020-10-13
15 202014044481-CLAIMS [17-03-2025(online)].pdf 2025-03-17

Search Strategy

1 search4481E_07-10-2024.pdf