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Network Enabled Hardware Configurable Unit For Synchro/Resolver Signal Conversion

Abstract: The present disclosure relates to a network-enabled device (100) for synchro/resolver signal conversion, the device includes one or more interchangeable modules (106-1, 106-2) coupled to a controller (104) in a single board (102) so as to minimize space, the one or more interchangeably modules comprising a synchro/resolver to digital converter (SRDC) interface and digital to synchro/resolver converter (DSRC) interface, wherein the one or more interchangeable modules coupled to the controller configured to monitor, by the SRDC interface, a synchro/resolver signals pertaining to angle data from a synchro/resolver sensor, perform conversion of synchro/resolver digital signals received from the SRDC interface to data packets and transmit data packets to the DSRC interface to generate the desired angles of synchro/resolver signal to actuate the synchro/resolver sensor.

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
23 December 2021
Publication Number
25/2023
Publication Type
INA
Invention Field
ELECTRONICS
Status
Email
Parent Application

Applicants

Bharat Electronics Limited
Corporate Office, Outer Ring Road, Nagavara, Bangalore - 560045, Karnataka, India.

Inventors

1. Y. VASANTH KUMAR
Nav & Stab/PDIC, Bharat Electronics Limited, Jalahalli Post, Bangalore - 560013, Karnataka, India.
2. VALLURI BHANU SESHU KUMAR
Communication /PDIC, Bharat Electronics Limited, Jalahalli Post, Bangalore - 560013, Karnataka, India.
3. SHASHIDHAR
Communication /PDIC, Bharat Electronics Limited, Jalahalli Post, Bangalore - 560013, Karnataka, India.
4. RAKESH
D&E DCCS / BEL-GAD, Maharajpur, Sahibabad Industrial Area Site 4, Sahibabad, Ghaziabad, Uttar Pradesh - 201010, India.
5. VINEET MALIK
D&E DCCS / BEL-GAD, Maharajpur, Sahibabad Industrial Area Site 4, Sahibabad, Ghaziabad, Uttar Pradesh - 201010, India.

Specification

Claims:1. A network-enabled device (100) for synchro/resolver signal conversion, said device comprising:
one or more interchangeable modules (106-1, 106-2) coupled to a controller (104) in a single board (102) so as to minimize space, said one or more interchangeably modules (106-1, 106-2) comprising a synchro/resolver to digital converter (SRDC) interface and digital to synchro/resolver converter (DSRC) interface, wherein said one or more interchangeable modules coupled to the controller (104) configured to:
monitor, by the SRDC interface, a synchro/resolver signals pertaining to angle data from a synchro/resolver sensor (202);
perform conversion of synchro/resolver digital signals received from the SRDC interface to data packets; and
transmit data packets to the DSRC interface to generate the desired angles of synchro/resolver signal to actuate the synchro/resolver sensor.
2. The device as claimed in claim 1, wherein the device is enabled/disabled using internet protocol (IP) based networks.
3. The device as claimed in claim 1, wherein the controller (104) is a system on chip (SoC)-based controller.
4. The device as claimed in claim 1, wherein the one or more interchangeably modules (106-1, 106-2) comprise any or a combination of single channel and dual channel for conversion of synchro/resolver digital signals to data packets independently.
5. The device as claimed in claim 1, wherein the one or more interchangeably modules (106-1, 106-2) comprise any or a combination of single channel and dual channel for conversion of data packets to synchro/resolver signals independently.
6. The device as claimed in claim 1, wherein the channels in the device is scalable by using multiple sets of SRDC/DSRC interface with SoC-based controller.
7. The device as claimed in claim 1, wherein the device (100) comprises dual Ethernet ports (108) to avoid any hardware communication failure, wherein predefined convergence time of switching the data packets over Ethernet ports avoid any software communication failure.
8. The device as claimed in claim 1, wherein the controller (104) transmits time stamped synchronised angle data over the Ethernet ports (108), which helps in mapping of target object with received angle data
9. The device as claimed in claim 1, wherein the controller (104) performs automatic detection and correction of variation in digital angle data based on previous data of speed and angle information for large angle step input changes.
10. The device as claimed in claim 1, wherein the device comprises programmable resolution feature controlled through IP based protocol, wherein the resolution is increased to N bit by changing the SRDC/DSRC interface with matching footprints, the range of N is 10-24.
, Description:TECHNICAL FIELD
[0001] The present disclosure relates, in general, to a converter system, and more specifically, relates to a network-enabled hardware configurable unit for synchro/resolver signal conversion.

BACKGROUND
[0002] Resolvers and synchros are well known for their capability to sense shaft angles and provide, as outputs, analog signals. The synchros and resolvers are utilized in numerous applications, primarily in military contexts, for providing angular, positional, and other information pertaining to navigation, communication, detection, weaponry and the likes. A conventional method of designing the hardware unit has a separate SoC based controller card and SRDC/DSRC interface card with digital logic transistor logic (TTL)/complementary metal-oxide–semiconductor (CMOS).
[0003] A few existing systems include software-based resolver to digital converter that aims to eliminate the need for an additional resolver to digital converter hardware components as the converter algorithm is implemented in processor (DSP) to determine the angle of rotation in gimbal-based tracking and surveillance systems. But these were realized in the Versa Module Europe (VME) form factor based hardware consisting of discrete differential to single ended signal, multiplexer, sample and hold circuit and M-bit analog-to-digital converter (ADCs) occupying more printed circuit board (PCB) area. Also, this existing system includes software implementation and does not support remote network controlling and it is defined for the resolver to digital converter of single channel.
[0004] Therefore, it is desired to develop a simple and cost-effective means that exhibits network-enabled hardware configurable unit for synchro/resolver signal and requires a relatively small amount of circuit space

OBJECTS OF THE PRESENT DISCLOSURE
[0005] An object of the present disclosure relates, in general, to a converter system, and more specifically, relates to a network-enabled hardware configurable unit for synchro/resolver signal conversion.
[0006] Another object of the present disclosure is to provide a device that can accept commands over the network to control the onboard DSRC module to generate the desired angles of synchro/resolver signal.
[0007] Another object of the present disclosure is to provide a device that can monitor the status from the synchro/resolver sensor by using onboard SRDC module over the network.
[0008] Another object of the present disclosure is to provide a device that provides a combined solution of SRDC/DSRC interface and SoC-based controller in a single board thereby saving the physical space required on integrating with systems.
[0009] Another object of the present disclosure is to provide a device that can be scalable by using multiple sets of hardware platforms for SRDC/DSRC interface with SoC based units.
[0010] Another object of the present disclosure is to provide a device that reduces a total number of components employed in the device and the reliability of the device can be improved.
[0011] Another object of the present disclosure is to provide a device that utilizes less mounting space and the manufacturing cost of the entire device is reduced.
[0012] Yet another object of the present disclosure is to provide a device that avoids hardware and software communication failure.

SUMMARY
[0013] The present disclosure relates, in general, to a converter system, and more specifically, relates to a network-enabled hardware configurable unit for synchro/resolver signal conversion.
[0014] The present disclosure relates to the design and development of a compact hardware platform for SRDC/DSRC interfaces as a part of the SoC based controller. The hardware configuration can include dual SRDC channels, dual DSRC channels, one channel of SRDC and one channel of DSRC. The device of the present disclosure enables to overcome the limitation of the prior art by providing network-enabled system for synchro/resolver signal to TCP/IP packets or TCP/IP packets to synchro/resolver signal conversion. The hardware is a single board solution for SRDC/DSRC interface and SoC-based controller.
[0015] The present disclosure relates to a network-enabled device for synchro/resolver signal conversion, the device including one or more interchangeable modules coupled to a controller in a single board so as to minimize space, the one or more interchangeably modules comprising a synchro/resolver to digital converter (SRDC) interface and digital to synchro/resolver converter (DSRC) interface, wherein one or more interchangeable modules coupled to the controller configured to monitor, by the SRDC interface, a synchro/resolver signals pertaining to angle data from a synchro/resolver sensor, perform conversion of synchro/resolver to digital signals received from the SRDC interface to data packets and transmit data packets to the DSRC interface to generate the desired angles of synchro/resolver signal to actuate the synchro/resolver sensor.
[0016] According to an embodiment, the device can be enabled/disabled using IP based networks.
[0017] According to an embodiment, the controller is a SoC based controller.
[0018] According to an embodiment, the one or more interchangeably modules can include any or a combination of single channel and dual channel for conversion of synchro/resolver signals to data packets independently.
[0019] According to an embodiment, the one or more interchangeably modules include any or a combination of single channel and dual channel for conversion of data packets to synchro/ resolver signals independently.
[0020] According to an embodiment, the channels in the device is scalable by using multiple sets of SRDC/DSRC with SoC based controller.
[0021] According to an embodiment, the device comprises dual Ethernet ports to avoid any hardware communication failure, wherein predefined convergence time of switching the data packets over Ethernet ports avoid any software communication failure.
[0022] According to an embodiment, the controller transmits time stamped synchronised angle data over Ethernet ports, which helps in mapping of target object with received angle data
[0023] According to an embodiment, the controller performs automatic detection and correction of variation in digital angle data based on previous data of speed and angle information for large angle step input changes.
[0024] According to an embodiment, the device can include programmable resolution feature controlled through IP based protocol, wherein the resolution is increased to N bit by changing the SRDC/DSRC interface with matching footprints, where the range of N is 10-24.
[0025] Various objects, features, aspects, and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components.

BRIEF DESCRIPTION OF THE DRAWINGS
[0026] The following drawings form part of the present specification and are included to further illustrate aspects of the present disclosure. The disclosure may be better understood by reference to the drawings in combination with the detailed description of the specific embodiments presented herein.
[0027] FIG. 1 illustrates an exemplary functional component of hardware configurable of SRDC and DSRC over network, in accordance with an embodiment of the present disclosure.
[0028] FIG. 2 illustrates a schematic arrangement of sensor coupled to device, in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION
[0029] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. If the specification states a component or feature “may”, “can”, “could”, or “might” be included or have a characteristic, that particular component or feature is not required to be included or have the characteristic.
[0030] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0031] The present disclosure relates, in general, to a converter system and more specifically, relates to a network-enabled hardware configurable unit for synchro/resolver signal conversion. The device of the present disclosure enables to overcome the limitations of the prior art by providing a system on a chip (SoC) with both processor and FPGA architectures in a single device based configurable hardware unit for synchro/resolver signal generation and conversion over the controlled network. The synchro/resolver to digital converter (SRDC) module and digital to synchro/resolver converter module (DSRC) are part of the hardware unit. The hardware unit can accept commands over the network to control the onboard DSRC module to generate the desired angles of synchro/resolver signals and can monitor the status from the synchro/resolver sensor by using the onboard SRDC module over the network. The term “synchro/resolver” as used herein is a common angular measurement device that exhibits excellent performance, is relatively low in cost, is small, and exhibits a high degree of reliability. Because of these characteristics, the synchro/resolver is ideal for use in precision pointing and stabilization systems.
[0032] The device of the present disclosure enables to overcome the limitation of the prior art by providing SRDC/DSRC interface with SoC based controller to perform conversion of synchro/resolver digital data with the help of SRDC module into the transmission control protocol/internet protocol (TCP/IP) packets and converting the TCP/IP packets into synchro/resolver signals with the help of DSRC module. The proposed device can be provided on a single board thereby saving the physical space required for integrating with systems. The description of terms and features related to the present disclosure shall be clear from the embodiments that are illustrated and described; however, the invention is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents of the embodiments are possible within the scope of the present disclosure. Additionally, the invention can include other embodiments that are within the scope of the claims but are not described in detail with respect to the following description.
[0033] FIG. 1 illustrates an exemplary functional component of hardware configurable of SRDC and DSRC over network, in accordance with an embodiment of the present disclosure.
[0034] Referring to FIG. 1, the network-enabled hardware configurable device 100 (also referred to as device100, herein) adapted for synchro/resolver signal conversion. The device 100 can include a circuit board 102 (also interchangeably referred to as single-board 102, herein) having a system-on-chip (SOC)-based controller 104, one or more interchangeable modules (106-1, 106-2 (which are collectively referred to as interchangeable modules 106, herein)), peripheral and interface devices 108. The interchangeable modules 106 are coupled to the SOC-based controller 104, where interchangeable modules can include synchro/resolver to digital converter (SRDC) interface and digital to synchro/resolver converter module (DSRC) interface.
[0035] The present disclosure may be implemented in any system using resolvers or synchros, such as motor control systems, process control systems and the like. The present disclosure is particularly suited for implementation in environments such as military systems and the like. However, use of the present disclosure is contemplated for any land, air, sea or space-based tracking, targeting or surveillance system in which position transducers are implemented.
[0036] The proposed device 100 can accept commands over the network to control the onboard DSRC module to generate the desired angles of synchro/resolver signal to actuate the synchro/resolver sensor 202 (as illustrated in FIG. 2) to the proper angle and can monitor the status from synchro/resolver sensor 202 by using onboard SRDC module over the network. For example, the SRDC module measures a synchro/resolver signal of an angle of rotation/angle data associated with synchro/resolver sensor 202. The SRDC module outputs the measured parameters as analog signals, along with a reference signal. The SRDC/DSRC interface 106 with SoC based controller 106 perform conversion of synchro/resolver digital data with the help of SRDC module into the transmission control protocol/internet protocol (TCP/IP) packets (also interchangeably referred to as data packets, herein) and converting the TCP/IP packets into synchro/resolver signals with the help of DSRC module.
[0037] The circuit board 102 may include dual SRDC channels, dual DSRC channels, single channel of SRDC, single channel of DSRC and any combination thereof. The hardware platform can be configurable for the following three configurations of SRDC and DSRC as a part of SoC based unit.
• Dual channel for conversion of synchro/resolver signals to TCP/IP packets independently.
• Dual channel for conversion of TCP/IP packets to synchro/resolver signals independently.
• Single channel for synchro/resolver signal to TCP/IP packets and another single channel for TCP/IP packets to synchro/resolver signals conversion independently.
[0038] In an exemplary embodiment, the number of channels in the device 100 can be scalable further by using multiple sets of hardware platform for SRDC/DSRC interface with SoC-based cum SRDC/DSRC combination. The device 100 can be enabled/disabled through IP based network for remote controlling and monitoring. In an exemplary embodiment, input power supply is 12Vdc and on-board dc-dc converters for generating various voltage levels.
[0039] In an implementation, the front-end PCB interface receives the synchro/resolver signals along the excitation signal of synchro/resolver sensor 202 as a reference signal for the SRDC module. The SRDC module receives the synchro/resolver signals to convert the synchro/resolver signals to digital signal of logic level TTL. The digital signal is fed to the programmable logic (PL) side through voltage level translators. The received data on the PL side transferred to processing system (PS) side through parallel input/output registers used for processing of angle data, controlling and monitoring data sent back to PL side for packets into IP packet and sent to the user over high-speed Ethernet (10/100mbps) 108. Similarly in the case of DSRC, commands over the network are received to control the onboard DSRC module to generate the desired angles of synchro/resolver signal to actuate the synchro/resolver sensor 202 to the proper angle. DSRC module generates the synchro/resolver signal with help of the reference signal. The hardware is presently tested and configured for either channel of SRDC, DSRC or both.
[0040] To avoid communication failure, an intelligent dual redundancy scheme and auto changeover are implemented. A predefined convergence time of 5mSec switching the TCP/IP packets over Ethernet ports (108-1, 108-2 (which are collectively referred to as Ethernet ports 108, herein)) is to avoid any software communication failure. A hardware redundancy scheme can be implemented by providing the dual-port ethernet for sending TCP/IP packets data of dual channels. Time-stamped synchronised angle data is transmitted over Ethernet port 108, which helps in mapping of the target object with received angles data with automatic detection and correction feature in algorithm based on past data of speed and angle information for large-angle step input changes. The unit is configured for the programmable resolution up to 16bit through IP based and can be increased up to N bit resolution by changing the SRDC/DSRC module of the same footprint, the range of N is 10-24.
[0041] The embodiments of the present disclosure described above provide several advantages. The device 100 of the present disclosure can accept commands over the network to control onboard DSRC module to generate the desired angles of synchro/resolver signal and can monitor the status from the synchro/resolver sensor by using onboard SRDC module over the network. The device 100 provides a combined solution of SRDC/DSRC interface and SoC-based controller in the single board thereby saving the physical space required on integrating with systems. The device 100 can be scalable by using multiple sets of hardware platforms for SRDC/DSRC interface with SoC based unit and avoids hardware and software communication failure.
[0042] FIG. 2 illustrates a schematic arrangement of sensor coupled to device, in accordance with an embodiment of the present disclosure.
[0043] Referring to FIG. 2, the synchro/resolver signal output from the sensor 202 is digitally converted by the SRDC interface into a digital signal. The controller 104 configured to receive the digitally-converted signal from the SRDC interface and is processed to form the TCP/IP data packets.
[0044] The controller 104 configured to transmit the TCP/IP data packets to the DSRC interface, where the DSRC interface convert the TCP/IP data packets to synchro/resolver signal to actuate the synchro/resolver sensor 202 at desired angles.
[0045] The controller 104 may include a microprocessor or other devices capable of being programmed or configured to perform computations and instruction processing in accordance with the disclosure. In an exemplary embodiment, the controller 104 may be SoC based controller. Such other devices may include microcontrollers, digital signal processors (DSP), complex programmable logic device (CPLD), field programmable gate arrays (FPGA), application-specific assimilated circuits (ASIC), discrete gate logic, and/or other assimilated circuits, hardware or firmware in lieu of or in addition to a microprocessor.
[0046] The memory can include programmable software instructions that are executed by the processor. The processor may be embodied as a single processor or a number of processors. The processor and a memory may each be, for example located entirely within a single computer or other computing device. The memory, which enables storage of data and programs, may include random-access memory (RAM), read-only memory (ROM), flash memory and any other form of readable and writable storage medium.
[0047] The advantages achieved by the device 100 of the present disclosure can be clear from the embodiments provided herein. Since a total number of components employed in the device is less, the reliability of the device 100 can be improved. Furthermore, the mounting space becomes less, and the manufacturing cost of the entire device is reduced.
[0048] It will be apparent to those skilled in the art that the device 100 of the disclosure may be provided using some or all of the mentioned features and components without departing from the scope of the present disclosure. While various embodiments of the present disclosure have been illustrated and described herein, it will be clear that the disclosure is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents will be apparent to those skilled in the art, without departing from the spirit and scope of the disclosure, as described in the claims.

ADVANTAGES OF THE PRESENT DISCLOSURE
[0049] The present disclosure provides a device that can accept commands over the network to control the onboard DSRC module to generate the desired angles of synchro/resolver signal.
[0050] The present disclosure provides a device that can monitor the status from the synchro/resolver sensor by using onboard SRDC module over the network.
[0051] The present disclosure provides a device that provides a combined solution of SRDC/DSRC interface and SoC-based controller in a single board thereby saving the physical space required on integrating with systems.
[0052] The present disclosure provides a device that can be scalable by using multiple sets of hardware platforms for SRDC/DSRC interface with SoC based unit.
[0053] The present disclosure provides a device that avoids hardware and software communication failure.
[0054] The present disclosure provides a device that reduces a total number of components employed in the device and the reliability of the device can be improved.
[0055] The present disclosure provides a device that utilizes less mounting space and the manufacturing cost of the entire device is reduced.

Documents

Application Documents

# Name Date
1 202141060337-STATEMENT OF UNDERTAKING (FORM 3) [23-12-2021(online)].pdf 2021-12-23
2 202141060337-POWER OF AUTHORITY [23-12-2021(online)].pdf 2021-12-23
3 202141060337-FORM 1 [23-12-2021(online)].pdf 2021-12-23
4 202141060337-DRAWINGS [23-12-2021(online)].pdf 2021-12-23
5 202141060337-DECLARATION OF INVENTORSHIP (FORM 5) [23-12-2021(online)].pdf 2021-12-23
6 202141060337-COMPLETE SPECIFICATION [23-12-2021(online)].pdf 2021-12-23
7 202141060337-POA [18-10-2024(online)].pdf 2024-10-18
8 202141060337-FORM 13 [18-10-2024(online)].pdf 2024-10-18
9 202141060337-AMENDED DOCUMENTS [18-10-2024(online)].pdf 2024-10-18