Optimized Jte For Sic High Voltage Devices

Abstract: A semiconductor device comprising: a substrate comprising silicon carbide; a drift layer disposed over the substrate doped with a first dopant type, so as to have a first conductivity type; an anode region disposed adjacent to the drift layer, wherein the anode region is doped with a second dopant type, so as to have a second conductivity type; and a junction termination extension disposed adjacent to the anode region and extending around the anode region, wherein the junction termination extension has a width wjte and comprises a plurality of discrete regions separated in a first direction and in a second direction and doped with varying concentrations with the second dopant type, so as to have an effective doping profile of the second conductivity type of a functional form that generally decreases along a direction away from an edge of a primary blocking junction, wherein the width wjte is less than or equal to a multiple of five (5) times a width of a one-dimensional depletion width (Wdepl_1D), and wherein a charge tolerance of the semiconductor device is greater than 1.0 x1013 per cm2.

Patent Information

Applicants

Inventors

Specification

Documents

Application Documents

Search Strategy