A) TECHNICAL FIELD

[0001] The present invention generally relates to power supply unit and particularly to switched mode power supply (SMPS) unit. The present invention more generally relates to control system for controlling the output voltages from the SMPS unit.

B) BACKGROUND OF THE INVENTION

[0002] A switched-mode power supply (SMPS) is an electronic power supply unit that incorporates a switching regulator. The SMPS rapidly switches a power transistor between saturation (full on) and cut off (completely off) with a variable duty cycle whose average is the desired output voltage. The Switched mode power supplies (SMPS) have been around for a much shorter time than linear power supplies. They entered the mainstream electronics in the late 1980s. The Switching power supplies have much more complex circuits than the linear power supplies. The Switching power supplies can provide higher current per size/weight than the linear power supplies and are easily obtainable at a lower cost due to the competition between the computer suppliers.

[0003] The Switched mode power supplies (SMPS) with multiple outputs are commonly used for powering up the personal computers and many other consumer electronic appliances. The advantage of using SMPS is to provide greater efficiency as the switching transistors used in SMPS dissipate little power in the saturated state and the off state compared to the semi conducting state (active region). The other advantages include smaller size, lighter weight and lower heat generation from the higher efficiency.

[0004] The output voltage of such switched-mode power supply unit is usually controlled by means of a feedback signal. This feedback signal is used to control the operating cycle of the switching power transistor. There are various ways of providing a suitable feedback signal. For example, an auxiliary winding can be provided to generate a feedback signal to deliver an image of the output voltage.

[0005] In the currently available switched-mode power supply (SMPS) with multiple outputs, one output is usually taken as main output. The feed back to the SMPS controller is provided from that output only while the other outputs are kept floating. In many cases, a linear regulator IC or a low drop-out regulator (LDO) is used to regulate the out put of the auxiliary outputs. It increases the loss in regulation and reduces the efficiency of the unit. The limitation of using the LDO is that the differential voltage between input and output of LDO should be as small as possible for best performance. Otherwise, they tend to dissipate much power, thereby reducing the efficiency. Hence there is a need to control the remaining uncontrolled outputs of the multiple outputs SMPS.

[0006] None of the currently available SMPS units is provided with a simple system and method for controlling the isolated outputs in the multiple outputs of SMPS without the need for using the isolated outputs in the feedback loop. Hence there is a need to develop a simple and effective system and method to control the remaining uncontrolled outputs or the isolated outputs in the multiple outputs of SMPS.

[0007] The abovementioned shortcomings, disadvantages and problems are addressed herein and which will be understood by reading and studying the following specification.

C) OBJECT OF THE INVENTION

[0008] The primary object of the present invention is to develop a system and method for controlling the isolated outputs in the multiple outputs of SMPS, easily and efficiently.

[0009] Another object of the present invention is to develop a system and method for controlling the isolated outputs in the multiple outputs of SMPS easily using a synchronous rectifier.

[0010] Yet another object of the invention is to develop a system and method for controlling the isolated outputs to prevent the voltage drop and to reduce the power loss.

[0011] These and other objects and advantages of the present invention will become readily apparent from the following detailed description taken in conjunction with the accompanying drawings.

D) SUMMARY OF THE INVENTION

[0012] The various embodiments of the present invention provide a system and method to regulate the isolated outputs in the multiple outputs of the switched mode power supply unit to reduce the voltage drop in the output and to reduce the power loss. According to one embodiment of the present invention, the switched mode power supply (SMPS) unit is provided with a synchronous rectifier to control the isolated outputs in the multiple outputs. The synchronous rectifier includes a MOSFET so that the base or gate of the MOSFET is controlled with an isolated output. The isolated output is connected to the MOSFET through a potential divider and comparator circuit. The output of the potential divider is fed to the comparator circuit. When the output voltage exceeds a preset threshold value, a transistor switch is turned off to cut off the synchronous rectifier. Thus the isolated output is regulated by controlling the output of the synchronous rectifier by operating a switching transistor based on the output of the comparator circuit which is connected to an isolated output through a potential divider circuit.

[0013] According to one embodiment of the present invention, a transformer is connected to a source of power supply. The out put of the transformer includes a main output and an auxiliary output. A synchronous rectifier including a MOSFET is connected to the auxiliary output of the transformer to rectify the auxiliary output of the transformer. A filter circuit formed with an inductor and a capacitor is connected to the output of the synchronous rectifier to provide a smooth DC output. A potential divider circuit is connected to the output of the filter circuit. A switching transistor is connected between the synchronous rectifier and the auxiliary output of the transformer.

[0014] A first Zener diode is connected between the base of the switching transistor and the potential divider circuit. The first Zener diode breaks down to make the switching transistor to conduct, when the output voltage of the auxiliary output of the transformer exceeds the preset value. The preset value is the value set by the potential divider circuit and the base emitter voltage VBE of the switching transistor.

[0015] The potential divider circuit, the switching transistor and the first Zener diode form a feed back with the auxiliary output of the transformer. The potential divider circuit is formed with a resistive network. The resistive network includes a first resistor and a second resistor which are connected serially.

[0016] A second transistor is connected to the gate of the MOSFET to limit the gate voltage of the MOSFET so that the gate voltage of the MOSFET does not exceed a threshold value. The second transistor is connected between the source and the gate of the MOSFET to bias the gate of the MOSFET during positive cycle. A freewheeling diode is connected between the synchronous rectifier and the switching transistor to conduct the inductor current in the filter circuit, when the MOSFET does not conduct. A third resistor is connected to the switching transistor to discharge the gate capacitance of the MOSFET during the absence of positive pulses, to ensure that the switching transistor is turned off. A speed up capacitor is connected in parallel to the third resistor for fast turn on and turn off at rising and falling edges of power signal pulses. A third transistor is connected to the gate of the MOSFET to act as a discharge path for the gate capacitance of the MOSFET.

E) BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The other objects, features and advantages will occur to those skilled in the art from the following description of the preferred embodiment and the accompanying drawings in which:

[0018] FIG.l illustrates a block circuit diagram of a switched mode power supply unit according to a prior art.

[0019] FIG.2 illustrates a block circuit diagram of a switched mode power supply unit with a low drop-out regulator according to a prior art.

[0020] FIG. 3 illustrates a block circuit diagram of a switched mode power supply with a synchronous rectifier according to one embodiment of the present invention.

[0021] Although specific features of the present invention are shown in some drawings and not in others. This is done for convenience only as each feature may be combined with any or all of the other features in accordance with the present invention.

F) DETAILED DESCRIPTION OF THE INVENTION

[0022] In the following detailed description, reference is made to the accompanying drawings that form a part hereof, and in which the specific embodiments that may be practiced is shown by way of illustration. These embodiments are described in sufficient detail to enable those skilled in the art to practice the embodiments and it is to be understood that the logical, mechanical and other changes may be made without departing from the scope of the embodiments. The following detailed description is therefore not to be taken in a limiting sense.

[0023] The various embodiments of the present invention provide a system and method to regulate the isolated outputs in the multiple outputs of the SMPS to reduce the voltage drop in the output and to reduce the power loss. According to one embodiment of the present invention, a transformer is connected to a source of power supply. The out put of the transformer includes a main output and an auxiliary output. A synchronous rectifier including a MOSFET is connected to the auxiliary output of the transformer to rectify the auxiliary output of the transformer. A filter circuit formed with an inductor and a capacitor is connected to the output of the synchronous rectifier to provide a smooth DC output. A potential divider circuit is connected to the output of the filter circuit. A switching transistor is connected between the synchronous rectifier and the auxiliary output of the transformer.

[0024] A first Zener diode is connected between the base of the switching transistor and the potential divider circuit. The first Zener diode breaks down to make the switching transistor to conduct, when the output voltage of the auxiliary output of the transformer exceeds the preset value. The preset value is the value set by the potential divider circuit and the base emitter voltage VBE of the switching transistor.

[0025] The potential divider circuit, the switching transistor and the first Zener diode form a feed back with the auxiliary output of the transformer. The potential divider circuit is formed with a resistive network. The resistive network includes a first resistor and a second resistor which are connected serially.

[0026] A second transistor is connected to the gate of the MOSFET to limit the gate voltage of the MOSFET so that the gate voltage of the MOSFET does not exceed a threshold value. The second transistor is connected between the source and the gate of the MOSFET to bias the gate of the MOSFET during positive cycle. A freewheeling diode is connected between the synchronous rectifier and the switching transistor to conduct the inductor current in the filter circuit, when the MOSFET does not conduct. A third resistor is connected to the switching transistor to discharge the gate capacitance of the MOSFET during the absence of positive pulses, to ensure that the switching transistor is turned off. A speed up capacitor is connected in parallel to the third resistor for fast turn on and turns off at rising and falling edges of power signal pulses. A third transistor is connected to the gate of the MOSFET to act as a discharge path for the gate capacitance of the MOSFET.

[0027] According to one embodiment of the present invention, an SMPS unit is provided with a synchronous rectifier to control the isolated outputs in the multiple outputs. The synchronous rectifier includes a MOSFET so that the base or gate of the MOSFET is controlled with the isolated output. The isolated output is connected to the MOSFET through a potential divider and comparator circuit. The output of the potential divider is fed to the comparator circuit. When the output voltage exceeds a preset threshold value, a transistor switch is turned off to cut off the synchronous rectifier. Thus the isolate output is regulated by controlling the output of the synchronous rectifier by operating a switching transistor based on the output of the comparator circuit which is connected to an isolated output through a potential divider circuit.

[0028] According to one embodiment of the present invention, the output of an isolated output is passed through a synchronous rectifier including a MOSFET so that the isolated output is controlled by the regulating the operation of the MOSFET. A MOSFET is connected across an isolated output of the SMPS so that the base/gate of the MOSFET is connected through a diode. A smoothening capacitor is connected across the isolated output in parallel to the MOSFET to smooth the output and to remove the noise or harmonics in the isolated output. The output of the isolated output is fed back to the Synchronous rectifier through a potential divider circuit and a comparator circuit. The potential divider and comparator circuit includes two resistances connected in series. The output of the potential divider and comparator circuit is connected to a switching transistor through a Zener diode. When the output of the comparator is within or beyond the preset value, the Zener diode acts as a switch to conduct or cut off the power. The switching transistor is turned on or off to conduct the power through the MOSFET, when the output of the comparator is within or beyond the preset value. Thus the output from an isolated output of the SMPS is regulated by a MOSFET.

[0029] FIGURE. 1 illustrates a block circuit diagram of a switched mode power supply unit of a prior art in which the main output is controlled with a feedback loop. According to figure 1, The DC input voltage is passed through the transformer 2. The output of the transformer 2 includes main output VI and the auxiliary output V2 and V3. The output voltages can increase or decrease from requisite value due to sudden change in input voltage and the load connected at the output terminals. The PWM controller 11 is used to compare the feedback voltage {Vfb =- Vlx R2/(R1+R2)}. If the main output voltage VI is higher than the required value, the PWM controller 11 will reduce the pulse width and hence effectively reduces V1 to required value. If V1 is less than required value, PWM controller 11 will increase the pulse width and V1 will be restored to required value. The auxiliary outputs V2 and V3 are not in the feedback loop of PWM controller 11 and hence do not get controlled or regulated.

[0030] The diodes (Dl, D2, D3) 3, 4, 5 are Scotchy diodes used for fast transitions that occur in a rectangular wave power signal in a switched mode power supply system (SMPS). The capacitors (C1, C2, C3) 6, 7, 8 act as filters for voltages V1, V2 and V3 respectively. The output voltage V1 is in closed loop with pulse width modulation (PWM) controller 11 and hence it gets regulated against load-current and line-voltage variations. The resistors (Rl, R2) 9, 10 form the voltage divider for feedback loop.

[0031] In one situation, the load current at V2 or V3 is changed suddenly but the load at V1 is not changed, then that the output current of V2 or V3 is also varied thereby leading to the variation in voltage V2 or V3. In another situation, the output current of V2, V3 remain constant but the load current of VI is changed drastically. Then PWM controller varies the pulse width to control the voltage V1 which in turn changes the output voltage at V2 and V3, even though they do not demand for. This situation is solved to some extent by use of Low Drop-Out (LDO) regulators.

[0032] FIG. 2 illustrates a block circuit diagram of a switched mode power supply unit according to a prior art. With respect to FIG.2, the SMPS regulates the auxiliary output V3 using a Low drop-out regulator (LDO) 21. The output voltage V3 is regulated by LDO 21, while the output voltage V2 is shown unregulated as shown in FIG.l. The LDO 21 is analog or linear voltage regulators. It outputs a fixed voltage. The limitation of using LDO 21 is that the differential voltage between input and output of LDO 21 should be as small as possible for best performance. Otherwise, they tend to dissipate much power, bringing down the efficiency. The linear regulator used to regulate auxiliary output of the multiple out SMPS increases the loss in regulation and reduces the efficiency of the unit.

[0033] FIG. 3 illustrates a block circuit diagram illustrates a block circuit diagram of a switched mode power supply unit according to one embodiment of the present invention. With respect to FIG.3, the auxiliary output from the transformer 2 is rectified using a MOSFET (Q2) 31. A filter circuit formed with an inductor 33 and a capacitor 34 is connected to the output of the synchronous rectifier 31 to provide a smooth DC output. A potential divider circuit is connected to the output of the filter circuit. A switching transistor 37 is connected between the synchronous rectifier 31 and the auxiliary output of the transformer 2.

[0034] A first Zener diode 42 is connected between the base of the switching transistor 37 and the potential divider circuit. The first Zener diode 42 breaks down to make the switching transistor 37 to conduct, when the output voltage of the auxiliary output of the transformer 2 exceeds the preset value. The preset value is the value set by the potential divider circuit and the base emitter voltage VBE of the switching transistor 37.

[0035] The potential divider circuit, the switching transistor 37 and the first Zener diode 42 form a feed back with the auxiliary output of the transformer 2. The potential divider circuit is formed with a resistive network. The resistive network includes a first resistor 40 and a second resistor 41 which are connected serially.

[0036] A second transistor 32 is connected to the gate of the MOSFET 31 to limit the gate voltage of the MOSFET 31 so that the gate voltage of the MOSFET 31 does not exceed a threshold value. The second transistor 32 is connected between the source and the gate of the MOSFET 31 to bias the gate of the MOSFET 31 during positive cycle. A freewheeling diode 36 is connected between the synchronous rectifier 31 and the switching transistor 37 to conduct the inductor current in the filter circuit, when the MOSFET 31 does not conduct. A third resistor 39 is connected to the second transistor 32 to discharge the gate capacitance of the MOSFET 31 during the absence of positive pulses, to ensure that the switching transistor 37 is turned off. A speed up capacitor 38 is connected in parallel to the third resistor 39 for fast turn on and turns off at rising and falling edges of power signal pulses. A third transistor 35 is connected to the gate of the MOSFET 31 to act as a discharge path for the gate capacitance of the MOSFET 31.

[0037] When the output voltage V2 tends to exceed the required value, the voltage set by R21- R22, Z2 and VBE of the switching transistor (Q3) 37, the zener diode (Z2) 42 breaks down making the switching transistor (Q3) 37 to conduct. This short circuits the base of the second transistor (Q4) 32 to ground, which turns off the drive to gate of MOSFET (Q2) 31. While the switching transistor (Q3) 37 conducts, the base of the third transistor (Q5) 35 is also driven low. The third transistor (Q5) 35 being a PNP transistor, the emitter is connected to gate of MOSFET (Q2) and the Gate capacitance is made to hold positive voltage of previous ON-drive so that the third transistor (Q5) is turned ON to discharge the gate capacitance of MOSFET (Q2) 31 to ground thereby making MOSFET (Q2) 31 to turn off. The moment MOSFET (Q2) is turned off, no more energy is transferred to the output from the transformer secondary and rise in output of V2 is stopped. During negative swings of input power also, the base of third transistor (Q5) 35 remains low and when a positive voltage persists at the gate of the MOSFET (31) due to previous ON-drive, the biasing makes the third transistor (Q5) 35 to conduct to discharge the gate capacitance of the MOSFET (Q2) 31 thereby pulling MOSFET (Q2) 31 to turn off.

G) ADVANTAGES OF THE PRESENT INVENTION

[0038] Thus the various embodiments of the present invention provide a system and method to control the isolated outputs in a multiple output switched mode power supply unit, using a synchronous rectifier to prevent the voltage drop to reduce the power loss.

[0039] Although the invention is described with various specific embodiments, it will be obvious for a person skilled in the art to practice the invention with modifications. However, all such modifications are deemed to be within the scope of the claims.

[0040] It is also to be understood that the following claims are intended to cover all of the generic and specific features of the present invention described herein and all the statements of the scope of the invention which as a matter of language might be said to fall there between.

CLAIMS

What is claimed is:

1. An output voltage control system for switched mode power supply comprising:

A transformer connected to a source of power supply;

A synchronous rectifier connected to an auxiliary output of the transformer;

A filter circuit connected to the output of the synchronous rectifier;

A potential divider circuit connected to the output of the filter circuit;

A switching transistor connected between the synchronous rectifier and the auxiliary output of the transformer; and

A first Zener diode connected between the base of the switching transistor and the potential divider circuit.

2. The system according to claim 1, wherein the first Zener diode breaks down to make the switching transistor to conduct, when the output voltage of the auxiliary output of the transformer exceeds the preset value.

3. The system according to claim 2, wherein the preset value is the value set by the potential divider circuit and the base emitter voltage VBE of the switching transistor.

4. The system according to claim 1, wherein the synchronous rectifier includes a MOSFET to rectify the auxiliary output of the transformer.

5. The system according to claim 1, wherein the potential divider circuit, the switching transistor and the first Zener diode form a feed back with the auxiliary output of the transformer.

6. The system according to claim 1, wherein the potential divider circuit is formed with a resistive network.

7. The system according to claim 1, wherein the potential divider circuit includes a first resistor and a second resistor which are connected serially.

8. The system according to claim 1, wherein the filter circuit includes an inductor and a capacitor.

9. The system according to claim 1 further comprises a second transistor connected between the source and the gate of the MOSFET to bias the gate of the MOSFET during positive cycle.

10. The system according to claim 1 further comprises a third transistor connected to the gate of the MOSFET to limit the gate voltage of the MOSFET so that the gate voltage of the MOSFET does not exceed a threshold value.

11. The system according to claim 1 further comprises a freewheeling diode connected between the synchronous rectifier and the switching transistor to conduct the inductor current in the filter circuit, when the MOSFET does not conduct.

12. The system according to claim 1 further comprises a third resistor connected to the switching transistor to discharge the gate capacitance of the MOSFET during the absence of positive pulses, to ensure that the switching transistor is turned off.