Claims:1. An S band 8-bit phase shifter monolithic microwave integrated circuit (MMIC) comprising an input matching network module, one or more interstate matching network modules, an output matching network module, and a plurality of phase bit shifters, such that at least one of the plurality of phase bit shifters is configured between the input matching network module and one of the one or more interstate matching network modules, in between each of the one or more interstate matching network modules, and between the one or more interstate matching network modules and the output matching network module, and
wherein a switching element coupled with said network modules and said phase bit shifters facilitates the phase shifter MMIC to switch between one or more pre-determined phases for providing minimum insertion loss, RMS phase error, RMS amplitude error, optimal input compression value, and return losses.
2. The phase shifter MMIC as claimed in claim 1, wherein the phase shifter MMIC comprises a radio frequency (RF) input port coupled to the input matching network module, and configured to receive a RF input signal, and a RF output port coupled to the output matching network module, and configured to provide a phase-shifted RF output signal.
3. The phase shifter MMIC as claimed in claim 1, wherein the input matching network module comprises a series metal insulator metal (MIM) capacitor and thick transmission line to provide a pre-defined input impedance and block a (direct current) DC portion of the input signal received at the RF input port;
the one or more interstate matching network modules are realized using MIM capacitors and transmission lines to establish a match among the phase bits shifters; and
the output matching network is realized using MIM capacitor that serves purpose of DC blocking at the RF output port.
4. The phase shifter MMIC as claimed in claim 1, wherein the plurality of phase bit shifters are arranged in cascading order and a driver is attached with each plurality of phase bit shifters to control phase shift;
wherein the plurality of phase bit shifters comprise one or more lower order phase bit shifters and one or more higher order phase bit shifters.
5. The phase shifter MMIC as claimed in claim 4, wherein the one or more lower order phase bit shifters are designed using a first switched line topology in which a transmission line and a capacitor is switched through the switching element to realize required phase shift,
wherein when the switching element is switched on, by an external DC control voltage, the RF input signal passes through the capacitor, and when the switching element is switched off, the RF input signal passes through ab inductive element.
6. The phase shifter MMIC as claimed in claim 4, wherein the one or more higher order phase bit shifters are designed using conventional SPDT based switched low pass / high pass filter topology for selecting low pass and high pass networks alternatively to generate the required phase shift.
7. The phase shifter MMIC as claimed in claim 1, wherein at least one of the plurality of phase bit shifters is designed using embedded FET/ reconfigurable topology to provide a flat phase shift response with matching at narrow band frequencies, and wherein the embedded FET/ reconfigurable topology provides a through path and phase shifting pass network to the RF input signals.
8. The phase shifter MMIC as claimed in claim 1, wherein the phase shifter MMIC is fabricated from a 0.25 Indium Gallium-Arsenide (InGaAs) p-HEMT (pseudomorphic high electron mobility transistor).
9. The phase shifter MMIC as claimed in claim 8, wherein the switching element is p-HEMT.
10. The phase shifter MMIC as claimed in claim 9, wherein a gate resistor of pre-defined value is configured at gate terminal of the pHEMT to achieve RF to DC isolation.
, Description:TECHNICAL FIELD
[0001] The present disclosure relates to the field of microwave communications. In particular, the present disclosure provides a phase shifter monolithic microwave integrated circuit (MMIC).

BACKGROUND
[0002] The background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.
[0003] Digital phase shifter is a critical component in microwave communication system and Radar systems. Digital phase shifters are used to change the phase value of incoming RF signals. For accurate beam forming in T/R (Transmit/Receive) modules, the digital phase shifter must have high resolution and high accuracy. Digital phase shifters designed using pHEMT switches has higher switching speed. Hence, it is important to design a digital phase shifter with low RMS Phase error with good input and output return losses.
[0004] GaAs based monolithic microwave integrated circuits are vastly used in Radar and communication systems because of their high yield and reliable performance. GaAs monolithic microwave integrated circuits (MMICs) achieve small size, less weight and high power at lower cost. AESA (Active Electronically Scanned Array) Radars are one such area where digital phase shifter MMICs finds its applications. T/R module is the core component of AESA Radar, in which digital phase shifters are used to change the phase of input signals for beam forming and scanning.
[0005] Patent disclosure US7498903 claims a 4-bit Phase Shifter operating at 12.5 GHz and a 5 Bit Phase Shifter operating 11.7GHz using discrete pHEMTs and microstrip technology. The proposed Phase shifters use Loaded Line, reflection type hybrid coupled topologies for individual phase shifting elements. The achieved phase error is about ±5º phase error for both 4 bit Phase Shifter and 5 bit Phase Shifter. Both Phase shifters have been realized using discrete pHEMTs and microstrip technology which lead to higher size and insertion loss. This approach does not aid in development of Hi-reliability, miniaturized modules. Also, the proposed approach may impact yield and throughput of the assembly line.
[0006] Patent disclosure CN102055428B details a 6GHz to 18GHz wide band monolithic GaAs pHEMT based phase shifter. The work integrates High Pass/Low Pass filter topologies for lower order bit (5.25 º and 11.2º) and reflective topologies for 45º, 90º and 180 º phase bits. Due to Frequency Range and corresponding electrical wavelength, the phase shifter is realized as a single chip solution. However, for lower frequency bands such as L band, S band, due to the higher wavelength, the same approach may not feasible to be adopted for single chip solution. Also, over the wide frequency band, the accuracy, resolution is expected to be lower and flatness is a challenge. For narrowband applications such as, RADAR applications, high precision and high resolution are critical to system functionality. The proposed approach is not feasible for narrow band, high resolution, lower frequency monolithic Phase Shifters.
[0007] “A Six Bit CMOS Phase Shifter for S Band” in IEEE Transactions on MT&T,vol 58,no12,pp.35193526 proposes a 6 bit CMOS phase shifter in 0.18um CMOS technology. The return losses are about 8 dB, P1 dB is 9dBm and noise figure is about 7.1dB.The use of CMOS technology aids in size and cost reduction, high precision. However, the intrinsic noise performance of CMOS, low power handling capability, higher insertion loss is not conducive for high power radar applications.
[0008] Patent disclosure US5317290 claims a 6 bit GaAs Bi-directional Phase Shifter MMIC using a combination of low/high pass filter and switched line topologies. The operating frequency range is 5-6GHz.It proposes to reduce the number of passive components to reduce size of the GaAs MMIC. However, this approach does not detail techniques for low insertion loss and higher resolution GaAs Phase shifters.
[0009] There is, therefore, a need in the art to provide a device that obviates above-mentioned limitations and facilitates high-power handling capability, low noise, high resolution, High rel, manufacturing and assembly friendly component at lower cost and lower size for Active Phased Array RADAR applications.

OBJECTS OF THE PRESENT DISCLOSURE
[0010] Some of the objects of the present disclosure, which at least one embodiment herein satisfies are as listed herein below.
[0011] It is an object of the present disclosure to provide a GaAs based S band 8 bit Digital Phase Shifter MMIC.
[0012] It is another object of the present disclosure to provide a digital phase shifter MMIC that is specially designed for T/R modules used in AESA Radars.
[0013] It is another object of the present disclosure to provide a phase shifter MMIC that facilitates high-power handling capability.
[0014] It is another object of the present disclosure to provide a phase shifter MMIC that provides output having low noise and high resolution.
[0015] It is another object of the present disclosure to provide a phase shifter MMIC comprising manufacturing and assembly friendly components having small sizes and are cost-effective.
[0016] It is another object of the present disclosure to provide an efficient, accurate, precise, and compact phase shifter MMIC.
[0017] These and other objects of the present invention will become readily apparent from the following detailed description taken in conjunction with the accompanying drawings.

SUMMARY
[0018] The present disclosure relates to the field of microwave communications. In particular, the present disclosure provides a phase shifter monolithic microwave integrated circuit (MMIC).
[0019] An aspect of the present disclosure pertains to a phase shifter monolithic microwave integrated circuit (MMIC) comprising an input matching network module, one or more interstate matching network modules, an output matching network module, and a plurality of phase bit shifters, such that at least one of the plurality of phase bit shifters may be configured between the input matching network module and one of the one or more interstate matching network modules, in between each of the one or more interstate matching network modules, and between the one or more interstate matching network modules and the output matching network module, and wherein a switching element coupled with said network modules and said phase bit shifters may facilitate the phase shifter MMIC to switch between one or more pre-determined phases.
[0020] In an aspect, the phase shifter MMIC comprises a radio frequency (RF) input port coupled to the input matching network module, and configured to receive a RF input signal, and a RF output port coupled to the output matching network module, and configured to provide a phase-shifted RF output signal.
[0021] In another aspect, the input matching network module may include a series metal insulator metal (MIM) capacitor and thick transmission line to provide a pre-defined input impedance and block a (direct current) DC portion of the input signal received at the RF input port; the one or more interstate matching network modules may be realized using MIM capacitors and transmission lines to establish a match among the phase bits shifters; and the output matching network may be realized using MIM capacitor that serves purpose of DC blocking at the RF output port.
[0022] In an aspect, the plurality of phase bit shifters may be arranged in cascading order and a driver may be attached with each plurality of phase bit shifters to control phase shift; wherein the plurality of phase bit shifters may comprise one or more lower order phase bit shifters and one or more higher order phase bit shifters.
[0023] In an aspect, the one or more lower order phase bit shifters may be designed using a first switched line topology in which a transmission line and a capacitor may be switched through the switching element to realize a required phase shift, wherein when the switching element is switched on, by an external DC control voltage, the RF input signal may pass through the capacitor, and when the switching element is switched off, the RF input signal may pass through an inductive element.
[0024] In one aspect, the one or more higher order phase bit shifters may be designed using conventional SPDT based switched low pass / high pass filter topology for selecting low pass and high pass networks alternatively to generate the required phase shift.
[0025] In other aspect, at least one of the plurality of phase bit shifters may be designed using embedded FET/ reconfigurable topology to provide a flat phase shift response with matching at narrow band frequencies, and wherein the embedded FET/ reconfigurable topology may provide a through path and phase shifting pass network to the RF input signals.
[0026] In another aspect, the switching element may be p-HEMT (pseudomorphic high electron mobility transistor).
[0027] In an aspect, a gate resistor of pre-defined value may be configured at gate terminal of the pHEMT to achieve RF to DC isolation.
[0028] In another aspect, the phase shifter MMIC may be fabricated from Gallium-Arsenide (GaAs) semiconductor.
[0029] Various objects, features, aspects and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components.

BRIEF DESCRIPTION OF THE DRAWINGS
[0030] The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.
[0031] FIG. 1 illustrates an exemplary architecture of the proposed phase shifter MMIC to illustrate its overall working, in accordance with an embodiment of the present disclosure.
[0032] FIG. 2 illustrates extended view depicting layout of the proposed phase shifter MMIC, in accordance with an exemplary embodiment of the present disclosure.
[0033] FIG. 3A illustrates a circuit diagram of a conventional switch line, in accordance with an embodiment of the present disclosure.
[0034] FIG. 3B illustrates a circuit diagram of a novel switch line implemented in the proposed phase shifter MMIC, in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION
[0035] In the following description, numerous specific details are set forth in order to provide a thorough understanding of embodiments of the present invention. It will be apparent to one skilled in the art that embodiments of the present invention may be practiced without some of these specific details.
[0036] The present disclosure relates to the field of microwave communications. In particular, the present disclosure provides a phase shifter monolithic microwave integrated circuit (MMIC).
[0037] According to an aspect, the present disclosure pertains to a phase shifter monolithic microwave integrated circuit (MMIC) having an input matching network module, one or more interstate matching network modules, an output matching network module, and a plurality of phase bit shifters, such that at least one of the plurality of phase bit shifters can be configured between the input matching network module and one of the one or more interstate matching network modules, in between each of the one or more interstate matching network modules, and between the one or more interstate matching network modules and the output matching network module, and wherein a switching element coupled with said network modules and said phase bit shifters facilitates the phase shifter MMIC to switch between one or more pre-determined phases.
[0038] In an embodiment, the phase shifter MMIC can include a radio frequency (RF) input port coupled to the input matching network module, and can be configured to receive a RF input signal, and a RF output port coupled to the output matching network module, and can be configured to provide a phase-shifted RF output signal.
[0039] In another embodiment, the input matching network module can include a series metal insulator metal (MIM) capacitor and thick transmission line to provide a pre-defined input impedance and block a (direct current) DC portion of the input signal received at the RF input port; the one or more interstate matching network modules can be realized using MIM capacitors and transmission lines to establish a match among the phase bits shifters; and the output matching network can be realized using MIM capacitor that serves purpose of DC blocking at the RF output port.
[0040] In an embodiment, the plurality of phase bit shifters can be arranged in cascading order and a driver can be attached with each plurality of phase bit shifters to control phase shift; wherein the plurality of phase bit shifters can include one or more lower order phase bit shifters and one or more higher order phase bit shifters.
[0041] In an embodiment, the one or more lower order phase bit shifters can be designed using a first switched line topology in which a transmission line and a capacitor can be switched through the switching element to a realize required phase shift that can result in a phase amongst the one or more pre-defined phases, wherein when the switching element is switched on, by an external DC control voltage, the RF input signal can pass through the capacitor, and when the switching element is switched off, the RF input signal can pass through an inductive element.
[0042] In one embodiment, the one or more higher order phase bit shifters can be designed using conventional SPDT based switched low pass / high pass filter topology for selecting low pass and high pass networks alternatively to generate the required phase shift.
[0043] In other embodiment, at least one of the plurality of phase bit shifters can be designed using embedded FET/ reconfigurable topology to provide a flat phase shift response with matching at narrow band frequencies, and wherein the embedded FET/ reconfigurable topology can provide a through path and phase shifting pass network to the RF input signals.
[0044] In another embodiment, the switching element can be p-HEMT (pseudomorphic high electron mobility transistor).
[0045] In an embodiment, a gate resistor of pre-defined value can be configured at gate terminal of the pHEMT to achieve RF to DC isolation.
[0046] In another embodiment, the phase shifter MMIC can be fabricated from Gallium-Arsenide (GaAs) semiconductor.
[0047] Referring to FIG. 1 and FIG. 2, in an embodiment, the proposed phase shifter MMIC (100), also interchangeably referred to as phase shifter MMIC (100), can relate to a S-band 8-bit digital phase shifter MMIC (200) with die size of 5.3 mm X 2.5 mm fabricated on 0.1mm InGaAs substrate with 0.25μm gate length Enhancement / Depletion (E/D) mode process. S-band refers to a range of frequencies used in microwave communications.
[0048] In an embodiment, Input matching network (101) can be designed using series metal insulator metal (MIM) capacitor (202) and thick transmission line to provide a pre-defined input impedance, for example 50 Ohms input impedance. In another embodiment, the Input matching circuit (101) can block DC signals at RF input port.
[0049] In another embodiment, first four lower order phase bits (interchangeably referred to as phase bit shifters, hereinafter) (102,104,110,116) can be designed using a novel modified switched line topology (203,204,208,214) in which a transmission line and capacitor can be switched using pHEMT switch to realize required phase shift. Conventional and modified novel switched line topologies are shown in FIG. 3A and FIG. 3B respectively.
[0050] In one embodiment, in modified topology a capacitor is used to derive flat phase, amplitude responses. When pHEMT switch is ON by the external DC control voltage, RF input signal can pass through the capacitive / phase lag path whereas when pHEMT is switched OFF, the RF input signal can select the inductive / phase lead path.
[0051] In yet another embodiment, embedded FET or Reconfigurable topology (205,206) can be chosen to design (106,108) phase bits as this topology occupies small chip area and can provide flat phase shift response with good matching at narrow band frequencies.
[0052] Further, in yet another embodiment, remaining two higher order phase bits (112,114) can be designed using conventional SPDT based switched low pass / high pass filter topology (211,212). In an exemplary embodiment, SPDT switches can be used to select the low pass and high pass networks alternatively to generate the required phase shift.
[0053] In one embodiment, Interstate matching networks (103,105,107,109,111,113,115) can be realized using MIM capacitors and transmission lines to establish best match among the phase bits configured with them.
[0054] In other embodiment, Output matching network (117) can be realized using MIM capacitor (215) which can also serve the purpose of DC blocking at RF output port. In an exemplary embodiment, scalable round inductors (213) can be used in designing the Output matching network (117). In another exemplary embodiment, a gate resistor of value 3 K Ohm (210) can be used at gate terminals of all switch pHEMTs to achieve enough RF to DC isolation.
[0055] In an embodiment, a Digital driver logic (218) (also, referred to as driver 218, herein) can be designed and integrated with each phase bit separately to control the phase shift. The driver 218 can generate required complementary control voltages to switch pHEMTs ON / OFF on input TTL control voltages. In an embodiment, a voltage converter (217) can be used to generate -3V from the input of -5V voltage supply which is required for driver logic circuits. In another embodiment, a high value EPI resistors (207) can be used at all DC, RF crossovers points to avoid coupling of RF signals into the control lines. In yet another embodiment, drain / source terminals of pHEMT switches can be biased to ground potential using high value shunt resistors (209). Further, in yet another embodiment, ESD protection diodes (219) can be incorporated at control and supply voltage lines and a high value bypass capacitor (221) used at voltage supply inputs.
[0056] In an illustrative embodiment, 160 μm X 160 μm bond pads (201,216) can be used at RF input and output ports, and 100 μm X 100 μm bond pads (220) can be provided for control and DC supply inputs, where ground signal ground (GSG) pitch of RF input and output ports can be 200 μm.
[0057] In an exemplary embodiment, the phase shifter MMIC (100) can be a high resolution 0.25μm GaAs based S band 8 bit Digital Phase Shifter MMIC that can be especially designed for T/R modules used in AESA Radars.
[0058] In another exemplary embodiment, the phase shifter MMIC (100) can be designed to facilitate high-power handling capability, low noise, high resolution, high rel, manufacturing and assembly friendly component at lower cost and lower size.
[0059] In an implementation, the S band 8-bit digital phase shifter MMIC (200) can be fabricated using 0.25μm InGaAs pseudomorphic high electron mobility transistor (pHEMT) technology, with high resolution of 1.4° and low RMS phase error, and the input matching network (101), Eight Individual phase bits (102,104,106,108,110,112,114,116) and interstate matching networks (103,105,107,109,111,113,115), output matching network (117) can be realized and integrated in overall chip size of 5.3 mm, 2.5 mm and 0.1 mm in x , y and z directions respectively. The S band 8-bit digital phase shifter MMIC (200) can have a operating frequency range of 3.0-3.6 GHz in S band, an insertion loss of 6 dB typical across all 256 discrete phase states, RMS phase error of 2.6° dB typical and Peak phase error that can vary typically from -3° to 5° across 3.0-3.6 GHz frequency band, RMS amplitude error of 0.3 dB and amplitude variation with respect to all 256 discrete phase states can be ±0.5 dB, a high input 1 dB compression value (P1dB) of +27 dBm typical, return losses that can be better than 10 dB at both RF input and output ports, and operating bias supply voltages can be +5V, -5V and total supply current consumption can be 12 mA typically.
[0060] In an embodiment, high value EPI resistors (207) can be used in control lines near to RF, DC control line crossovers, which can help to avoid the RF signal interference with DC control lines. In another embodiment, source / drain terminals of all pHEMT switches can be connected to ground with high value resistor of 5 KΩ (209) that can maintain ground potential at terminals which helps protect switching characteristics of pHEMT switches against charge accumulations by any chance.
[0061] Thus, it will be appreciated by those of ordinary skill in the art that the diagrams, schematics, illustrations, and the like represent conceptual views or processes illustrating systems and methods embodying this invention. The functions of the various elements shown in the figures may be provided through the use of dedicated hardware as well as hardware capable of executing associated software. Similarly, any switches shown in the figures are conceptual only. Their function may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic, or even manually, the particular technique being selectable by the entity implementing this invention. Those of ordinary skill in the art further understand that the exemplary hardware, software, processes, methods, and/or operating systems described herein are for illustrative purposes and, thus, are not intended to be limited to any particular named.
[0062] While embodiments of the present invention have been illustrated and described, it will be clear that the invention is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents will be apparent to those skilled in the art, without departing from the spirit and scope of the invention, as described in the claim.
[0063] In the foregoing description, numerous details are set forth. It will be apparent, however, to one of ordinary skill in the art having the benefit of this disclosure, that the present invention may be practiced without these specific details. In some instances, well-known structures and devices are shown in block diagram form, rather than in detail, to avoid obscuring the present invention.
[0064] As used herein, and unless the context dictates otherwise, the term "coupled to" is intended to include both direct coupling (in which two elements that are coupled to each other contact each other)and indirect coupling (in which at least one additional element is located between the two elements). Therefore, the terms "coupled to" and "coupled with" are used synonymously. Within the context of this document terms "coupled to" and "coupled with" are also used euphemistically to mean “communicatively coupled with” over a network, where two or more devices are able to exchange data with each other over the network, possibly via one or more intermediary device.
[0065] It should be apparent to those skilled in the art that many more modifications besides those already described are possible without departing from the inventive concepts herein. The inventive subject matter, therefore, is not to be restricted except in the spirit of the appended claims. Moreover, in interpreting both the specification and the claims, all terms should be interpreted in the broadest possible manner consistent with the context. In particular, the terms “comprises” and “comprising” should be interpreted as referring to elements, components, or steps in a non-exclusive manner, indicating that the referenced elements, components, or steps may be present, or utilized, or combined with other elements, components, or steps that are not expressly referenced. Where the specification claims refers to at least one of something selected from the group consisting of A, B, C …. and N, the text should be interpreted as requiring only one element from the group, not A plus N, or B plus N, etc.
[0066] While the foregoing describes various embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof. The scope of the invention is determined by the claims that follow. The invention is not limited to the described embodiments, versions or examples, which are included to enable a person having ordinary skill in the art to make and use the invention when combined with information and knowledge available to the person having ordinary skill in the art.

ADVANTAGES OF THE PRESENT DISCLOSURE
[0067] The present disclosure provides a GaAs based S band 8 bit Digital Phase Shifter MMIC.
[0068] The present disclosure provides a digital phase shifter MMIC that is specially designed for T/R modules used in AESA Radars.
[0069] The present disclosure provides a phase shifter MMIC that facilitates high-power handling capability.
[0070] The present disclosure provides a phase shifter MMIC that provides output having low noise and high resolution.
[0071] The present disclosure provides a phase shifter MMIC comprising manufacturing and assembly friendly components having small sizes and are cost-effetive.
[0072] The present disclosure provides an efficient, accurate, precise, and compact phase shifter MMIC.